xref: /openwifi/kernel_boot/boards/zc706_fmcs2/devicetree.dts (revision b73660ad79a69a37f3fe788f4f09f51e1255bab5)
189e3e0fbSXianjun Jiao/dts-v1/;
289e3e0fbSXianjun Jiao
389e3e0fbSXianjun Jiao/ {
489e3e0fbSXianjun Jiao	#address-cells = <0x1>;
589e3e0fbSXianjun Jiao	#size-cells = <0x1>;
689e3e0fbSXianjun Jiao	compatible = "xlnx,zynq-7000";
789e3e0fbSXianjun Jiao	interrupt-parent = <0x1>;
889e3e0fbSXianjun Jiao	model = "Xilinx Zynq ZC706";
989e3e0fbSXianjun Jiao
1089e3e0fbSXianjun Jiao	cpus {
1189e3e0fbSXianjun Jiao		#address-cells = <0x1>;
1289e3e0fbSXianjun Jiao		#size-cells = <0x0>;
1389e3e0fbSXianjun Jiao
1489e3e0fbSXianjun Jiao		cpu@0 {
1589e3e0fbSXianjun Jiao			compatible = "arm,cortex-a9";
1689e3e0fbSXianjun Jiao			device_type = "cpu";
1789e3e0fbSXianjun Jiao			reg = <0x0>;
1889e3e0fbSXianjun Jiao			clocks = <0x2 0x3>;
1989e3e0fbSXianjun Jiao			clock-latency = <0x3e8>;
2089e3e0fbSXianjun Jiao			cpu0-supply = <0x3>;
2189e3e0fbSXianjun Jiao			operating-points = <0xa2c2b 0xf4240 0x51616 0xf4240>;
2289e3e0fbSXianjun Jiao		};
2389e3e0fbSXianjun Jiao
2489e3e0fbSXianjun Jiao		cpu@1 {
2589e3e0fbSXianjun Jiao			compatible = "arm,cortex-a9";
2689e3e0fbSXianjun Jiao			device_type = "cpu";
2789e3e0fbSXianjun Jiao			reg = <0x1>;
2889e3e0fbSXianjun Jiao			clocks = <0x2 0x3>;
2989e3e0fbSXianjun Jiao		};
3089e3e0fbSXianjun Jiao	};
3189e3e0fbSXianjun Jiao
3289e3e0fbSXianjun Jiao	fpga-full {
3389e3e0fbSXianjun Jiao		compatible = "fpga-region";
3489e3e0fbSXianjun Jiao		fpga-mgr = <0x4>;
3589e3e0fbSXianjun Jiao		#address-cells = <0x1>;
3689e3e0fbSXianjun Jiao		#size-cells = <0x1>;
3789e3e0fbSXianjun Jiao		ranges;
3889e3e0fbSXianjun Jiao	};
3989e3e0fbSXianjun Jiao
4089e3e0fbSXianjun Jiao	pmu@f8891000 {
4189e3e0fbSXianjun Jiao		compatible = "arm,cortex-a9-pmu";
4289e3e0fbSXianjun Jiao		interrupts = <0x0 0x5 0x4 0x0 0x6 0x4>;
4389e3e0fbSXianjun Jiao		interrupt-parent = <0x1>;
4489e3e0fbSXianjun Jiao		reg = <0xf8891000 0x1000 0xf8893000 0x1000>;
4589e3e0fbSXianjun Jiao	};
4689e3e0fbSXianjun Jiao
4789e3e0fbSXianjun Jiao	fixedregulator {
4889e3e0fbSXianjun Jiao		compatible = "regulator-fixed";
4989e3e0fbSXianjun Jiao		regulator-name = "VCCPINT";
5089e3e0fbSXianjun Jiao		regulator-min-microvolt = <0xf4240>;
5189e3e0fbSXianjun Jiao		regulator-max-microvolt = <0xf4240>;
5289e3e0fbSXianjun Jiao		regulator-boot-on;
5389e3e0fbSXianjun Jiao		regulator-always-on;
5489e3e0fbSXianjun Jiao		linux,phandle = <0x3>;
5589e3e0fbSXianjun Jiao		phandle = <0x3>;
5689e3e0fbSXianjun Jiao	};
5789e3e0fbSXianjun Jiao
5889e3e0fbSXianjun Jiao	amba {
5989e3e0fbSXianjun Jiao		u-boot,dm-pre-reloc;
6089e3e0fbSXianjun Jiao		compatible = "simple-bus";
6189e3e0fbSXianjun Jiao		#address-cells = <0x1>;
6289e3e0fbSXianjun Jiao		#size-cells = <0x1>;
6389e3e0fbSXianjun Jiao		interrupt-parent = <0x1>;
6489e3e0fbSXianjun Jiao		ranges;
6589e3e0fbSXianjun Jiao
6689e3e0fbSXianjun Jiao		adc@f8007100 {
6789e3e0fbSXianjun Jiao			compatible = "xlnx,zynq-xadc-1.00.a";
6889e3e0fbSXianjun Jiao			reg = <0xf8007100 0x20>;
6989e3e0fbSXianjun Jiao			interrupts = <0x0 0x7 0x4>;
7089e3e0fbSXianjun Jiao			interrupt-parent = <0x1>;
7189e3e0fbSXianjun Jiao			clocks = <0x2 0xc>;
7289e3e0fbSXianjun Jiao		};
7389e3e0fbSXianjun Jiao
7489e3e0fbSXianjun Jiao		can@e0008000 {
7589e3e0fbSXianjun Jiao			compatible = "xlnx,zynq-can-1.0";
7689e3e0fbSXianjun Jiao			status = "disabled";
7789e3e0fbSXianjun Jiao			clocks = <0x2 0x13 0x2 0x24>;
7889e3e0fbSXianjun Jiao			clock-names = "can_clk", "pclk";
7989e3e0fbSXianjun Jiao			reg = <0xe0008000 0x1000>;
8089e3e0fbSXianjun Jiao			interrupts = <0x0 0x1c 0x4>;
8189e3e0fbSXianjun Jiao			interrupt-parent = <0x1>;
8289e3e0fbSXianjun Jiao			tx-fifo-depth = <0x40>;
8389e3e0fbSXianjun Jiao			rx-fifo-depth = <0x40>;
8489e3e0fbSXianjun Jiao		};
8589e3e0fbSXianjun Jiao
8689e3e0fbSXianjun Jiao		can@e0009000 {
8789e3e0fbSXianjun Jiao			compatible = "xlnx,zynq-can-1.0";
8889e3e0fbSXianjun Jiao			status = "disabled";
8989e3e0fbSXianjun Jiao			clocks = <0x2 0x14 0x2 0x25>;
9089e3e0fbSXianjun Jiao			clock-names = "can_clk", "pclk";
9189e3e0fbSXianjun Jiao			reg = <0xe0009000 0x1000>;
9289e3e0fbSXianjun Jiao			interrupts = <0x0 0x33 0x4>;
9389e3e0fbSXianjun Jiao			interrupt-parent = <0x1>;
9489e3e0fbSXianjun Jiao			tx-fifo-depth = <0x40>;
9589e3e0fbSXianjun Jiao			rx-fifo-depth = <0x40>;
9689e3e0fbSXianjun Jiao		};
9789e3e0fbSXianjun Jiao
9889e3e0fbSXianjun Jiao		gpio@e000a000 {
9989e3e0fbSXianjun Jiao			compatible = "xlnx,zynq-gpio-1.0";
10089e3e0fbSXianjun Jiao			#gpio-cells = <0x2>;
10189e3e0fbSXianjun Jiao			clocks = <0x2 0x2a>;
10289e3e0fbSXianjun Jiao			gpio-controller;
10389e3e0fbSXianjun Jiao			interrupt-controller;
10489e3e0fbSXianjun Jiao			#interrupt-cells = <0x2>;
10589e3e0fbSXianjun Jiao			interrupt-parent = <0x1>;
10689e3e0fbSXianjun Jiao			interrupts = <0x0 0x14 0x4>;
10789e3e0fbSXianjun Jiao			reg = <0xe000a000 0x1000>;
10889e3e0fbSXianjun Jiao			linux,phandle = <0x6>;
10989e3e0fbSXianjun Jiao			phandle = <0x6>;
11089e3e0fbSXianjun Jiao		};
11189e3e0fbSXianjun Jiao
11289e3e0fbSXianjun Jiao		i2c@e0004000 {
11389e3e0fbSXianjun Jiao			compatible = "cdns,i2c-r1p10";
11489e3e0fbSXianjun Jiao			status = "disabled";
11589e3e0fbSXianjun Jiao			clocks = <0x2 0x26>;
11689e3e0fbSXianjun Jiao			interrupt-parent = <0x1>;
11789e3e0fbSXianjun Jiao			interrupts = <0x0 0x19 0x4>;
11889e3e0fbSXianjun Jiao			reg = <0xe0004000 0x1000>;
11989e3e0fbSXianjun Jiao			#address-cells = <0x1>;
12089e3e0fbSXianjun Jiao			#size-cells = <0x0>;
12189e3e0fbSXianjun Jiao		};
12289e3e0fbSXianjun Jiao
12389e3e0fbSXianjun Jiao		i2c@e0005000 {
12489e3e0fbSXianjun Jiao			compatible = "cdns,i2c-r1p10";
12589e3e0fbSXianjun Jiao			status = "disabled";
12689e3e0fbSXianjun Jiao			clocks = <0x2 0x27>;
12789e3e0fbSXianjun Jiao			interrupt-parent = <0x1>;
12889e3e0fbSXianjun Jiao			interrupts = <0x0 0x30 0x4>;
12989e3e0fbSXianjun Jiao			reg = <0xe0005000 0x1000>;
13089e3e0fbSXianjun Jiao			#address-cells = <0x1>;
13189e3e0fbSXianjun Jiao			#size-cells = <0x0>;
13289e3e0fbSXianjun Jiao		};
13389e3e0fbSXianjun Jiao
13489e3e0fbSXianjun Jiao		interrupt-controller@f8f01000 {
13589e3e0fbSXianjun Jiao			compatible = "arm,cortex-a9-gic";
13689e3e0fbSXianjun Jiao			#interrupt-cells = <0x3>;
13789e3e0fbSXianjun Jiao			interrupt-controller;
13889e3e0fbSXianjun Jiao			reg = <0xf8f01000 0x1000 0xf8f00100 0x100>;
13989e3e0fbSXianjun Jiao			linux,phandle = <0x1>;
14089e3e0fbSXianjun Jiao			phandle = <0x1>;
14189e3e0fbSXianjun Jiao		};
14289e3e0fbSXianjun Jiao
14389e3e0fbSXianjun Jiao		cache-controller@f8f02000 {
14489e3e0fbSXianjun Jiao			compatible = "arm,pl310-cache";
14589e3e0fbSXianjun Jiao			reg = <0xf8f02000 0x1000>;
14689e3e0fbSXianjun Jiao			interrupts = <0x0 0x2 0x4>;
14789e3e0fbSXianjun Jiao			arm,data-latency = <0x3 0x2 0x2>;
14889e3e0fbSXianjun Jiao			arm,tag-latency = <0x2 0x2 0x2>;
14989e3e0fbSXianjun Jiao			cache-unified;
15089e3e0fbSXianjun Jiao			cache-level = <0x2>;
15189e3e0fbSXianjun Jiao		};
15289e3e0fbSXianjun Jiao
15389e3e0fbSXianjun Jiao		memory-controller@f8006000 {
15489e3e0fbSXianjun Jiao			compatible = "xlnx,zynq-ddrc-a05";
15589e3e0fbSXianjun Jiao			reg = <0xf8006000 0x1000>;
15689e3e0fbSXianjun Jiao		};
15789e3e0fbSXianjun Jiao
15889e3e0fbSXianjun Jiao		ocmc@f800c000 {
15989e3e0fbSXianjun Jiao			compatible = "xlnx,zynq-ocmc-1.0";
16089e3e0fbSXianjun Jiao			interrupt-parent = <0x1>;
16189e3e0fbSXianjun Jiao			interrupts = <0x0 0x3 0x4>;
16289e3e0fbSXianjun Jiao			reg = <0xf800c000 0x1000>;
16389e3e0fbSXianjun Jiao		};
16489e3e0fbSXianjun Jiao
16589e3e0fbSXianjun Jiao		serial@e0000000 {
16689e3e0fbSXianjun Jiao			compatible = "xlnx,xuartps", "cdns,uart-r1p8";
16789e3e0fbSXianjun Jiao			status = "disabled";
16889e3e0fbSXianjun Jiao			clocks = <0x2 0x17 0x2 0x28>;
16989e3e0fbSXianjun Jiao			clock-names = "uart_clk", "pclk";
17089e3e0fbSXianjun Jiao			reg = <0xe0000000 0x1000>;
17189e3e0fbSXianjun Jiao			interrupts = <0x0 0x1b 0x4>;
17289e3e0fbSXianjun Jiao		};
17389e3e0fbSXianjun Jiao
17489e3e0fbSXianjun Jiao		serial@e0001000 {
17589e3e0fbSXianjun Jiao			compatible = "xlnx,xuartps", "cdns,uart-r1p8";
17689e3e0fbSXianjun Jiao			status = "okay";
17789e3e0fbSXianjun Jiao			clocks = <0x2 0x18 0x2 0x29>;
17889e3e0fbSXianjun Jiao			clock-names = "uart_clk", "pclk";
17989e3e0fbSXianjun Jiao			reg = <0xe0001000 0x1000>;
18089e3e0fbSXianjun Jiao			interrupts = <0x0 0x32 0x4>;
18189e3e0fbSXianjun Jiao		};
18289e3e0fbSXianjun Jiao
18389e3e0fbSXianjun Jiao		spi@e0006000 {
18489e3e0fbSXianjun Jiao			compatible = "xlnx,zynq-spi-r1p6";
18589e3e0fbSXianjun Jiao			reg = <0xe0006000 0x1000>;
18689e3e0fbSXianjun Jiao			status = "okay";
18789e3e0fbSXianjun Jiao			interrupt-parent = <0x1>;
18889e3e0fbSXianjun Jiao			interrupts = <0x0 0x1a 0x4>;
18989e3e0fbSXianjun Jiao			clocks = <0x2 0x19 0x2 0x22>;
19089e3e0fbSXianjun Jiao			clock-names = "ref_clk", "pclk";
19189e3e0fbSXianjun Jiao			#address-cells = <0x1>;
19289e3e0fbSXianjun Jiao			#size-cells = <0x0>;
19389e3e0fbSXianjun Jiao
19489e3e0fbSXianjun Jiao			ad9361-phy@0 {
19589e3e0fbSXianjun Jiao				#address-cells = <0x1>;
19689e3e0fbSXianjun Jiao				#size-cells = <0x0>;
19789e3e0fbSXianjun Jiao				#clock-cells = <0x1>;
19889e3e0fbSXianjun Jiao				compatible = "adi,ad9361";
19989e3e0fbSXianjun Jiao				reg = <0x0>;
20089e3e0fbSXianjun Jiao				spi-cpha;
20189e3e0fbSXianjun Jiao				spi-max-frequency = <0x989680>;
20289e3e0fbSXianjun Jiao				clocks = <0x5 0x0>;
20389e3e0fbSXianjun Jiao				clock-names = "ad9361_ext_refclk";
20489e3e0fbSXianjun Jiao				clock-output-names = "rx_sampl_clk", "tx_sampl_clk";
20589e3e0fbSXianjun Jiao				adi,digital-interface-tune-skip-mode = <0x0>;
20689e3e0fbSXianjun Jiao				adi,pp-tx-swap-enable;
20789e3e0fbSXianjun Jiao				adi,pp-rx-swap-enable;
20889e3e0fbSXianjun Jiao				adi,rx-frame-pulse-mode-enable;
20989e3e0fbSXianjun Jiao				adi,lvds-mode-enable;
21089e3e0fbSXianjun Jiao				adi,lvds-bias-mV = <0x96>;
21189e3e0fbSXianjun Jiao				adi,lvds-rx-onchip-termination-enable;
21289e3e0fbSXianjun Jiao				adi,rx-data-delay = <0x4>;
21389e3e0fbSXianjun Jiao				adi,tx-fb-clock-delay = <0x7>;
21489e3e0fbSXianjun Jiao				adi,dcxo-coarse-and-fine-tune = <0x8 0x1720>;
21589e3e0fbSXianjun Jiao				adi,2rx-2tx-mode-enable;
21689e3e0fbSXianjun Jiao				adi,frequency-division-duplex-mode-enable;
21789e3e0fbSXianjun Jiao				adi,rx-rf-port-input-select = <0x0>;
21889e3e0fbSXianjun Jiao				adi,tx-rf-port-input-select = <0x0>;
21989e3e0fbSXianjun Jiao				adi,tx-attenuation-mdB = <0x2710>;
22089e3e0fbSXianjun Jiao				adi,rf-rx-bandwidth-hz = <0x112a880>;
22189e3e0fbSXianjun Jiao				adi,rf-tx-bandwidth-hz = <0x112a880>;
22289e3e0fbSXianjun Jiao				adi,rx-synthesizer-frequency-hz = <0x0 0x8f0d1800>;
22389e3e0fbSXianjun Jiao				adi,tx-synthesizer-frequency-hz = <0x0 0x92080880>;
22489e3e0fbSXianjun Jiao				adi,rx-path-clock-frequencies = <0x3a980000 0xea60000 0x7530000 0x3a98000 0x1d4c000 0x1d4c000>;
22589e3e0fbSXianjun Jiao				adi,tx-path-clock-frequencies = <0x3a980000 0x7530000 0x7530000 0x3a98000 0x1d4c000 0x1d4c000>;
22689e3e0fbSXianjun Jiao				adi,gc-rx1-mode = <0x2>;
22789e3e0fbSXianjun Jiao				adi,gc-rx2-mode = <0x2>;
22889e3e0fbSXianjun Jiao				adi,gc-adc-ovr-sample-size = <0x4>;
22989e3e0fbSXianjun Jiao				adi,gc-adc-small-overload-thresh = <0x2f>;
23089e3e0fbSXianjun Jiao				adi,gc-adc-large-overload-thresh = <0x3a>;
23189e3e0fbSXianjun Jiao				adi,gc-lmt-overload-high-thresh = <0x320>;
23289e3e0fbSXianjun Jiao				adi,gc-lmt-overload-low-thresh = <0x2c0>;
23389e3e0fbSXianjun Jiao				adi,gc-dec-pow-measurement-duration = <0x2000>;
23489e3e0fbSXianjun Jiao				adi,gc-low-power-thresh = <0x18>;
23589e3e0fbSXianjun Jiao				adi,mgc-inc-gain-step = <0x2>;
23689e3e0fbSXianjun Jiao				adi,mgc-dec-gain-step = <0x2>;
23789e3e0fbSXianjun Jiao				adi,mgc-split-table-ctrl-inp-gain-mode = <0x0>;
23889e3e0fbSXianjun Jiao				adi,agc-attack-delay-extra-margin-us = <0x1>;
23989e3e0fbSXianjun Jiao				adi,agc-outer-thresh-high = <0x5>;
24089e3e0fbSXianjun Jiao				adi,agc-outer-thresh-high-dec-steps = <0x2>;
24189e3e0fbSXianjun Jiao				adi,agc-inner-thresh-high = <0xa>;
24289e3e0fbSXianjun Jiao				adi,agc-inner-thresh-high-dec-steps = <0x1>;
24389e3e0fbSXianjun Jiao				adi,agc-inner-thresh-low = <0xc>;
24489e3e0fbSXianjun Jiao				adi,agc-inner-thresh-low-inc-steps = <0x1>;
24589e3e0fbSXianjun Jiao				adi,agc-outer-thresh-low = <0x12>;
24689e3e0fbSXianjun Jiao				adi,agc-outer-thresh-low-inc-steps = <0x2>;
24789e3e0fbSXianjun Jiao				adi,agc-adc-small-overload-exceed-counter = <0xa>;
24889e3e0fbSXianjun Jiao				adi,agc-adc-large-overload-exceed-counter = <0xa>;
24989e3e0fbSXianjun Jiao				adi,agc-adc-large-overload-inc-steps = <0x2>;
25089e3e0fbSXianjun Jiao				adi,agc-lmt-overload-large-exceed-counter = <0xa>;
25189e3e0fbSXianjun Jiao				adi,agc-lmt-overload-small-exceed-counter = <0xa>;
25289e3e0fbSXianjun Jiao				adi,agc-lmt-overload-large-inc-steps = <0x2>;
25389e3e0fbSXianjun Jiao				adi,agc-gain-update-interval-us = <0x3e8>;
25489e3e0fbSXianjun Jiao				adi,fagc-dec-pow-measurement-duration = <0x40>;
25589e3e0fbSXianjun Jiao				adi,fagc-lp-thresh-increment-steps = <0x1>;
25689e3e0fbSXianjun Jiao				adi,fagc-lp-thresh-increment-time = <0x5>;
25789e3e0fbSXianjun Jiao				adi,fagc-energy-lost-stronger-sig-gain-lock-exit-cnt = <0x8>;
25889e3e0fbSXianjun Jiao				adi,fagc-final-overrange-count = <0x3>;
25989e3e0fbSXianjun Jiao				adi,fagc-gain-index-type-after-exit-rx-mode = <0x0>;
26089e3e0fbSXianjun Jiao				adi,fagc-lmt-final-settling-steps = <0x1>;
26189e3e0fbSXianjun Jiao				adi,fagc-lock-level = <0xa>;
26289e3e0fbSXianjun Jiao				adi,fagc-lock-level-gain-increase-upper-limit = <0x5>;
26389e3e0fbSXianjun Jiao				adi,fagc-lock-level-lmt-gain-increase-enable;
26489e3e0fbSXianjun Jiao				adi,fagc-lpf-final-settling-steps = <0x1>;
26589e3e0fbSXianjun Jiao				adi,fagc-optimized-gain-offset = <0x5>;
26689e3e0fbSXianjun Jiao				adi,fagc-power-measurement-duration-in-state5 = <0x40>;
26789e3e0fbSXianjun Jiao				adi,fagc-rst-gla-engergy-lost-goto-optim-gain-enable;
26889e3e0fbSXianjun Jiao				adi,fagc-rst-gla-engergy-lost-sig-thresh-below-ll = <0xa>;
26989e3e0fbSXianjun Jiao				adi,fagc-rst-gla-engergy-lost-sig-thresh-exceeded-enable;
27089e3e0fbSXianjun Jiao				adi,fagc-rst-gla-if-en-agc-pulled-high-mode = <0x0>;
27189e3e0fbSXianjun Jiao				adi,fagc-rst-gla-large-adc-overload-enable;
27289e3e0fbSXianjun Jiao				adi,fagc-rst-gla-large-lmt-overload-enable;
27389e3e0fbSXianjun Jiao				adi,fagc-rst-gla-stronger-sig-thresh-above-ll = <0xa>;
27489e3e0fbSXianjun Jiao				adi,fagc-rst-gla-stronger-sig-thresh-exceeded-enable;
27589e3e0fbSXianjun Jiao				adi,fagc-state-wait-time-ns = <0x104>;
27689e3e0fbSXianjun Jiao				adi,fagc-use-last-lock-level-for-set-gain-enable;
27789e3e0fbSXianjun Jiao				adi,rssi-restart-mode = <0x3>;
27889e3e0fbSXianjun Jiao				adi,rssi-delay = <0x1>;
27989e3e0fbSXianjun Jiao				adi,rssi-wait = <0x1>;
28089e3e0fbSXianjun Jiao				adi,rssi-duration = <0x3e8>;
28189e3e0fbSXianjun Jiao				adi,ctrl-outs-index = <0x0>;
28289e3e0fbSXianjun Jiao				adi,ctrl-outs-enable-mask = <0xff>;
28389e3e0fbSXianjun Jiao				adi,temp-sense-measurement-interval-ms = <0x3e8>;
28489e3e0fbSXianjun Jiao				adi,temp-sense-offset-signed = <0xce>;
28589e3e0fbSXianjun Jiao				adi,temp-sense-periodic-measurement-enable;
28689e3e0fbSXianjun Jiao				adi,aux-dac-manual-mode-enable;
28789e3e0fbSXianjun Jiao				adi,aux-dac1-default-value-mV = <0x0>;
28889e3e0fbSXianjun Jiao				adi,aux-dac1-rx-delay-us = <0x0>;
28989e3e0fbSXianjun Jiao				adi,aux-dac1-tx-delay-us = <0x0>;
29089e3e0fbSXianjun Jiao				adi,aux-dac2-default-value-mV = <0x0>;
29189e3e0fbSXianjun Jiao				adi,aux-dac2-rx-delay-us = <0x0>;
29289e3e0fbSXianjun Jiao				adi,aux-dac2-tx-delay-us = <0x0>;
29389e3e0fbSXianjun Jiao				en_agc-gpios = <0x6 0x62 0x0>;
29489e3e0fbSXianjun Jiao				sync-gpios = <0x6 0x63 0x0>;
29589e3e0fbSXianjun Jiao				reset-gpios = <0x6 0x64 0x0>;
29689e3e0fbSXianjun Jiao				enable-gpios = <0x6 0x65 0x0>;
29789e3e0fbSXianjun Jiao				txnrx-gpios = <0x6 0x66 0x0>;
29889e3e0fbSXianjun Jiao				linux,phandle = <0x11>;
29989e3e0fbSXianjun Jiao				phandle = <0x11>;
30089e3e0fbSXianjun Jiao			};
30189e3e0fbSXianjun Jiao		};
30289e3e0fbSXianjun Jiao
30389e3e0fbSXianjun Jiao		spi@e0007000 {
30489e3e0fbSXianjun Jiao			compatible = "xlnx,zynq-spi-r1p6";
30589e3e0fbSXianjun Jiao			reg = <0xe0007000 0x1000>;
30689e3e0fbSXianjun Jiao			status = "okay";
30789e3e0fbSXianjun Jiao			interrupt-parent = <0x1>;
30889e3e0fbSXianjun Jiao			interrupts = <0x0 0x31 0x4>;
30989e3e0fbSXianjun Jiao			clocks = <0x2 0x1a 0x2 0x23>;
31089e3e0fbSXianjun Jiao			clock-names = "ref_clk", "pclk";
31189e3e0fbSXianjun Jiao			#address-cells = <0x1>;
31289e3e0fbSXianjun Jiao			#size-cells = <0x0>;
31389e3e0fbSXianjun Jiao
31489e3e0fbSXianjun Jiao			adf4351-udc-tx-pmod@0 {
31589e3e0fbSXianjun Jiao				#address-cells = <0x1>;
31689e3e0fbSXianjun Jiao				#size-cells = <0x0>;
31789e3e0fbSXianjun Jiao				compatible = "adi,adf4351";
31889e3e0fbSXianjun Jiao				reg = <0x0>;
31989e3e0fbSXianjun Jiao				spi-max-frequency = <0x989680>;
32089e3e0fbSXianjun Jiao				clocks = <0x7>;
32189e3e0fbSXianjun Jiao				clock-names = "clkin";
32289e3e0fbSXianjun Jiao				adi,channel-spacing = <0xf4240>;
32389e3e0fbSXianjun Jiao				adi,power-up-frequency = <0x160dc080>;
32489e3e0fbSXianjun Jiao				adi,phase-detector-polarity-positive-enable;
32589e3e0fbSXianjun Jiao				adi,charge-pump-current = <0x9c4>;
32689e3e0fbSXianjun Jiao				adi,output-power = <0x3>;
32789e3e0fbSXianjun Jiao				adi,mute-till-lock-enable;
32889e3e0fbSXianjun Jiao				adi,muxout-select = <0x6>;
32989e3e0fbSXianjun Jiao				gpios = <0x6 0x68 0x0>;
33089e3e0fbSXianjun Jiao			};
33189e3e0fbSXianjun Jiao
33289e3e0fbSXianjun Jiao			adf4351-udc-rx-pmod@1 {
33389e3e0fbSXianjun Jiao				#address-cells = <0x1>;
33489e3e0fbSXianjun Jiao				#size-cells = <0x0>;
33589e3e0fbSXianjun Jiao				compatible = "adi,adf4351";
33689e3e0fbSXianjun Jiao				reg = <0x1>;
33789e3e0fbSXianjun Jiao				spi-max-frequency = <0x989680>;
33889e3e0fbSXianjun Jiao				clocks = <0x7>;
33989e3e0fbSXianjun Jiao				clock-names = "clkin";
34089e3e0fbSXianjun Jiao				adi,channel-spacing = <0xf4240>;
34189e3e0fbSXianjun Jiao				adi,power-up-frequency = <0x1443fd00>;
34289e3e0fbSXianjun Jiao				adi,phase-detector-polarity-positive-enable;
34389e3e0fbSXianjun Jiao				adi,charge-pump-current = <0x9c4>;
34489e3e0fbSXianjun Jiao				adi,output-power = <0x3>;
34589e3e0fbSXianjun Jiao				adi,mute-till-lock-enable;
34689e3e0fbSXianjun Jiao				adi,muxout-select = <0x6>;
34789e3e0fbSXianjun Jiao				gpios = <0x6 0x67 0x0>;
34889e3e0fbSXianjun Jiao			};
34989e3e0fbSXianjun Jiao		};
35089e3e0fbSXianjun Jiao
35189e3e0fbSXianjun Jiao		spi@e000d000 {
35289e3e0fbSXianjun Jiao			clock-names = "ref_clk", "pclk";
35389e3e0fbSXianjun Jiao			clocks = <0x2 0xa 0x2 0x2b>;
35489e3e0fbSXianjun Jiao			compatible = "xlnx,zynq-qspi-1.0";
35589e3e0fbSXianjun Jiao			status = "okay";
35689e3e0fbSXianjun Jiao			interrupt-parent = <0x1>;
35789e3e0fbSXianjun Jiao			interrupts = <0x0 0x13 0x4>;
35889e3e0fbSXianjun Jiao			reg = <0xe000d000 0x1000>;
35989e3e0fbSXianjun Jiao			#address-cells = <0x1>;
36089e3e0fbSXianjun Jiao			#size-cells = <0x0>;
36189e3e0fbSXianjun Jiao			is-dual = <0x1>;
36289e3e0fbSXianjun Jiao			num-cs = <0x1>;
36389e3e0fbSXianjun Jiao
36489e3e0fbSXianjun Jiao			ps7-qspi@0 {
36589e3e0fbSXianjun Jiao				#address-cells = <0x1>;
36689e3e0fbSXianjun Jiao				#size-cells = <0x1>;
36789e3e0fbSXianjun Jiao				spi-tx-bus-width = <0x1>;
36889e3e0fbSXianjun Jiao				spi-rx-bus-width = <0x4>;
36989e3e0fbSXianjun Jiao				compatible = "n25q128a11";
37089e3e0fbSXianjun Jiao				reg = <0x0>;
37189e3e0fbSXianjun Jiao				spi-max-frequency = <0x2faf080>;
37289e3e0fbSXianjun Jiao
37389e3e0fbSXianjun Jiao				partition@0 {
37489e3e0fbSXianjun Jiao					label = "boot";
37589e3e0fbSXianjun Jiao					reg = <0x0 0x500000>;
37689e3e0fbSXianjun Jiao				};
37789e3e0fbSXianjun Jiao
37889e3e0fbSXianjun Jiao				partition@500000 {
37989e3e0fbSXianjun Jiao					label = "bootenv";
38089e3e0fbSXianjun Jiao					reg = <0x500000 0x20000>;
38189e3e0fbSXianjun Jiao				};
38289e3e0fbSXianjun Jiao
38389e3e0fbSXianjun Jiao				partition@520000 {
38489e3e0fbSXianjun Jiao					label = "config";
38589e3e0fbSXianjun Jiao					reg = <0x520000 0x20000>;
38689e3e0fbSXianjun Jiao				};
38789e3e0fbSXianjun Jiao
38889e3e0fbSXianjun Jiao				partition@540000 {
38989e3e0fbSXianjun Jiao					label = "image";
39089e3e0fbSXianjun Jiao					reg = <0x540000 0xa80000>;
39189e3e0fbSXianjun Jiao				};
39289e3e0fbSXianjun Jiao
39389e3e0fbSXianjun Jiao				partition@fc0000 {
39489e3e0fbSXianjun Jiao					label = "spare";
39589e3e0fbSXianjun Jiao					reg = <0xfc0000 0x0>;
39689e3e0fbSXianjun Jiao				};
39789e3e0fbSXianjun Jiao			};
39889e3e0fbSXianjun Jiao		};
39989e3e0fbSXianjun Jiao
40089e3e0fbSXianjun Jiao		memory-controller@e000e000 {
40189e3e0fbSXianjun Jiao			#address-cells = <0x1>;
40289e3e0fbSXianjun Jiao			#size-cells = <0x1>;
40389e3e0fbSXianjun Jiao			status = "disabled";
40489e3e0fbSXianjun Jiao			clock-names = "memclk", "aclk";
40589e3e0fbSXianjun Jiao			clocks = <0x2 0xb 0x2 0x2c>;
40689e3e0fbSXianjun Jiao			compatible = "arm,pl353-smc-r2p1";
40789e3e0fbSXianjun Jiao			interrupt-parent = <0x1>;
40889e3e0fbSXianjun Jiao			interrupts = <0x0 0x12 0x4>;
40989e3e0fbSXianjun Jiao			ranges;
41089e3e0fbSXianjun Jiao			reg = <0xe000e000 0x1000>;
41189e3e0fbSXianjun Jiao
41289e3e0fbSXianjun Jiao			flash@e1000000 {
41389e3e0fbSXianjun Jiao				status = "disabled";
41489e3e0fbSXianjun Jiao				compatible = "arm,pl353-nand-r2p1";
41589e3e0fbSXianjun Jiao				reg = <0xe1000000 0x1000000>;
41689e3e0fbSXianjun Jiao				#address-cells = <0x1>;
41789e3e0fbSXianjun Jiao				#size-cells = <0x1>;
41889e3e0fbSXianjun Jiao			};
41989e3e0fbSXianjun Jiao
42089e3e0fbSXianjun Jiao			flash@e2000000 {
42189e3e0fbSXianjun Jiao				status = "disabled";
42289e3e0fbSXianjun Jiao				compatible = "cfi-flash";
42389e3e0fbSXianjun Jiao				reg = <0xe2000000 0x2000000>;
42489e3e0fbSXianjun Jiao				#address-cells = <0x1>;
42589e3e0fbSXianjun Jiao				#size-cells = <0x1>;
42689e3e0fbSXianjun Jiao			};
42789e3e0fbSXianjun Jiao		};
42889e3e0fbSXianjun Jiao
42989e3e0fbSXianjun Jiao		ethernet@e000b000 {
43089e3e0fbSXianjun Jiao			compatible = "cdns,zynq-gem", "cdns,gem";
43189e3e0fbSXianjun Jiao			reg = <0xe000b000 0x1000>;
43289e3e0fbSXianjun Jiao			status = "okay";
43389e3e0fbSXianjun Jiao			interrupts = <0x0 0x16 0x4>;
43489e3e0fbSXianjun Jiao			clocks = <0x2 0x1e 0x2 0x1e 0x2 0xd>;
43589e3e0fbSXianjun Jiao			clock-names = "pclk", "hclk", "tx_clk";
43689e3e0fbSXianjun Jiao			#address-cells = <0x1>;
43789e3e0fbSXianjun Jiao			#size-cells = <0x0>;
43889e3e0fbSXianjun Jiao			phy-handle = <0x8>;
43989e3e0fbSXianjun Jiao			phy-mode = "rgmii-id";
44089e3e0fbSXianjun Jiao
44189e3e0fbSXianjun Jiao			phy@7 {
44289e3e0fbSXianjun Jiao				device_type = "ethernet-phy";
44389e3e0fbSXianjun Jiao				reg = <0x7>;
44489e3e0fbSXianjun Jiao				linux,phandle = <0x8>;
44589e3e0fbSXianjun Jiao				phandle = <0x8>;
44689e3e0fbSXianjun Jiao			};
44789e3e0fbSXianjun Jiao		};
44889e3e0fbSXianjun Jiao
44989e3e0fbSXianjun Jiao		ethernet@e000c000 {
45089e3e0fbSXianjun Jiao			compatible = "cdns,zynq-gem", "cdns,gem";
45189e3e0fbSXianjun Jiao			reg = <0xe000c000 0x1000>;
45289e3e0fbSXianjun Jiao			status = "disabled";
45389e3e0fbSXianjun Jiao			interrupts = <0x0 0x2d 0x4>;
45489e3e0fbSXianjun Jiao			clocks = <0x2 0x1f 0x2 0x1f 0x2 0xe>;
45589e3e0fbSXianjun Jiao			clock-names = "pclk", "hclk", "tx_clk";
45689e3e0fbSXianjun Jiao			#address-cells = <0x1>;
45789e3e0fbSXianjun Jiao			#size-cells = <0x0>;
45889e3e0fbSXianjun Jiao		};
45989e3e0fbSXianjun Jiao
46089e3e0fbSXianjun Jiao		sdhci@e0100000 {
46189e3e0fbSXianjun Jiao			compatible = "arasan,sdhci-8.9a";
46289e3e0fbSXianjun Jiao			status = "okay";
46389e3e0fbSXianjun Jiao			clock-names = "clk_xin", "clk_ahb";
46489e3e0fbSXianjun Jiao			clocks = <0x2 0x15 0x2 0x20>;
46589e3e0fbSXianjun Jiao			interrupt-parent = <0x1>;
46689e3e0fbSXianjun Jiao			interrupts = <0x0 0x18 0x4>;
46789e3e0fbSXianjun Jiao			reg = <0xe0100000 0x1000>;
46889e3e0fbSXianjun Jiao			broken-adma2;
46989e3e0fbSXianjun Jiao		};
47089e3e0fbSXianjun Jiao
47189e3e0fbSXianjun Jiao		sdhci@e0101000 {
47289e3e0fbSXianjun Jiao			compatible = "arasan,sdhci-8.9a";
47389e3e0fbSXianjun Jiao			status = "disabled";
47489e3e0fbSXianjun Jiao			clock-names = "clk_xin", "clk_ahb";
47589e3e0fbSXianjun Jiao			clocks = <0x2 0x16 0x2 0x21>;
47689e3e0fbSXianjun Jiao			interrupt-parent = <0x1>;
47789e3e0fbSXianjun Jiao			interrupts = <0x0 0x2f 0x4>;
47889e3e0fbSXianjun Jiao			reg = <0xe0101000 0x1000>;
47989e3e0fbSXianjun Jiao			broken-adma2;
48089e3e0fbSXianjun Jiao		};
48189e3e0fbSXianjun Jiao
48289e3e0fbSXianjun Jiao		slcr@f8000000 {
48389e3e0fbSXianjun Jiao			#address-cells = <0x1>;
48489e3e0fbSXianjun Jiao			#size-cells = <0x1>;
48589e3e0fbSXianjun Jiao			compatible = "xlnx,zynq-slcr", "syscon", "simple-mfd";
48689e3e0fbSXianjun Jiao			reg = <0xf8000000 0x1000>;
48789e3e0fbSXianjun Jiao			ranges;
48889e3e0fbSXianjun Jiao			linux,phandle = <0x9>;
48989e3e0fbSXianjun Jiao			phandle = <0x9>;
49089e3e0fbSXianjun Jiao
49189e3e0fbSXianjun Jiao			clkc@100 {
49289e3e0fbSXianjun Jiao				#clock-cells = <0x1>;
49389e3e0fbSXianjun Jiao				compatible = "xlnx,ps7-clkc";
49489e3e0fbSXianjun Jiao				fclk-enable = <0xf>;
49589e3e0fbSXianjun Jiao				clock-output-names = "armpll", "ddrpll", "iopll", "cpu_6or4x", "cpu_3or2x", "cpu_2x", "cpu_1x", "ddr2x", "ddr3x", "dci", "lqspi", "smc", "pcap", "gem0", "gem1", "fclk0", "fclk1", "fclk2", "fclk3", "can0", "can1", "sdio0", "sdio1", "uart0", "uart1", "spi0", "spi1", "dma", "usb0_aper", "usb1_aper", "gem0_aper", "gem1_aper", "sdio0_aper", "sdio1_aper", "spi0_aper", "spi1_aper", "can0_aper", "can1_aper", "i2c0_aper", "i2c1_aper", "uart0_aper", "uart1_aper", "gpio_aper", "lqspi_aper", "smc_aper", "swdt", "dbg_trc", "dbg_apb";
49689e3e0fbSXianjun Jiao				reg = <0x100 0x100>;
49789e3e0fbSXianjun Jiao				ps-clk-frequency = <0x1fca055>;
49889e3e0fbSXianjun Jiao				linux,phandle = <0x2>;
49989e3e0fbSXianjun Jiao				phandle = <0x2>;
50089e3e0fbSXianjun Jiao			};
50189e3e0fbSXianjun Jiao
50289e3e0fbSXianjun Jiao			rstc@200 {
50389e3e0fbSXianjun Jiao				compatible = "xlnx,zynq-reset";
50489e3e0fbSXianjun Jiao				reg = <0x200 0x48>;
50589e3e0fbSXianjun Jiao				#reset-cells = <0x1>;
50689e3e0fbSXianjun Jiao				syscon = <0x9>;
50789e3e0fbSXianjun Jiao			};
50889e3e0fbSXianjun Jiao
50989e3e0fbSXianjun Jiao			pinctrl@700 {
51089e3e0fbSXianjun Jiao				compatible = "xlnx,pinctrl-zynq";
51189e3e0fbSXianjun Jiao				reg = <0x700 0x200>;
51289e3e0fbSXianjun Jiao				syscon = <0x9>;
51389e3e0fbSXianjun Jiao			};
51489e3e0fbSXianjun Jiao		};
51589e3e0fbSXianjun Jiao
51689e3e0fbSXianjun Jiao		dmac@f8003000 {
51789e3e0fbSXianjun Jiao			compatible = "arm,pl330", "arm,primecell";
51889e3e0fbSXianjun Jiao			reg = <0xf8003000 0x1000>;
51989e3e0fbSXianjun Jiao			interrupt-parent = <0x1>;
52089e3e0fbSXianjun Jiao			interrupt-names = "abort", "dma0", "dma1", "dma2", "dma3", "dma4", "dma5", "dma6", "dma7";
52189e3e0fbSXianjun Jiao			interrupts = <0x0 0xd 0x4 0x0 0xe 0x4 0x0 0xf 0x4 0x0 0x10 0x4 0x0 0x11 0x4 0x0 0x28 0x4 0x0 0x29 0x4 0x0 0x2a 0x4 0x0 0x2b 0x4>;
52289e3e0fbSXianjun Jiao			#dma-cells = <0x1>;
52389e3e0fbSXianjun Jiao			#dma-channels = <0x8>;
52489e3e0fbSXianjun Jiao			#dma-requests = <0x4>;
52589e3e0fbSXianjun Jiao			clocks = <0x2 0x1b>;
52689e3e0fbSXianjun Jiao			clock-names = "apb_pclk";
52789e3e0fbSXianjun Jiao			linux,phandle = <0xe>;
52889e3e0fbSXianjun Jiao			phandle = <0xe>;
52989e3e0fbSXianjun Jiao		};
53089e3e0fbSXianjun Jiao
53189e3e0fbSXianjun Jiao		devcfg@f8007000 {
53289e3e0fbSXianjun Jiao			compatible = "xlnx,zynq-devcfg-1.0";
53389e3e0fbSXianjun Jiao			interrupt-parent = <0x1>;
53489e3e0fbSXianjun Jiao			interrupts = <0x0 0x8 0x4>;
53589e3e0fbSXianjun Jiao			reg = <0xf8007000 0x100>;
53689e3e0fbSXianjun Jiao			clocks = <0x2 0xc 0x2 0xf 0x2 0x10 0x2 0x11 0x2 0x12>;
53789e3e0fbSXianjun Jiao			clock-names = "ref_clk", "fclk0", "fclk1", "fclk2", "fclk3";
53889e3e0fbSXianjun Jiao			syscon = <0x9>;
53989e3e0fbSXianjun Jiao			linux,phandle = <0x4>;
54089e3e0fbSXianjun Jiao			phandle = <0x4>;
54189e3e0fbSXianjun Jiao		};
54289e3e0fbSXianjun Jiao
54389e3e0fbSXianjun Jiao		efuse@f800d000 {
54489e3e0fbSXianjun Jiao			compatible = "xlnx,zynq-efuse";
54589e3e0fbSXianjun Jiao			reg = <0xf800d000 0x20>;
54689e3e0fbSXianjun Jiao		};
54789e3e0fbSXianjun Jiao
54889e3e0fbSXianjun Jiao		timer@f8f00200 {
54989e3e0fbSXianjun Jiao			compatible = "arm,cortex-a9-global-timer";
55089e3e0fbSXianjun Jiao			reg = <0xf8f00200 0x20>;
55189e3e0fbSXianjun Jiao			interrupts = <0x1 0xb 0x301>;
55289e3e0fbSXianjun Jiao			interrupt-parent = <0x1>;
55389e3e0fbSXianjun Jiao			clocks = <0x2 0x4>;
55489e3e0fbSXianjun Jiao		};
55589e3e0fbSXianjun Jiao
55689e3e0fbSXianjun Jiao		timer@f8001000 {
55789e3e0fbSXianjun Jiao			interrupt-parent = <0x1>;
55889e3e0fbSXianjun Jiao			interrupts = <0x0 0xa 0x4 0x0 0xb 0x4 0x0 0xc 0x4>;
55989e3e0fbSXianjun Jiao			compatible = "cdns,ttc";
56089e3e0fbSXianjun Jiao			clocks = <0x2 0x6>;
56189e3e0fbSXianjun Jiao			reg = <0xf8001000 0x1000>;
56289e3e0fbSXianjun Jiao		};
56389e3e0fbSXianjun Jiao
56489e3e0fbSXianjun Jiao		timer@f8002000 {
56589e3e0fbSXianjun Jiao			interrupt-parent = <0x1>;
56689e3e0fbSXianjun Jiao			interrupts = <0x0 0x25 0x4 0x0 0x26 0x4 0x0 0x27 0x4>;
56789e3e0fbSXianjun Jiao			compatible = "cdns,ttc";
56889e3e0fbSXianjun Jiao			clocks = <0x2 0x6>;
56989e3e0fbSXianjun Jiao			reg = <0xf8002000 0x1000>;
57089e3e0fbSXianjun Jiao		};
57189e3e0fbSXianjun Jiao
57289e3e0fbSXianjun Jiao		timer@f8f00600 {
57389e3e0fbSXianjun Jiao			interrupt-parent = <0x1>;
57489e3e0fbSXianjun Jiao			interrupts = <0x1 0xd 0x301>;
57589e3e0fbSXianjun Jiao			compatible = "arm,cortex-a9-twd-timer";
57689e3e0fbSXianjun Jiao			reg = <0xf8f00600 0x20>;
57789e3e0fbSXianjun Jiao			clocks = <0x2 0x4>;
57889e3e0fbSXianjun Jiao		};
57989e3e0fbSXianjun Jiao
58089e3e0fbSXianjun Jiao		usb@e0002000 {
58189e3e0fbSXianjun Jiao			compatible = "xlnx,zynq-usb-2.20a", "chipidea,usb2";
58289e3e0fbSXianjun Jiao			status = "okay";
58389e3e0fbSXianjun Jiao			clocks = <0x2 0x1c>;
58489e3e0fbSXianjun Jiao			interrupt-parent = <0x1>;
58589e3e0fbSXianjun Jiao			interrupts = <0x0 0x15 0x4>;
58689e3e0fbSXianjun Jiao			reg = <0xe0002000 0x1000>;
58789e3e0fbSXianjun Jiao			phy_type = "ulpi";
58889e3e0fbSXianjun Jiao			dr_mode = "host";
58989e3e0fbSXianjun Jiao			xlnx,phy-reset-gpio = <0x6 0x7 0x0>;
59089e3e0fbSXianjun Jiao		};
59189e3e0fbSXianjun Jiao
59289e3e0fbSXianjun Jiao		usb@e0003000 {
59389e3e0fbSXianjun Jiao			compatible = "xlnx,zynq-usb-2.20a", "chipidea,usb2";
59489e3e0fbSXianjun Jiao			status = "disabled";
59589e3e0fbSXianjun Jiao			clocks = <0x2 0x1d>;
59689e3e0fbSXianjun Jiao			interrupt-parent = <0x1>;
59789e3e0fbSXianjun Jiao			interrupts = <0x0 0x2c 0x4>;
59889e3e0fbSXianjun Jiao			reg = <0xe0003000 0x1000>;
59989e3e0fbSXianjun Jiao			phy_type = "ulpi";
60089e3e0fbSXianjun Jiao		};
60189e3e0fbSXianjun Jiao
60289e3e0fbSXianjun Jiao		watchdog@f8005000 {
60389e3e0fbSXianjun Jiao			clocks = <0x2 0x2d>;
60489e3e0fbSXianjun Jiao			compatible = "cdns,wdt-r1p2";
60589e3e0fbSXianjun Jiao			interrupt-parent = <0x1>;
60689e3e0fbSXianjun Jiao			interrupts = <0x0 0x9 0x1>;
60789e3e0fbSXianjun Jiao			reg = <0xf8005000 0x1000>;
60889e3e0fbSXianjun Jiao			timeout-sec = <0xa>;
60989e3e0fbSXianjun Jiao		};
61089e3e0fbSXianjun Jiao	};
61189e3e0fbSXianjun Jiao
61289e3e0fbSXianjun Jiao	aliases {
61389e3e0fbSXianjun Jiao		ethernet0 = "/amba/ethernet@e000b000";
61489e3e0fbSXianjun Jiao		serial0 = "/amba/serial@e0001000";
61589e3e0fbSXianjun Jiao	};
61689e3e0fbSXianjun Jiao
61789e3e0fbSXianjun Jiao	memory {
61889e3e0fbSXianjun Jiao		device_type = "memory";
61989e3e0fbSXianjun Jiao		reg = <0x0 0x40000000>;
62089e3e0fbSXianjun Jiao	};
62189e3e0fbSXianjun Jiao
62289e3e0fbSXianjun Jiao	chosen {
62389e3e0fbSXianjun Jiao		bootargs = "console=ttyPS0,115200 root=/dev/mmcblk0p2 rw earlyprintk rootfstype=ext4 rootwait";
62489e3e0fbSXianjun Jiao		linux,stdout-path = "/amba@0/uart@E0001000";
62589e3e0fbSXianjun Jiao	};
62689e3e0fbSXianjun Jiao
62789e3e0fbSXianjun Jiao	leds {
62889e3e0fbSXianjun Jiao		compatible = "gpio-leds";
62989e3e0fbSXianjun Jiao
63089e3e0fbSXianjun Jiao		ds8 {
63189e3e0fbSXianjun Jiao			label = "ds12:green";
63289e3e0fbSXianjun Jiao			gpios = <0x6 0x3d 0x0>;
63389e3e0fbSXianjun Jiao			//gpios = <0x6 7 0x0>;//according to zc706 board, do not know why real gpio_bd[7] here becomes 0x3d
63489e3e0fbSXianjun Jiao			default-state = "off";
63589e3e0fbSXianjun Jiao		};
63689e3e0fbSXianjun Jiao
63789e3e0fbSXianjun Jiao		ds9 {
63889e3e0fbSXianjun Jiao			label = "ds15:green";
63989e3e0fbSXianjun Jiao			gpios = <0x6 0x3e 0x0>;
64089e3e0fbSXianjun Jiao			//gpios = <0x6 8 0x0>;//according to zc706 board, do not know why real gpio_bd[7] here becomes 0x3e
64189e3e0fbSXianjun Jiao			default-state = "off";
64289e3e0fbSXianjun Jiao		};
64389e3e0fbSXianjun Jiao
64489e3e0fbSXianjun Jiao		ds10 {
64589e3e0fbSXianjun Jiao			label = "ds16:green";
64689e3e0fbSXianjun Jiao			gpios = <0x6 0x3f 0x0>;
64789e3e0fbSXianjun Jiao			//gpios = <0x6 9 0x0>;//according to zc706 board, do not know why real gpio_bd[7] here becomes 0x3f
64889e3e0fbSXianjun Jiao			default-state = "off";
64989e3e0fbSXianjun Jiao		};
65089e3e0fbSXianjun Jiao
65189e3e0fbSXianjun Jiao		ds35 {
65289e3e0fbSXianjun Jiao			label = "ds17:green";
65389e3e0fbSXianjun Jiao			gpios = <0x6 0x40 0x0>;
65489e3e0fbSXianjun Jiao			//gpios = <0x6 10 0x0>;//according to zc706 board, do not know why real gpio_bd[7] here becomes 0x40
65589e3e0fbSXianjun Jiao			default-state = "on";
65689e3e0fbSXianjun Jiao		};
65789e3e0fbSXianjun Jiao	};
65889e3e0fbSXianjun Jiao
65989e3e0fbSXianjun Jiao	gpio_keys {
66089e3e0fbSXianjun Jiao		compatible = "gpio-keys";
66189e3e0fbSXianjun Jiao		#address-cells = <0x1>;
66289e3e0fbSXianjun Jiao		#size-cells = <0x0>;
66389e3e0fbSXianjun Jiao		autorepeat;
66489e3e0fbSXianjun Jiao
66589e3e0fbSXianjun Jiao		sw7 {
66689e3e0fbSXianjun Jiao			label = "Left";
66789e3e0fbSXianjun Jiao			linux,code = <0x69>;
66889e3e0fbSXianjun Jiao			gpios = <0x6 0x3a 0x0>;
66989e3e0fbSXianjun Jiao		};
67089e3e0fbSXianjun Jiao
67189e3e0fbSXianjun Jiao		sw8 {
67289e3e0fbSXianjun Jiao			label = "Right";
67389e3e0fbSXianjun Jiao			linux,code = <0x6a>;
67489e3e0fbSXianjun Jiao			gpios = <0x6 0x3c 0x0>;
67589e3e0fbSXianjun Jiao		};
67689e3e0fbSXianjun Jiao
67789e3e0fbSXianjun Jiao		sw9 {
67889e3e0fbSXianjun Jiao			label = "Select";
67989e3e0fbSXianjun Jiao			linux,code = <0x1c>;
68089e3e0fbSXianjun Jiao			gpios = <0x6 0x3b 0x0>;
68189e3e0fbSXianjun Jiao		};
68289e3e0fbSXianjun Jiao	};
68389e3e0fbSXianjun Jiao
68489e3e0fbSXianjun Jiao	fpga-axi@0 {
68589e3e0fbSXianjun Jiao		compatible = "simple-bus";
68689e3e0fbSXianjun Jiao		#address-cells = <0x1>;
68789e3e0fbSXianjun Jiao		#size-cells = <0x1>;
68889e3e0fbSXianjun Jiao		ranges;
68989e3e0fbSXianjun Jiao
69089e3e0fbSXianjun Jiao		i2c@41600000 {
69189e3e0fbSXianjun Jiao			compatible = "xlnx,axi-iic-1.02.a", "xlnx,xps-iic-2.00.a";
69289e3e0fbSXianjun Jiao			reg = <0x41600000 0x10000>;
69389e3e0fbSXianjun Jiao			interrupt-parent = <0x1>;
69489e3e0fbSXianjun Jiao			interrupts = <0x0 0x3a 0x4>;
69589e3e0fbSXianjun Jiao			clocks = <0x2 0xf>;
69689e3e0fbSXianjun Jiao			clock-names = "pclk";
69789e3e0fbSXianjun Jiao			#address-cells = <0x1>;
69889e3e0fbSXianjun Jiao			#size-cells = <0x0>;
69989e3e0fbSXianjun Jiao
70089e3e0fbSXianjun Jiao			i2cswitch@74 {
70189e3e0fbSXianjun Jiao				compatible = "nxp,pca9548";
70289e3e0fbSXianjun Jiao				#address-cells = <0x1>;
70389e3e0fbSXianjun Jiao				#size-cells = <0x0>;
70489e3e0fbSXianjun Jiao				reg = <0x74>;
70589e3e0fbSXianjun Jiao
70689e3e0fbSXianjun Jiao				i2c@0 {
70789e3e0fbSXianjun Jiao					#address-cells = <0x1>;
70889e3e0fbSXianjun Jiao					#size-cells = <0x0>;
70989e3e0fbSXianjun Jiao					reg = <0x0>;
71089e3e0fbSXianjun Jiao
71189e3e0fbSXianjun Jiao					osc@5d {
71289e3e0fbSXianjun Jiao						compatible = "si570";
71389e3e0fbSXianjun Jiao						temperature-stability = <0x32>;
71489e3e0fbSXianjun Jiao						reg = <0x5d>;
71589e3e0fbSXianjun Jiao						factory-fout = <0x9502f90>;
71689e3e0fbSXianjun Jiao						initial-fout = <0x8d9ee20>;
71789e3e0fbSXianjun Jiao					};
71889e3e0fbSXianjun Jiao				};
71989e3e0fbSXianjun Jiao
72089e3e0fbSXianjun Jiao				i2c@1 {
72189e3e0fbSXianjun Jiao					#address-cells = <0x1>;
72289e3e0fbSXianjun Jiao					#size-cells = <0x0>;
72389e3e0fbSXianjun Jiao					reg = <0x1>;
72489e3e0fbSXianjun Jiao
72589e3e0fbSXianjun Jiao					adv7511 {
72689e3e0fbSXianjun Jiao						compatible = "adi,adv7511";
72789e3e0fbSXianjun Jiao						reg = <0x39 0x3f>;
72889e3e0fbSXianjun Jiao						reg-names = "primary", "edid";
72989e3e0fbSXianjun Jiao						adi,input-depth = <0x8>;
73089e3e0fbSXianjun Jiao						adi,input-colorspace = "rgb";
73189e3e0fbSXianjun Jiao						adi,input-clock = "1x";
73289e3e0fbSXianjun Jiao						adi,clock-delay = <0x0>;
73389e3e0fbSXianjun Jiao						#sound-dai-cells = <0x0>;
73489e3e0fbSXianjun Jiao						linux,phandle = <0x14>;
73589e3e0fbSXianjun Jiao						phandle = <0x14>;
73689e3e0fbSXianjun Jiao
73789e3e0fbSXianjun Jiao						ports {
73889e3e0fbSXianjun Jiao							#address-cells = <0x1>;
73989e3e0fbSXianjun Jiao							#size-cells = <0x0>;
74089e3e0fbSXianjun Jiao
74189e3e0fbSXianjun Jiao							port@0 {
74289e3e0fbSXianjun Jiao								reg = <0x0>;
74389e3e0fbSXianjun Jiao
74489e3e0fbSXianjun Jiao								endpoint {
74589e3e0fbSXianjun Jiao									remote-endpoint = <0xa>;
74689e3e0fbSXianjun Jiao									linux,phandle = <0xd>;
74789e3e0fbSXianjun Jiao									phandle = <0xd>;
74889e3e0fbSXianjun Jiao								};
74989e3e0fbSXianjun Jiao							};
75089e3e0fbSXianjun Jiao
75189e3e0fbSXianjun Jiao							port@1 {
75289e3e0fbSXianjun Jiao								reg = <0x1>;
75389e3e0fbSXianjun Jiao							};
75489e3e0fbSXianjun Jiao						};
75589e3e0fbSXianjun Jiao					};
75689e3e0fbSXianjun Jiao				};
75789e3e0fbSXianjun Jiao
75889e3e0fbSXianjun Jiao				i2c@2 {
75989e3e0fbSXianjun Jiao					#address-cells = <0x1>;
76089e3e0fbSXianjun Jiao					#size-cells = <0x0>;
76189e3e0fbSXianjun Jiao					reg = <0x2>;
76289e3e0fbSXianjun Jiao
76389e3e0fbSXianjun Jiao					eeprom@54 {
76489e3e0fbSXianjun Jiao						compatible = "at,24c08";
76589e3e0fbSXianjun Jiao						reg = <0x54>;
76689e3e0fbSXianjun Jiao					};
76789e3e0fbSXianjun Jiao				};
76889e3e0fbSXianjun Jiao
76989e3e0fbSXianjun Jiao				i2c@3 {
77089e3e0fbSXianjun Jiao					#address-cells = <0x1>;
77189e3e0fbSXianjun Jiao					#size-cells = <0x0>;
77289e3e0fbSXianjun Jiao					reg = <0x3>;
77389e3e0fbSXianjun Jiao
77489e3e0fbSXianjun Jiao					gpio@21 {
77589e3e0fbSXianjun Jiao						compatible = "ti,tca6416";
77689e3e0fbSXianjun Jiao						reg = <0x21>;
77789e3e0fbSXianjun Jiao						gpio-controller;
77889e3e0fbSXianjun Jiao						#gpio-cells = <0x2>;
77989e3e0fbSXianjun Jiao					};
78089e3e0fbSXianjun Jiao				};
78189e3e0fbSXianjun Jiao
78289e3e0fbSXianjun Jiao				i2c@4 {
78389e3e0fbSXianjun Jiao					#address-cells = <0x1>;
78489e3e0fbSXianjun Jiao					#size-cells = <0x0>;
78589e3e0fbSXianjun Jiao					reg = <0x4>;
78689e3e0fbSXianjun Jiao
78789e3e0fbSXianjun Jiao					rtc@54 {
78889e3e0fbSXianjun Jiao						compatible = "nxp,pcf8563";
78989e3e0fbSXianjun Jiao						reg = <0x51>;
79089e3e0fbSXianjun Jiao					};
79189e3e0fbSXianjun Jiao				};
79289e3e0fbSXianjun Jiao
79389e3e0fbSXianjun Jiao				i2c@6 {
79489e3e0fbSXianjun Jiao					#size-cells = <0x0>;
79589e3e0fbSXianjun Jiao					#address-cells = <0x1>;
79689e3e0fbSXianjun Jiao					reg = <0x6>;
79789e3e0fbSXianjun Jiao
79889e3e0fbSXianjun Jiao					ad7291@2f {
79989e3e0fbSXianjun Jiao						compatible = "adi,ad7291";
80089e3e0fbSXianjun Jiao						reg = <0x2f>;
80189e3e0fbSXianjun Jiao					};
80289e3e0fbSXianjun Jiao
80389e3e0fbSXianjun Jiao					eeprom@50 {
80489e3e0fbSXianjun Jiao						compatible = "at24,24c02";
80589e3e0fbSXianjun Jiao						reg = <0x50>;
80689e3e0fbSXianjun Jiao					};
80789e3e0fbSXianjun Jiao				};
80889e3e0fbSXianjun Jiao			};
80989e3e0fbSXianjun Jiao		};
81089e3e0fbSXianjun Jiao
81189e3e0fbSXianjun Jiao		axivdma@43000000 {
81289e3e0fbSXianjun Jiao			#address-cells = <0x1>;
81389e3e0fbSXianjun Jiao			#size-cells = <0x1>;
81489e3e0fbSXianjun Jiao			#dma-cells = <0x1>;
81589e3e0fbSXianjun Jiao			clock-names = "s_axi_lite_aclk", "m_axi_mm2s_aclk", "m_axi_mm2s_aclk";
81689e3e0fbSXianjun Jiao			clocks = <2 15>, <2 15>, <2 15>;
81789e3e0fbSXianjun Jiao			compatible = "xlnx,axi-vdma-1.00.a";
81889e3e0fbSXianjun Jiao			interrupt-names = "mm2s_introut";
81989e3e0fbSXianjun Jiao			interrupt-parent = <1>;
82089e3e0fbSXianjun Jiao			interrupts = <0 59 4>;
82189e3e0fbSXianjun Jiao			reg = <0x43000000 0x1000>;
82289e3e0fbSXianjun Jiao			xlnx,addrwidth = <0x20>;
82389e3e0fbSXianjun Jiao			xlnx,flush-fsync = <0x1>;
82489e3e0fbSXianjun Jiao			xlnx,num-fstores = <0x3>;
82589e3e0fbSXianjun Jiao			linux,phandle = <0xb>;
82689e3e0fbSXianjun Jiao			phandle = <0xb>;
82789e3e0fbSXianjun Jiao
82889e3e0fbSXianjun Jiao			dma-channel@43000000 {
82989e3e0fbSXianjun Jiao				compatible = "xlnx,axi-vdma-mm2s-channel";
83089e3e0fbSXianjun Jiao				interrupts = <0 59 4>;
83189e3e0fbSXianjun Jiao				xlnx,datawidth = <0x40>;
83289e3e0fbSXianjun Jiao				xlnx,device-id = <0x0>;
83389e3e0fbSXianjun Jiao				xlnx,genlock-mode ;
83489e3e0fbSXianjun Jiao				xlnx,include-dre = <0x0>;
83589e3e0fbSXianjun Jiao			};
83689e3e0fbSXianjun Jiao		};
83789e3e0fbSXianjun Jiao
83889e3e0fbSXianjun Jiao		axi-clkgen@79000000 {
83989e3e0fbSXianjun Jiao			compatible = "adi,axi-clkgen-2.00.a";
84089e3e0fbSXianjun Jiao			reg = <0x79000000 0x10000>;
84189e3e0fbSXianjun Jiao			#clock-cells = <0x0>;
84289e3e0fbSXianjun Jiao			clocks = <0x2 0x10>;
84389e3e0fbSXianjun Jiao			linux,phandle = <0xc>;
84489e3e0fbSXianjun Jiao			phandle = <0xc>;
84589e3e0fbSXianjun Jiao		};
84689e3e0fbSXianjun Jiao
84789e3e0fbSXianjun Jiao		axi_hdmi@70e00000 {
84889e3e0fbSXianjun Jiao			compatible = "adi,axi-hdmi-tx-1.00.a";
84989e3e0fbSXianjun Jiao			reg = <0x70e00000 0x10000>;
85089e3e0fbSXianjun Jiao			dmas = <0xb 0x0>;
85189e3e0fbSXianjun Jiao			dma-names = "video";
85289e3e0fbSXianjun Jiao			clocks = <0xc>;
85389e3e0fbSXianjun Jiao			adi,is-rgb;
85489e3e0fbSXianjun Jiao
85589e3e0fbSXianjun Jiao			port {
85689e3e0fbSXianjun Jiao
85789e3e0fbSXianjun Jiao				endpoint {
85889e3e0fbSXianjun Jiao					remote-endpoint = <0xd>;
85989e3e0fbSXianjun Jiao					linux,phandle = <0xa>;
86089e3e0fbSXianjun Jiao					phandle = <0xa>;
86189e3e0fbSXianjun Jiao				};
86289e3e0fbSXianjun Jiao			};
86389e3e0fbSXianjun Jiao		};
86489e3e0fbSXianjun Jiao
86589e3e0fbSXianjun Jiao		axi-spdif-tx@75c00000 {
86689e3e0fbSXianjun Jiao			compatible = "adi,axi-spdif-tx-1.00.a";
86789e3e0fbSXianjun Jiao			reg = <0x75c00000 0x1000>;
86889e3e0fbSXianjun Jiao			dmas = <0xe 0x0>;
86989e3e0fbSXianjun Jiao			dma-names = "tx";
87089e3e0fbSXianjun Jiao			clocks = <0x2 0xf 0xf>;
87189e3e0fbSXianjun Jiao			clock-names = "axi", "ref";
87289e3e0fbSXianjun Jiao			#sound-dai-cells = <0x0>;
87389e3e0fbSXianjun Jiao			linux,phandle = <0x13>;
87489e3e0fbSXianjun Jiao			phandle = <0x13>;
87589e3e0fbSXianjun Jiao		};
87689e3e0fbSXianjun Jiao
87789e3e0fbSXianjun Jiao		dma@7c400000 {
87889e3e0fbSXianjun Jiao			compatible = "adi,axi-dmac-1.00.a";
87989e3e0fbSXianjun Jiao			reg = <0x7c400000 0x10000>;
88089e3e0fbSXianjun Jiao			#dma-cells = <0x1>;
88189e3e0fbSXianjun Jiao			interrupts = <0 57 4>;
88289e3e0fbSXianjun Jiao			clocks = <0x2 0xf 0xf>;
88389e3e0fbSXianjun Jiao			linux,phandle = <0x10>;
88489e3e0fbSXianjun Jiao			phandle = <0x10>;
88589e3e0fbSXianjun Jiao
88689e3e0fbSXianjun Jiao			adi,channels {
88789e3e0fbSXianjun Jiao				#size-cells = <0x0>;
88889e3e0fbSXianjun Jiao				#address-cells = <0x1>;
88989e3e0fbSXianjun Jiao
89089e3e0fbSXianjun Jiao				dma-channel@0 {
89189e3e0fbSXianjun Jiao					reg = <0x0>;
89289e3e0fbSXianjun Jiao					adi,source-bus-width = <0x40>;
89389e3e0fbSXianjun Jiao					adi,source-bus-type = <0x2>;
89489e3e0fbSXianjun Jiao					adi,destination-bus-width = <0x40>;
89589e3e0fbSXianjun Jiao					adi,destination-bus-type = <0x0>;
89689e3e0fbSXianjun Jiao					adi,length-width = <0x18>;
89789e3e0fbSXianjun Jiao				};
89889e3e0fbSXianjun Jiao			};
89989e3e0fbSXianjun Jiao		};
90089e3e0fbSXianjun Jiao
90189e3e0fbSXianjun Jiao		dma@7c420000 {
90289e3e0fbSXianjun Jiao			compatible = "adi,axi-dmac-1.00.a";
90389e3e0fbSXianjun Jiao			reg = <0x7c420000 0x10000>;
90489e3e0fbSXianjun Jiao			#dma-cells = <0x1>;
90589e3e0fbSXianjun Jiao			interrupts = <0 56 4>;
90689e3e0fbSXianjun Jiao			clocks = <0x2 0xf 0xf>;
90789e3e0fbSXianjun Jiao			linux,phandle = <0x12>;
90889e3e0fbSXianjun Jiao			phandle = <0x12>;
90989e3e0fbSXianjun Jiao
91089e3e0fbSXianjun Jiao			adi,channels {
91189e3e0fbSXianjun Jiao				#size-cells = <0x0>;
91289e3e0fbSXianjun Jiao				#address-cells = <0x1>;
91389e3e0fbSXianjun Jiao
91489e3e0fbSXianjun Jiao				dma-channel@0 {
91589e3e0fbSXianjun Jiao					reg = <0x0>;
91689e3e0fbSXianjun Jiao					adi,source-bus-width = <0x40>;
91789e3e0fbSXianjun Jiao					adi,source-bus-type = <0x0>;
91889e3e0fbSXianjun Jiao					adi,destination-bus-width = <0x40>;
91989e3e0fbSXianjun Jiao					adi,destination-bus-type = <0x2>;
92089e3e0fbSXianjun Jiao					adi,length-width = <0x18>;
92189e3e0fbSXianjun Jiao					adi,cyclic;
92289e3e0fbSXianjun Jiao				};
92389e3e0fbSXianjun Jiao			};
92489e3e0fbSXianjun Jiao		};
92589e3e0fbSXianjun Jiao
92689e3e0fbSXianjun Jiao		sdr: sdr {
92789e3e0fbSXianjun Jiao			compatible ="sdr,sdr";
92889e3e0fbSXianjun Jiao			dmas = <&rx_dma 0
92989e3e0fbSXianjun Jiao					&rx_dma 1
93089e3e0fbSXianjun Jiao					&tx_dma 0
93189e3e0fbSXianjun Jiao					&tx_dma 1>;
93289e3e0fbSXianjun Jiao			dma-names = "rx_dma_mm2s", "rx_dma_s2mm", "tx_dma_mm2s", "tx_dma_s2mm";
93389e3e0fbSXianjun Jiao			interrupt-names = "not_valid_anymore", "rx_pkt_intr", "tx_itrpt0", "tx_itrpt1";
93489e3e0fbSXianjun Jiao			interrupt-parent = <1>;
93589e3e0fbSXianjun Jiao			interrupts = <0 29 1 0 30 1 0 33 1 0 34 1>;
93689e3e0fbSXianjun Jiao		} ;
93789e3e0fbSXianjun Jiao
93889e3e0fbSXianjun Jiao		axidmatest_1: axidmatest@1 {
93989e3e0fbSXianjun Jiao			compatible ="xlnx,axi-dma-test-1.00.a";
94089e3e0fbSXianjun Jiao			dmas = <&rx_dma 0
94189e3e0fbSXianjun Jiao				&rx_dma 1>;
94289e3e0fbSXianjun Jiao			dma-names = "axidma0", "axidma1";
94389e3e0fbSXianjun Jiao		} ;
94489e3e0fbSXianjun Jiao
94589e3e0fbSXianjun Jiao		tx_dma: dma@80400000 {
94689e3e0fbSXianjun Jiao			#dma-cells = <1>;
94789e3e0fbSXianjun Jiao			clock-names = "s_axi_lite_aclk", "m_axi_sg_aclk", "m_axi_mm2s_aclk", "m_axi_s2mm_aclk";
948*b73660adSXianjun Jiao			clocks = <0x2 0x11>, <0x2 0x11>, <0x2 0x11>, <0x2 0x11>;
94989e3e0fbSXianjun Jiao			compatible = "xlnx,axi-dma-1.00.a";
95089e3e0fbSXianjun Jiao			interrupt-names = "mm2s_introut", "s2mm_introut";
95189e3e0fbSXianjun Jiao			interrupt-parent = <1>;
95289e3e0fbSXianjun Jiao			interrupts = <0 35 4 0 36 4>;
95389e3e0fbSXianjun Jiao			reg = <0x80400000 0x10000>;
95489e3e0fbSXianjun Jiao			xlnx,addrwidth = <0x20>;
95589e3e0fbSXianjun Jiao			xlnx,include-sg ;
95689e3e0fbSXianjun Jiao			xlnx,sg-length-width = <0xe>;
95789e3e0fbSXianjun Jiao			dma-channel@80400000 {
95889e3e0fbSXianjun Jiao				compatible = "xlnx,axi-dma-mm2s-channel";
95989e3e0fbSXianjun Jiao				dma-channels = <0x1>;
96089e3e0fbSXianjun Jiao				interrupts = <0 35 4>;
96189e3e0fbSXianjun Jiao				xlnx,datawidth = <0x40>;
96289e3e0fbSXianjun Jiao				xlnx,device-id = <0x0>;
96389e3e0fbSXianjun Jiao			};
96489e3e0fbSXianjun Jiao			dma-channel@80400030 {
96589e3e0fbSXianjun Jiao				compatible = "xlnx,axi-dma-s2mm-channel";
96689e3e0fbSXianjun Jiao				dma-channels = <0x1>;
96789e3e0fbSXianjun Jiao				interrupts = <0 36 4>;
96889e3e0fbSXianjun Jiao				xlnx,datawidth = <0x40>;
96989e3e0fbSXianjun Jiao				xlnx,device-id = <0x0>;
97089e3e0fbSXianjun Jiao			};
97189e3e0fbSXianjun Jiao		};
97289e3e0fbSXianjun Jiao
97389e3e0fbSXianjun Jiao		rx_dma: dma@80410000 {
97489e3e0fbSXianjun Jiao			#dma-cells = <1>;
97589e3e0fbSXianjun Jiao			clock-names = "s_axi_lite_aclk", "m_axi_sg_aclk", "m_axi_mm2s_aclk", "m_axi_s2mm_aclk";
976*b73660adSXianjun Jiao			clocks = <0x2 0x11>, <0x2 0x11>, <0x2 0x11>, <0x2 0x11>;
97789e3e0fbSXianjun Jiao			compatible = "xlnx,axi-dma-1.00.a";
97889e3e0fbSXianjun Jiao			//dma-coherent ;
97989e3e0fbSXianjun Jiao			interrupt-names = "mm2s_introut", "s2mm_introut";
98089e3e0fbSXianjun Jiao			interrupt-parent = <1>;
98189e3e0fbSXianjun Jiao			interrupts = <0 31 4 0 32 4>;
98289e3e0fbSXianjun Jiao			reg = <0x80410000 0x10000>;
98389e3e0fbSXianjun Jiao			xlnx,addrwidth = <0x20>;
98489e3e0fbSXianjun Jiao			xlnx,include-sg ;
98589e3e0fbSXianjun Jiao			xlnx,sg-length-width = <0xe>;
98689e3e0fbSXianjun Jiao			dma-channel@80410000 {
98789e3e0fbSXianjun Jiao				compatible = "xlnx,axi-dma-mm2s-channel";
98889e3e0fbSXianjun Jiao				dma-channels = <0x1>;
98989e3e0fbSXianjun Jiao				interrupts = <0 31 4>;
99089e3e0fbSXianjun Jiao				xlnx,datawidth = <0x40>;
99189e3e0fbSXianjun Jiao				xlnx,device-id = <0x1>;
99289e3e0fbSXianjun Jiao			};
99389e3e0fbSXianjun Jiao			dma-channel@80410030 {
99489e3e0fbSXianjun Jiao				compatible = "xlnx,axi-dma-s2mm-channel";
99589e3e0fbSXianjun Jiao				dma-channels = <0x1>;
99689e3e0fbSXianjun Jiao				interrupts = <0 32 4>;
99789e3e0fbSXianjun Jiao				xlnx,datawidth = <0x40>;
99889e3e0fbSXianjun Jiao				xlnx,device-id = <0x1>;
99989e3e0fbSXianjun Jiao			};
100089e3e0fbSXianjun Jiao		};
100189e3e0fbSXianjun Jiao
100289e3e0fbSXianjun Jiao		tx_intf_0: tx_intf@83c00000 {
100389e3e0fbSXianjun Jiao			clock-names = "s00_axi_aclk", "s00_axis_aclk", "s01_axis_aclk", "m00_axis_aclk";
1004*b73660adSXianjun Jiao			clocks = <0x2 0x11>, <0x2 0x11>, <0x2 0x11>, <0x2 0x11>;
100589e3e0fbSXianjun Jiao			compatible = "sdr,tx_intf";
100689e3e0fbSXianjun Jiao			interrupt-names = "tx_itrpt0", "tx_itrpt1";
100789e3e0fbSXianjun Jiao			interrupt-parent = <1>;
100889e3e0fbSXianjun Jiao			interrupts = <0 33 1 0 34 1>;
100989e3e0fbSXianjun Jiao			reg = <0x83c00000 0x10000>;
101089e3e0fbSXianjun Jiao			xlnx,s00-axi-addr-width = <0x7>;
101189e3e0fbSXianjun Jiao			xlnx,s00-axi-data-width = <0x20>;
101289e3e0fbSXianjun Jiao		};
101389e3e0fbSXianjun Jiao
101489e3e0fbSXianjun Jiao		rx_intf_0: rx_intf@83c20000 {
101589e3e0fbSXianjun Jiao			clock-names = "s00_axi_aclk", "s00_axis_aclk", "m00_axis_aclk";
1016*b73660adSXianjun Jiao			clocks = <0x2 0x11>, <0x2 0x11>, <0x2 0x11>;
101789e3e0fbSXianjun Jiao			compatible = "sdr,rx_intf";
101889e3e0fbSXianjun Jiao			interrupt-names = "not_valid_anymore", "rx_pkt_intr";
101989e3e0fbSXianjun Jiao			interrupt-parent = <1>;
102089e3e0fbSXianjun Jiao			interrupts = <0 29 1 0 30 1>;
102189e3e0fbSXianjun Jiao			reg = <0x83c20000 0x10000>;
102289e3e0fbSXianjun Jiao			xlnx,s00-axi-addr-width = <0x7>;
102389e3e0fbSXianjun Jiao			xlnx,s00-axi-data-width = <0x20>;
102489e3e0fbSXianjun Jiao		};
102589e3e0fbSXianjun Jiao
102689e3e0fbSXianjun Jiao		openofdm_tx_0: openofdm_tx@83c10000 {
102789e3e0fbSXianjun Jiao			clock-names = "clk";
1028*b73660adSXianjun Jiao			clocks = <0x2 0x11>;
102989e3e0fbSXianjun Jiao			compatible = "sdr,openofdm_tx";
103089e3e0fbSXianjun Jiao			reg = <0x83c10000 0x10000>;
103189e3e0fbSXianjun Jiao		};
103289e3e0fbSXianjun Jiao
103389e3e0fbSXianjun Jiao		openofdm_rx_0: openofdm_rx@83c30000 {
103489e3e0fbSXianjun Jiao			clock-names = "clk";
1035*b73660adSXianjun Jiao			clocks = <0x2 0x11>;
103689e3e0fbSXianjun Jiao			compatible = "sdr,openofdm_rx";
103789e3e0fbSXianjun Jiao			reg = <0x83c30000 0x10000>;
103889e3e0fbSXianjun Jiao		};
103989e3e0fbSXianjun Jiao
104089e3e0fbSXianjun Jiao		xpu_0: xpu@83c40000 {
104189e3e0fbSXianjun Jiao			clock-names = "s00_axi_aclk";
1042*b73660adSXianjun Jiao			clocks = <0x2 0x11>;
104389e3e0fbSXianjun Jiao			compatible = "sdr,xpu";
104489e3e0fbSXianjun Jiao			reg = <0x83c40000 0x10000>;
104589e3e0fbSXianjun Jiao		};
104689e3e0fbSXianjun Jiao
104789e3e0fbSXianjun Jiao		cf-ad9361-lpc@79020000 {
104889e3e0fbSXianjun Jiao			compatible = "adi,axi-ad9361-6.00.a";
104989e3e0fbSXianjun Jiao			reg = <0x79020000 0x6000>;
105089e3e0fbSXianjun Jiao			dmas = <0x10 0x0>;
105189e3e0fbSXianjun Jiao			dma-names = "rx";
105289e3e0fbSXianjun Jiao			spibus-connected = <0x11>;
105389e3e0fbSXianjun Jiao		};
105489e3e0fbSXianjun Jiao
105589e3e0fbSXianjun Jiao		cf-ad9361-dds-core-lpc@79024000 {
105689e3e0fbSXianjun Jiao			compatible = "adi,axi-ad9361-dds-6.00.a";
105789e3e0fbSXianjun Jiao			reg = <0x79024000 0x1000>;
105889e3e0fbSXianjun Jiao			clocks = <0x11 0xd>;
105989e3e0fbSXianjun Jiao			clock-names = "sampl_clk";
106089e3e0fbSXianjun Jiao			dmas = <0x12 0x0>;
106189e3e0fbSXianjun Jiao			dma-names = "tx";
106289e3e0fbSXianjun Jiao			adi,axi-dds-rate = <0x1>;
106389e3e0fbSXianjun Jiao			adi,axi-dds-1-rf-channel;
106489e3e0fbSXianjun Jiao		};
106589e3e0fbSXianjun Jiao
106689e3e0fbSXianjun Jiao		mwipcore@43c00000 {
106789e3e0fbSXianjun Jiao			compatible = "mathworks,mwipcore-axi4lite-v1.00";
106889e3e0fbSXianjun Jiao			reg = <0x43c00000 0xffff>;
106989e3e0fbSXianjun Jiao		};
107089e3e0fbSXianjun Jiao	};
107189e3e0fbSXianjun Jiao
107289e3e0fbSXianjun Jiao	audio_clock {
107389e3e0fbSXianjun Jiao		compatible = "fixed-clock";
107489e3e0fbSXianjun Jiao		#clock-cells = <0x0>;
107589e3e0fbSXianjun Jiao		clock-frequency = <0xbb8000>;
107689e3e0fbSXianjun Jiao		linux,phandle = <0xf>;
107789e3e0fbSXianjun Jiao		phandle = <0xf>;
107889e3e0fbSXianjun Jiao	};
107989e3e0fbSXianjun Jiao
108089e3e0fbSXianjun Jiao	adv7511_hdmi_snd {
108189e3e0fbSXianjun Jiao		compatible = "simple-audio-card";
108289e3e0fbSXianjun Jiao		simple-audio-card,name = "HDMI monitor";
108389e3e0fbSXianjun Jiao		simple-audio-card,widgets = "Speaker", "Speaker";
108489e3e0fbSXianjun Jiao		simple-audio-card,routing = "Speaker", "TX";
108589e3e0fbSXianjun Jiao
108689e3e0fbSXianjun Jiao		simple-audio-card,dai-link@0 {
108789e3e0fbSXianjun Jiao			format = "spdif";
108889e3e0fbSXianjun Jiao
108989e3e0fbSXianjun Jiao			cpu {
109089e3e0fbSXianjun Jiao				sound-dai = <0x13>;
109189e3e0fbSXianjun Jiao				frame-master;
109289e3e0fbSXianjun Jiao				bitclock-master;
109389e3e0fbSXianjun Jiao			};
109489e3e0fbSXianjun Jiao
109589e3e0fbSXianjun Jiao			codec {
109689e3e0fbSXianjun Jiao				sound-dai = <0x14>;
109789e3e0fbSXianjun Jiao			};
109889e3e0fbSXianjun Jiao		};
109989e3e0fbSXianjun Jiao	};
110089e3e0fbSXianjun Jiao
110189e3e0fbSXianjun Jiao	clocks {
110289e3e0fbSXianjun Jiao
110389e3e0fbSXianjun Jiao		clock@0 {
110489e3e0fbSXianjun Jiao			#clock-cells = <0x0>;
110589e3e0fbSXianjun Jiao			compatible = "fixed-clock";
110689e3e0fbSXianjun Jiao			clock-frequency = <0x2625a00>;
110789e3e0fbSXianjun Jiao			clock-output-names = "ad9361_ext_refclk";
110889e3e0fbSXianjun Jiao			linux,phandle = <0x5>;
110989e3e0fbSXianjun Jiao			phandle = <0x5>;
111089e3e0fbSXianjun Jiao		};
111189e3e0fbSXianjun Jiao
111289e3e0fbSXianjun Jiao		clock@1 {
111389e3e0fbSXianjun Jiao			#clock-cells = <0x0>;
111489e3e0fbSXianjun Jiao			compatible = "fixed-clock";
111589e3e0fbSXianjun Jiao			clock-frequency = <0x17d7840>;
111689e3e0fbSXianjun Jiao			clock-output-names = "refclk";
111789e3e0fbSXianjun Jiao			linux,phandle = <0x7>;
111889e3e0fbSXianjun Jiao			phandle = <0x7>;
111989e3e0fbSXianjun Jiao		};
112089e3e0fbSXianjun Jiao	};
112189e3e0fbSXianjun Jiao};
1122