xref: /openwifi/kernel_boot/boards/zc706_fmcs2/devicetree.dts (revision 89e3e0fbdab78538b43e6492287ee2afd4e86b52)
1*89e3e0fbSXianjun Jiao/dts-v1/;
2*89e3e0fbSXianjun Jiao
3*89e3e0fbSXianjun Jiao/ {
4*89e3e0fbSXianjun Jiao	#address-cells = <0x1>;
5*89e3e0fbSXianjun Jiao	#size-cells = <0x1>;
6*89e3e0fbSXianjun Jiao	compatible = "xlnx,zynq-7000";
7*89e3e0fbSXianjun Jiao	interrupt-parent = <0x1>;
8*89e3e0fbSXianjun Jiao	model = "Xilinx Zynq ZC706";
9*89e3e0fbSXianjun Jiao
10*89e3e0fbSXianjun Jiao	cpus {
11*89e3e0fbSXianjun Jiao		#address-cells = <0x1>;
12*89e3e0fbSXianjun Jiao		#size-cells = <0x0>;
13*89e3e0fbSXianjun Jiao
14*89e3e0fbSXianjun Jiao		cpu@0 {
15*89e3e0fbSXianjun Jiao			compatible = "arm,cortex-a9";
16*89e3e0fbSXianjun Jiao			device_type = "cpu";
17*89e3e0fbSXianjun Jiao			reg = <0x0>;
18*89e3e0fbSXianjun Jiao			clocks = <0x2 0x3>;
19*89e3e0fbSXianjun Jiao			clock-latency = <0x3e8>;
20*89e3e0fbSXianjun Jiao			cpu0-supply = <0x3>;
21*89e3e0fbSXianjun Jiao			operating-points = <0xa2c2b 0xf4240 0x51616 0xf4240>;
22*89e3e0fbSXianjun Jiao		};
23*89e3e0fbSXianjun Jiao
24*89e3e0fbSXianjun Jiao		cpu@1 {
25*89e3e0fbSXianjun Jiao			compatible = "arm,cortex-a9";
26*89e3e0fbSXianjun Jiao			device_type = "cpu";
27*89e3e0fbSXianjun Jiao			reg = <0x1>;
28*89e3e0fbSXianjun Jiao			clocks = <0x2 0x3>;
29*89e3e0fbSXianjun Jiao		};
30*89e3e0fbSXianjun Jiao	};
31*89e3e0fbSXianjun Jiao
32*89e3e0fbSXianjun Jiao	fpga-full {
33*89e3e0fbSXianjun Jiao		compatible = "fpga-region";
34*89e3e0fbSXianjun Jiao		fpga-mgr = <0x4>;
35*89e3e0fbSXianjun Jiao		#address-cells = <0x1>;
36*89e3e0fbSXianjun Jiao		#size-cells = <0x1>;
37*89e3e0fbSXianjun Jiao		ranges;
38*89e3e0fbSXianjun Jiao	};
39*89e3e0fbSXianjun Jiao
40*89e3e0fbSXianjun Jiao	pmu@f8891000 {
41*89e3e0fbSXianjun Jiao		compatible = "arm,cortex-a9-pmu";
42*89e3e0fbSXianjun Jiao		interrupts = <0x0 0x5 0x4 0x0 0x6 0x4>;
43*89e3e0fbSXianjun Jiao		interrupt-parent = <0x1>;
44*89e3e0fbSXianjun Jiao		reg = <0xf8891000 0x1000 0xf8893000 0x1000>;
45*89e3e0fbSXianjun Jiao	};
46*89e3e0fbSXianjun Jiao
47*89e3e0fbSXianjun Jiao	fixedregulator {
48*89e3e0fbSXianjun Jiao		compatible = "regulator-fixed";
49*89e3e0fbSXianjun Jiao		regulator-name = "VCCPINT";
50*89e3e0fbSXianjun Jiao		regulator-min-microvolt = <0xf4240>;
51*89e3e0fbSXianjun Jiao		regulator-max-microvolt = <0xf4240>;
52*89e3e0fbSXianjun Jiao		regulator-boot-on;
53*89e3e0fbSXianjun Jiao		regulator-always-on;
54*89e3e0fbSXianjun Jiao		linux,phandle = <0x3>;
55*89e3e0fbSXianjun Jiao		phandle = <0x3>;
56*89e3e0fbSXianjun Jiao	};
57*89e3e0fbSXianjun Jiao
58*89e3e0fbSXianjun Jiao	amba {
59*89e3e0fbSXianjun Jiao		u-boot,dm-pre-reloc;
60*89e3e0fbSXianjun Jiao		compatible = "simple-bus";
61*89e3e0fbSXianjun Jiao		#address-cells = <0x1>;
62*89e3e0fbSXianjun Jiao		#size-cells = <0x1>;
63*89e3e0fbSXianjun Jiao		interrupt-parent = <0x1>;
64*89e3e0fbSXianjun Jiao		ranges;
65*89e3e0fbSXianjun Jiao
66*89e3e0fbSXianjun Jiao		adc@f8007100 {
67*89e3e0fbSXianjun Jiao			compatible = "xlnx,zynq-xadc-1.00.a";
68*89e3e0fbSXianjun Jiao			reg = <0xf8007100 0x20>;
69*89e3e0fbSXianjun Jiao			interrupts = <0x0 0x7 0x4>;
70*89e3e0fbSXianjun Jiao			interrupt-parent = <0x1>;
71*89e3e0fbSXianjun Jiao			clocks = <0x2 0xc>;
72*89e3e0fbSXianjun Jiao		};
73*89e3e0fbSXianjun Jiao
74*89e3e0fbSXianjun Jiao		can@e0008000 {
75*89e3e0fbSXianjun Jiao			compatible = "xlnx,zynq-can-1.0";
76*89e3e0fbSXianjun Jiao			status = "disabled";
77*89e3e0fbSXianjun Jiao			clocks = <0x2 0x13 0x2 0x24>;
78*89e3e0fbSXianjun Jiao			clock-names = "can_clk", "pclk";
79*89e3e0fbSXianjun Jiao			reg = <0xe0008000 0x1000>;
80*89e3e0fbSXianjun Jiao			interrupts = <0x0 0x1c 0x4>;
81*89e3e0fbSXianjun Jiao			interrupt-parent = <0x1>;
82*89e3e0fbSXianjun Jiao			tx-fifo-depth = <0x40>;
83*89e3e0fbSXianjun Jiao			rx-fifo-depth = <0x40>;
84*89e3e0fbSXianjun Jiao		};
85*89e3e0fbSXianjun Jiao
86*89e3e0fbSXianjun Jiao		can@e0009000 {
87*89e3e0fbSXianjun Jiao			compatible = "xlnx,zynq-can-1.0";
88*89e3e0fbSXianjun Jiao			status = "disabled";
89*89e3e0fbSXianjun Jiao			clocks = <0x2 0x14 0x2 0x25>;
90*89e3e0fbSXianjun Jiao			clock-names = "can_clk", "pclk";
91*89e3e0fbSXianjun Jiao			reg = <0xe0009000 0x1000>;
92*89e3e0fbSXianjun Jiao			interrupts = <0x0 0x33 0x4>;
93*89e3e0fbSXianjun Jiao			interrupt-parent = <0x1>;
94*89e3e0fbSXianjun Jiao			tx-fifo-depth = <0x40>;
95*89e3e0fbSXianjun Jiao			rx-fifo-depth = <0x40>;
96*89e3e0fbSXianjun Jiao		};
97*89e3e0fbSXianjun Jiao
98*89e3e0fbSXianjun Jiao		gpio@e000a000 {
99*89e3e0fbSXianjun Jiao			compatible = "xlnx,zynq-gpio-1.0";
100*89e3e0fbSXianjun Jiao			#gpio-cells = <0x2>;
101*89e3e0fbSXianjun Jiao			clocks = <0x2 0x2a>;
102*89e3e0fbSXianjun Jiao			gpio-controller;
103*89e3e0fbSXianjun Jiao			interrupt-controller;
104*89e3e0fbSXianjun Jiao			#interrupt-cells = <0x2>;
105*89e3e0fbSXianjun Jiao			interrupt-parent = <0x1>;
106*89e3e0fbSXianjun Jiao			interrupts = <0x0 0x14 0x4>;
107*89e3e0fbSXianjun Jiao			reg = <0xe000a000 0x1000>;
108*89e3e0fbSXianjun Jiao			linux,phandle = <0x6>;
109*89e3e0fbSXianjun Jiao			phandle = <0x6>;
110*89e3e0fbSXianjun Jiao		};
111*89e3e0fbSXianjun Jiao
112*89e3e0fbSXianjun Jiao		i2c@e0004000 {
113*89e3e0fbSXianjun Jiao			compatible = "cdns,i2c-r1p10";
114*89e3e0fbSXianjun Jiao			status = "disabled";
115*89e3e0fbSXianjun Jiao			clocks = <0x2 0x26>;
116*89e3e0fbSXianjun Jiao			interrupt-parent = <0x1>;
117*89e3e0fbSXianjun Jiao			interrupts = <0x0 0x19 0x4>;
118*89e3e0fbSXianjun Jiao			reg = <0xe0004000 0x1000>;
119*89e3e0fbSXianjun Jiao			#address-cells = <0x1>;
120*89e3e0fbSXianjun Jiao			#size-cells = <0x0>;
121*89e3e0fbSXianjun Jiao		};
122*89e3e0fbSXianjun Jiao
123*89e3e0fbSXianjun Jiao		i2c@e0005000 {
124*89e3e0fbSXianjun Jiao			compatible = "cdns,i2c-r1p10";
125*89e3e0fbSXianjun Jiao			status = "disabled";
126*89e3e0fbSXianjun Jiao			clocks = <0x2 0x27>;
127*89e3e0fbSXianjun Jiao			interrupt-parent = <0x1>;
128*89e3e0fbSXianjun Jiao			interrupts = <0x0 0x30 0x4>;
129*89e3e0fbSXianjun Jiao			reg = <0xe0005000 0x1000>;
130*89e3e0fbSXianjun Jiao			#address-cells = <0x1>;
131*89e3e0fbSXianjun Jiao			#size-cells = <0x0>;
132*89e3e0fbSXianjun Jiao		};
133*89e3e0fbSXianjun Jiao
134*89e3e0fbSXianjun Jiao		interrupt-controller@f8f01000 {
135*89e3e0fbSXianjun Jiao			compatible = "arm,cortex-a9-gic";
136*89e3e0fbSXianjun Jiao			#interrupt-cells = <0x3>;
137*89e3e0fbSXianjun Jiao			interrupt-controller;
138*89e3e0fbSXianjun Jiao			reg = <0xf8f01000 0x1000 0xf8f00100 0x100>;
139*89e3e0fbSXianjun Jiao			linux,phandle = <0x1>;
140*89e3e0fbSXianjun Jiao			phandle = <0x1>;
141*89e3e0fbSXianjun Jiao		};
142*89e3e0fbSXianjun Jiao
143*89e3e0fbSXianjun Jiao		cache-controller@f8f02000 {
144*89e3e0fbSXianjun Jiao			compatible = "arm,pl310-cache";
145*89e3e0fbSXianjun Jiao			reg = <0xf8f02000 0x1000>;
146*89e3e0fbSXianjun Jiao			interrupts = <0x0 0x2 0x4>;
147*89e3e0fbSXianjun Jiao			arm,data-latency = <0x3 0x2 0x2>;
148*89e3e0fbSXianjun Jiao			arm,tag-latency = <0x2 0x2 0x2>;
149*89e3e0fbSXianjun Jiao			cache-unified;
150*89e3e0fbSXianjun Jiao			cache-level = <0x2>;
151*89e3e0fbSXianjun Jiao		};
152*89e3e0fbSXianjun Jiao
153*89e3e0fbSXianjun Jiao		memory-controller@f8006000 {
154*89e3e0fbSXianjun Jiao			compatible = "xlnx,zynq-ddrc-a05";
155*89e3e0fbSXianjun Jiao			reg = <0xf8006000 0x1000>;
156*89e3e0fbSXianjun Jiao		};
157*89e3e0fbSXianjun Jiao
158*89e3e0fbSXianjun Jiao		ocmc@f800c000 {
159*89e3e0fbSXianjun Jiao			compatible = "xlnx,zynq-ocmc-1.0";
160*89e3e0fbSXianjun Jiao			interrupt-parent = <0x1>;
161*89e3e0fbSXianjun Jiao			interrupts = <0x0 0x3 0x4>;
162*89e3e0fbSXianjun Jiao			reg = <0xf800c000 0x1000>;
163*89e3e0fbSXianjun Jiao		};
164*89e3e0fbSXianjun Jiao
165*89e3e0fbSXianjun Jiao		serial@e0000000 {
166*89e3e0fbSXianjun Jiao			compatible = "xlnx,xuartps", "cdns,uart-r1p8";
167*89e3e0fbSXianjun Jiao			status = "disabled";
168*89e3e0fbSXianjun Jiao			clocks = <0x2 0x17 0x2 0x28>;
169*89e3e0fbSXianjun Jiao			clock-names = "uart_clk", "pclk";
170*89e3e0fbSXianjun Jiao			reg = <0xe0000000 0x1000>;
171*89e3e0fbSXianjun Jiao			interrupts = <0x0 0x1b 0x4>;
172*89e3e0fbSXianjun Jiao		};
173*89e3e0fbSXianjun Jiao
174*89e3e0fbSXianjun Jiao		serial@e0001000 {
175*89e3e0fbSXianjun Jiao			compatible = "xlnx,xuartps", "cdns,uart-r1p8";
176*89e3e0fbSXianjun Jiao			status = "okay";
177*89e3e0fbSXianjun Jiao			clocks = <0x2 0x18 0x2 0x29>;
178*89e3e0fbSXianjun Jiao			clock-names = "uart_clk", "pclk";
179*89e3e0fbSXianjun Jiao			reg = <0xe0001000 0x1000>;
180*89e3e0fbSXianjun Jiao			interrupts = <0x0 0x32 0x4>;
181*89e3e0fbSXianjun Jiao		};
182*89e3e0fbSXianjun Jiao
183*89e3e0fbSXianjun Jiao		spi@e0006000 {
184*89e3e0fbSXianjun Jiao			compatible = "xlnx,zynq-spi-r1p6";
185*89e3e0fbSXianjun Jiao			reg = <0xe0006000 0x1000>;
186*89e3e0fbSXianjun Jiao			status = "okay";
187*89e3e0fbSXianjun Jiao			interrupt-parent = <0x1>;
188*89e3e0fbSXianjun Jiao			interrupts = <0x0 0x1a 0x4>;
189*89e3e0fbSXianjun Jiao			clocks = <0x2 0x19 0x2 0x22>;
190*89e3e0fbSXianjun Jiao			clock-names = "ref_clk", "pclk";
191*89e3e0fbSXianjun Jiao			#address-cells = <0x1>;
192*89e3e0fbSXianjun Jiao			#size-cells = <0x0>;
193*89e3e0fbSXianjun Jiao
194*89e3e0fbSXianjun Jiao			ad9361-phy@0 {
195*89e3e0fbSXianjun Jiao				#address-cells = <0x1>;
196*89e3e0fbSXianjun Jiao				#size-cells = <0x0>;
197*89e3e0fbSXianjun Jiao				#clock-cells = <0x1>;
198*89e3e0fbSXianjun Jiao				compatible = "adi,ad9361";
199*89e3e0fbSXianjun Jiao				reg = <0x0>;
200*89e3e0fbSXianjun Jiao				spi-cpha;
201*89e3e0fbSXianjun Jiao				spi-max-frequency = <0x989680>;
202*89e3e0fbSXianjun Jiao				clocks = <0x5 0x0>;
203*89e3e0fbSXianjun Jiao				clock-names = "ad9361_ext_refclk";
204*89e3e0fbSXianjun Jiao				clock-output-names = "rx_sampl_clk", "tx_sampl_clk";
205*89e3e0fbSXianjun Jiao				adi,digital-interface-tune-skip-mode = <0x0>;
206*89e3e0fbSXianjun Jiao				adi,pp-tx-swap-enable;
207*89e3e0fbSXianjun Jiao				adi,pp-rx-swap-enable;
208*89e3e0fbSXianjun Jiao				adi,rx-frame-pulse-mode-enable;
209*89e3e0fbSXianjun Jiao				adi,lvds-mode-enable;
210*89e3e0fbSXianjun Jiao				adi,lvds-bias-mV = <0x96>;
211*89e3e0fbSXianjun Jiao				adi,lvds-rx-onchip-termination-enable;
212*89e3e0fbSXianjun Jiao				adi,rx-data-delay = <0x4>;
213*89e3e0fbSXianjun Jiao				adi,tx-fb-clock-delay = <0x7>;
214*89e3e0fbSXianjun Jiao				adi,dcxo-coarse-and-fine-tune = <0x8 0x1720>;
215*89e3e0fbSXianjun Jiao				adi,2rx-2tx-mode-enable;
216*89e3e0fbSXianjun Jiao				adi,frequency-division-duplex-mode-enable;
217*89e3e0fbSXianjun Jiao				adi,rx-rf-port-input-select = <0x0>;
218*89e3e0fbSXianjun Jiao				adi,tx-rf-port-input-select = <0x0>;
219*89e3e0fbSXianjun Jiao				adi,tx-attenuation-mdB = <0x2710>;
220*89e3e0fbSXianjun Jiao				adi,rf-rx-bandwidth-hz = <0x112a880>;
221*89e3e0fbSXianjun Jiao				adi,rf-tx-bandwidth-hz = <0x112a880>;
222*89e3e0fbSXianjun Jiao				adi,rx-synthesizer-frequency-hz = <0x0 0x8f0d1800>;
223*89e3e0fbSXianjun Jiao				adi,tx-synthesizer-frequency-hz = <0x0 0x92080880>;
224*89e3e0fbSXianjun Jiao				adi,rx-path-clock-frequencies = <0x3a980000 0xea60000 0x7530000 0x3a98000 0x1d4c000 0x1d4c000>;
225*89e3e0fbSXianjun Jiao				adi,tx-path-clock-frequencies = <0x3a980000 0x7530000 0x7530000 0x3a98000 0x1d4c000 0x1d4c000>;
226*89e3e0fbSXianjun Jiao				adi,gc-rx1-mode = <0x2>;
227*89e3e0fbSXianjun Jiao				adi,gc-rx2-mode = <0x2>;
228*89e3e0fbSXianjun Jiao				adi,gc-adc-ovr-sample-size = <0x4>;
229*89e3e0fbSXianjun Jiao				adi,gc-adc-small-overload-thresh = <0x2f>;
230*89e3e0fbSXianjun Jiao				adi,gc-adc-large-overload-thresh = <0x3a>;
231*89e3e0fbSXianjun Jiao				adi,gc-lmt-overload-high-thresh = <0x320>;
232*89e3e0fbSXianjun Jiao				adi,gc-lmt-overload-low-thresh = <0x2c0>;
233*89e3e0fbSXianjun Jiao				adi,gc-dec-pow-measurement-duration = <0x2000>;
234*89e3e0fbSXianjun Jiao				adi,gc-low-power-thresh = <0x18>;
235*89e3e0fbSXianjun Jiao				adi,mgc-inc-gain-step = <0x2>;
236*89e3e0fbSXianjun Jiao				adi,mgc-dec-gain-step = <0x2>;
237*89e3e0fbSXianjun Jiao				adi,mgc-split-table-ctrl-inp-gain-mode = <0x0>;
238*89e3e0fbSXianjun Jiao				adi,agc-attack-delay-extra-margin-us = <0x1>;
239*89e3e0fbSXianjun Jiao				adi,agc-outer-thresh-high = <0x5>;
240*89e3e0fbSXianjun Jiao				adi,agc-outer-thresh-high-dec-steps = <0x2>;
241*89e3e0fbSXianjun Jiao				adi,agc-inner-thresh-high = <0xa>;
242*89e3e0fbSXianjun Jiao				adi,agc-inner-thresh-high-dec-steps = <0x1>;
243*89e3e0fbSXianjun Jiao				adi,agc-inner-thresh-low = <0xc>;
244*89e3e0fbSXianjun Jiao				adi,agc-inner-thresh-low-inc-steps = <0x1>;
245*89e3e0fbSXianjun Jiao				adi,agc-outer-thresh-low = <0x12>;
246*89e3e0fbSXianjun Jiao				adi,agc-outer-thresh-low-inc-steps = <0x2>;
247*89e3e0fbSXianjun Jiao				adi,agc-adc-small-overload-exceed-counter = <0xa>;
248*89e3e0fbSXianjun Jiao				adi,agc-adc-large-overload-exceed-counter = <0xa>;
249*89e3e0fbSXianjun Jiao				adi,agc-adc-large-overload-inc-steps = <0x2>;
250*89e3e0fbSXianjun Jiao				adi,agc-lmt-overload-large-exceed-counter = <0xa>;
251*89e3e0fbSXianjun Jiao				adi,agc-lmt-overload-small-exceed-counter = <0xa>;
252*89e3e0fbSXianjun Jiao				adi,agc-lmt-overload-large-inc-steps = <0x2>;
253*89e3e0fbSXianjun Jiao				adi,agc-gain-update-interval-us = <0x3e8>;
254*89e3e0fbSXianjun Jiao				adi,fagc-dec-pow-measurement-duration = <0x40>;
255*89e3e0fbSXianjun Jiao				adi,fagc-lp-thresh-increment-steps = <0x1>;
256*89e3e0fbSXianjun Jiao				adi,fagc-lp-thresh-increment-time = <0x5>;
257*89e3e0fbSXianjun Jiao				adi,fagc-energy-lost-stronger-sig-gain-lock-exit-cnt = <0x8>;
258*89e3e0fbSXianjun Jiao				adi,fagc-final-overrange-count = <0x3>;
259*89e3e0fbSXianjun Jiao				adi,fagc-gain-index-type-after-exit-rx-mode = <0x0>;
260*89e3e0fbSXianjun Jiao				adi,fagc-lmt-final-settling-steps = <0x1>;
261*89e3e0fbSXianjun Jiao				adi,fagc-lock-level = <0xa>;
262*89e3e0fbSXianjun Jiao				adi,fagc-lock-level-gain-increase-upper-limit = <0x5>;
263*89e3e0fbSXianjun Jiao				adi,fagc-lock-level-lmt-gain-increase-enable;
264*89e3e0fbSXianjun Jiao				adi,fagc-lpf-final-settling-steps = <0x1>;
265*89e3e0fbSXianjun Jiao				adi,fagc-optimized-gain-offset = <0x5>;
266*89e3e0fbSXianjun Jiao				adi,fagc-power-measurement-duration-in-state5 = <0x40>;
267*89e3e0fbSXianjun Jiao				adi,fagc-rst-gla-engergy-lost-goto-optim-gain-enable;
268*89e3e0fbSXianjun Jiao				adi,fagc-rst-gla-engergy-lost-sig-thresh-below-ll = <0xa>;
269*89e3e0fbSXianjun Jiao				adi,fagc-rst-gla-engergy-lost-sig-thresh-exceeded-enable;
270*89e3e0fbSXianjun Jiao				adi,fagc-rst-gla-if-en-agc-pulled-high-mode = <0x0>;
271*89e3e0fbSXianjun Jiao				adi,fagc-rst-gla-large-adc-overload-enable;
272*89e3e0fbSXianjun Jiao				adi,fagc-rst-gla-large-lmt-overload-enable;
273*89e3e0fbSXianjun Jiao				adi,fagc-rst-gla-stronger-sig-thresh-above-ll = <0xa>;
274*89e3e0fbSXianjun Jiao				adi,fagc-rst-gla-stronger-sig-thresh-exceeded-enable;
275*89e3e0fbSXianjun Jiao				adi,fagc-state-wait-time-ns = <0x104>;
276*89e3e0fbSXianjun Jiao				adi,fagc-use-last-lock-level-for-set-gain-enable;
277*89e3e0fbSXianjun Jiao				adi,rssi-restart-mode = <0x3>;
278*89e3e0fbSXianjun Jiao				adi,rssi-delay = <0x1>;
279*89e3e0fbSXianjun Jiao				adi,rssi-wait = <0x1>;
280*89e3e0fbSXianjun Jiao				adi,rssi-duration = <0x3e8>;
281*89e3e0fbSXianjun Jiao				adi,ctrl-outs-index = <0x0>;
282*89e3e0fbSXianjun Jiao				adi,ctrl-outs-enable-mask = <0xff>;
283*89e3e0fbSXianjun Jiao				adi,temp-sense-measurement-interval-ms = <0x3e8>;
284*89e3e0fbSXianjun Jiao				adi,temp-sense-offset-signed = <0xce>;
285*89e3e0fbSXianjun Jiao				adi,temp-sense-periodic-measurement-enable;
286*89e3e0fbSXianjun Jiao				adi,aux-dac-manual-mode-enable;
287*89e3e0fbSXianjun Jiao				adi,aux-dac1-default-value-mV = <0x0>;
288*89e3e0fbSXianjun Jiao				adi,aux-dac1-rx-delay-us = <0x0>;
289*89e3e0fbSXianjun Jiao				adi,aux-dac1-tx-delay-us = <0x0>;
290*89e3e0fbSXianjun Jiao				adi,aux-dac2-default-value-mV = <0x0>;
291*89e3e0fbSXianjun Jiao				adi,aux-dac2-rx-delay-us = <0x0>;
292*89e3e0fbSXianjun Jiao				adi,aux-dac2-tx-delay-us = <0x0>;
293*89e3e0fbSXianjun Jiao				en_agc-gpios = <0x6 0x62 0x0>;
294*89e3e0fbSXianjun Jiao				sync-gpios = <0x6 0x63 0x0>;
295*89e3e0fbSXianjun Jiao				reset-gpios = <0x6 0x64 0x0>;
296*89e3e0fbSXianjun Jiao				enable-gpios = <0x6 0x65 0x0>;
297*89e3e0fbSXianjun Jiao				txnrx-gpios = <0x6 0x66 0x0>;
298*89e3e0fbSXianjun Jiao				linux,phandle = <0x11>;
299*89e3e0fbSXianjun Jiao				phandle = <0x11>;
300*89e3e0fbSXianjun Jiao			};
301*89e3e0fbSXianjun Jiao		};
302*89e3e0fbSXianjun Jiao
303*89e3e0fbSXianjun Jiao		spi@e0007000 {
304*89e3e0fbSXianjun Jiao			compatible = "xlnx,zynq-spi-r1p6";
305*89e3e0fbSXianjun Jiao			reg = <0xe0007000 0x1000>;
306*89e3e0fbSXianjun Jiao			status = "okay";
307*89e3e0fbSXianjun Jiao			interrupt-parent = <0x1>;
308*89e3e0fbSXianjun Jiao			interrupts = <0x0 0x31 0x4>;
309*89e3e0fbSXianjun Jiao			clocks = <0x2 0x1a 0x2 0x23>;
310*89e3e0fbSXianjun Jiao			clock-names = "ref_clk", "pclk";
311*89e3e0fbSXianjun Jiao			#address-cells = <0x1>;
312*89e3e0fbSXianjun Jiao			#size-cells = <0x0>;
313*89e3e0fbSXianjun Jiao
314*89e3e0fbSXianjun Jiao			adf4351-udc-tx-pmod@0 {
315*89e3e0fbSXianjun Jiao				#address-cells = <0x1>;
316*89e3e0fbSXianjun Jiao				#size-cells = <0x0>;
317*89e3e0fbSXianjun Jiao				compatible = "adi,adf4351";
318*89e3e0fbSXianjun Jiao				reg = <0x0>;
319*89e3e0fbSXianjun Jiao				spi-max-frequency = <0x989680>;
320*89e3e0fbSXianjun Jiao				clocks = <0x7>;
321*89e3e0fbSXianjun Jiao				clock-names = "clkin";
322*89e3e0fbSXianjun Jiao				adi,channel-spacing = <0xf4240>;
323*89e3e0fbSXianjun Jiao				adi,power-up-frequency = <0x160dc080>;
324*89e3e0fbSXianjun Jiao				adi,phase-detector-polarity-positive-enable;
325*89e3e0fbSXianjun Jiao				adi,charge-pump-current = <0x9c4>;
326*89e3e0fbSXianjun Jiao				adi,output-power = <0x3>;
327*89e3e0fbSXianjun Jiao				adi,mute-till-lock-enable;
328*89e3e0fbSXianjun Jiao				adi,muxout-select = <0x6>;
329*89e3e0fbSXianjun Jiao				gpios = <0x6 0x68 0x0>;
330*89e3e0fbSXianjun Jiao			};
331*89e3e0fbSXianjun Jiao
332*89e3e0fbSXianjun Jiao			adf4351-udc-rx-pmod@1 {
333*89e3e0fbSXianjun Jiao				#address-cells = <0x1>;
334*89e3e0fbSXianjun Jiao				#size-cells = <0x0>;
335*89e3e0fbSXianjun Jiao				compatible = "adi,adf4351";
336*89e3e0fbSXianjun Jiao				reg = <0x1>;
337*89e3e0fbSXianjun Jiao				spi-max-frequency = <0x989680>;
338*89e3e0fbSXianjun Jiao				clocks = <0x7>;
339*89e3e0fbSXianjun Jiao				clock-names = "clkin";
340*89e3e0fbSXianjun Jiao				adi,channel-spacing = <0xf4240>;
341*89e3e0fbSXianjun Jiao				adi,power-up-frequency = <0x1443fd00>;
342*89e3e0fbSXianjun Jiao				adi,phase-detector-polarity-positive-enable;
343*89e3e0fbSXianjun Jiao				adi,charge-pump-current = <0x9c4>;
344*89e3e0fbSXianjun Jiao				adi,output-power = <0x3>;
345*89e3e0fbSXianjun Jiao				adi,mute-till-lock-enable;
346*89e3e0fbSXianjun Jiao				adi,muxout-select = <0x6>;
347*89e3e0fbSXianjun Jiao				gpios = <0x6 0x67 0x0>;
348*89e3e0fbSXianjun Jiao			};
349*89e3e0fbSXianjun Jiao		};
350*89e3e0fbSXianjun Jiao
351*89e3e0fbSXianjun Jiao		spi@e000d000 {
352*89e3e0fbSXianjun Jiao			clock-names = "ref_clk", "pclk";
353*89e3e0fbSXianjun Jiao			clocks = <0x2 0xa 0x2 0x2b>;
354*89e3e0fbSXianjun Jiao			compatible = "xlnx,zynq-qspi-1.0";
355*89e3e0fbSXianjun Jiao			status = "okay";
356*89e3e0fbSXianjun Jiao			interrupt-parent = <0x1>;
357*89e3e0fbSXianjun Jiao			interrupts = <0x0 0x13 0x4>;
358*89e3e0fbSXianjun Jiao			reg = <0xe000d000 0x1000>;
359*89e3e0fbSXianjun Jiao			#address-cells = <0x1>;
360*89e3e0fbSXianjun Jiao			#size-cells = <0x0>;
361*89e3e0fbSXianjun Jiao			is-dual = <0x1>;
362*89e3e0fbSXianjun Jiao			num-cs = <0x1>;
363*89e3e0fbSXianjun Jiao
364*89e3e0fbSXianjun Jiao			ps7-qspi@0 {
365*89e3e0fbSXianjun Jiao				#address-cells = <0x1>;
366*89e3e0fbSXianjun Jiao				#size-cells = <0x1>;
367*89e3e0fbSXianjun Jiao				spi-tx-bus-width = <0x1>;
368*89e3e0fbSXianjun Jiao				spi-rx-bus-width = <0x4>;
369*89e3e0fbSXianjun Jiao				compatible = "n25q128a11";
370*89e3e0fbSXianjun Jiao				reg = <0x0>;
371*89e3e0fbSXianjun Jiao				spi-max-frequency = <0x2faf080>;
372*89e3e0fbSXianjun Jiao
373*89e3e0fbSXianjun Jiao				partition@0 {
374*89e3e0fbSXianjun Jiao					label = "boot";
375*89e3e0fbSXianjun Jiao					reg = <0x0 0x500000>;
376*89e3e0fbSXianjun Jiao				};
377*89e3e0fbSXianjun Jiao
378*89e3e0fbSXianjun Jiao				partition@500000 {
379*89e3e0fbSXianjun Jiao					label = "bootenv";
380*89e3e0fbSXianjun Jiao					reg = <0x500000 0x20000>;
381*89e3e0fbSXianjun Jiao				};
382*89e3e0fbSXianjun Jiao
383*89e3e0fbSXianjun Jiao				partition@520000 {
384*89e3e0fbSXianjun Jiao					label = "config";
385*89e3e0fbSXianjun Jiao					reg = <0x520000 0x20000>;
386*89e3e0fbSXianjun Jiao				};
387*89e3e0fbSXianjun Jiao
388*89e3e0fbSXianjun Jiao				partition@540000 {
389*89e3e0fbSXianjun Jiao					label = "image";
390*89e3e0fbSXianjun Jiao					reg = <0x540000 0xa80000>;
391*89e3e0fbSXianjun Jiao				};
392*89e3e0fbSXianjun Jiao
393*89e3e0fbSXianjun Jiao				partition@fc0000 {
394*89e3e0fbSXianjun Jiao					label = "spare";
395*89e3e0fbSXianjun Jiao					reg = <0xfc0000 0x0>;
396*89e3e0fbSXianjun Jiao				};
397*89e3e0fbSXianjun Jiao			};
398*89e3e0fbSXianjun Jiao		};
399*89e3e0fbSXianjun Jiao
400*89e3e0fbSXianjun Jiao		memory-controller@e000e000 {
401*89e3e0fbSXianjun Jiao			#address-cells = <0x1>;
402*89e3e0fbSXianjun Jiao			#size-cells = <0x1>;
403*89e3e0fbSXianjun Jiao			status = "disabled";
404*89e3e0fbSXianjun Jiao			clock-names = "memclk", "aclk";
405*89e3e0fbSXianjun Jiao			clocks = <0x2 0xb 0x2 0x2c>;
406*89e3e0fbSXianjun Jiao			compatible = "arm,pl353-smc-r2p1";
407*89e3e0fbSXianjun Jiao			interrupt-parent = <0x1>;
408*89e3e0fbSXianjun Jiao			interrupts = <0x0 0x12 0x4>;
409*89e3e0fbSXianjun Jiao			ranges;
410*89e3e0fbSXianjun Jiao			reg = <0xe000e000 0x1000>;
411*89e3e0fbSXianjun Jiao
412*89e3e0fbSXianjun Jiao			flash@e1000000 {
413*89e3e0fbSXianjun Jiao				status = "disabled";
414*89e3e0fbSXianjun Jiao				compatible = "arm,pl353-nand-r2p1";
415*89e3e0fbSXianjun Jiao				reg = <0xe1000000 0x1000000>;
416*89e3e0fbSXianjun Jiao				#address-cells = <0x1>;
417*89e3e0fbSXianjun Jiao				#size-cells = <0x1>;
418*89e3e0fbSXianjun Jiao			};
419*89e3e0fbSXianjun Jiao
420*89e3e0fbSXianjun Jiao			flash@e2000000 {
421*89e3e0fbSXianjun Jiao				status = "disabled";
422*89e3e0fbSXianjun Jiao				compatible = "cfi-flash";
423*89e3e0fbSXianjun Jiao				reg = <0xe2000000 0x2000000>;
424*89e3e0fbSXianjun Jiao				#address-cells = <0x1>;
425*89e3e0fbSXianjun Jiao				#size-cells = <0x1>;
426*89e3e0fbSXianjun Jiao			};
427*89e3e0fbSXianjun Jiao		};
428*89e3e0fbSXianjun Jiao
429*89e3e0fbSXianjun Jiao		ethernet@e000b000 {
430*89e3e0fbSXianjun Jiao			compatible = "cdns,zynq-gem", "cdns,gem";
431*89e3e0fbSXianjun Jiao			reg = <0xe000b000 0x1000>;
432*89e3e0fbSXianjun Jiao			status = "okay";
433*89e3e0fbSXianjun Jiao			interrupts = <0x0 0x16 0x4>;
434*89e3e0fbSXianjun Jiao			clocks = <0x2 0x1e 0x2 0x1e 0x2 0xd>;
435*89e3e0fbSXianjun Jiao			clock-names = "pclk", "hclk", "tx_clk";
436*89e3e0fbSXianjun Jiao			#address-cells = <0x1>;
437*89e3e0fbSXianjun Jiao			#size-cells = <0x0>;
438*89e3e0fbSXianjun Jiao			phy-handle = <0x8>;
439*89e3e0fbSXianjun Jiao			phy-mode = "rgmii-id";
440*89e3e0fbSXianjun Jiao
441*89e3e0fbSXianjun Jiao			phy@7 {
442*89e3e0fbSXianjun Jiao				device_type = "ethernet-phy";
443*89e3e0fbSXianjun Jiao				reg = <0x7>;
444*89e3e0fbSXianjun Jiao				linux,phandle = <0x8>;
445*89e3e0fbSXianjun Jiao				phandle = <0x8>;
446*89e3e0fbSXianjun Jiao			};
447*89e3e0fbSXianjun Jiao		};
448*89e3e0fbSXianjun Jiao
449*89e3e0fbSXianjun Jiao		ethernet@e000c000 {
450*89e3e0fbSXianjun Jiao			compatible = "cdns,zynq-gem", "cdns,gem";
451*89e3e0fbSXianjun Jiao			reg = <0xe000c000 0x1000>;
452*89e3e0fbSXianjun Jiao			status = "disabled";
453*89e3e0fbSXianjun Jiao			interrupts = <0x0 0x2d 0x4>;
454*89e3e0fbSXianjun Jiao			clocks = <0x2 0x1f 0x2 0x1f 0x2 0xe>;
455*89e3e0fbSXianjun Jiao			clock-names = "pclk", "hclk", "tx_clk";
456*89e3e0fbSXianjun Jiao			#address-cells = <0x1>;
457*89e3e0fbSXianjun Jiao			#size-cells = <0x0>;
458*89e3e0fbSXianjun Jiao		};
459*89e3e0fbSXianjun Jiao
460*89e3e0fbSXianjun Jiao		sdhci@e0100000 {
461*89e3e0fbSXianjun Jiao			compatible = "arasan,sdhci-8.9a";
462*89e3e0fbSXianjun Jiao			status = "okay";
463*89e3e0fbSXianjun Jiao			clock-names = "clk_xin", "clk_ahb";
464*89e3e0fbSXianjun Jiao			clocks = <0x2 0x15 0x2 0x20>;
465*89e3e0fbSXianjun Jiao			interrupt-parent = <0x1>;
466*89e3e0fbSXianjun Jiao			interrupts = <0x0 0x18 0x4>;
467*89e3e0fbSXianjun Jiao			reg = <0xe0100000 0x1000>;
468*89e3e0fbSXianjun Jiao			broken-adma2;
469*89e3e0fbSXianjun Jiao		};
470*89e3e0fbSXianjun Jiao
471*89e3e0fbSXianjun Jiao		sdhci@e0101000 {
472*89e3e0fbSXianjun Jiao			compatible = "arasan,sdhci-8.9a";
473*89e3e0fbSXianjun Jiao			status = "disabled";
474*89e3e0fbSXianjun Jiao			clock-names = "clk_xin", "clk_ahb";
475*89e3e0fbSXianjun Jiao			clocks = <0x2 0x16 0x2 0x21>;
476*89e3e0fbSXianjun Jiao			interrupt-parent = <0x1>;
477*89e3e0fbSXianjun Jiao			interrupts = <0x0 0x2f 0x4>;
478*89e3e0fbSXianjun Jiao			reg = <0xe0101000 0x1000>;
479*89e3e0fbSXianjun Jiao			broken-adma2;
480*89e3e0fbSXianjun Jiao		};
481*89e3e0fbSXianjun Jiao
482*89e3e0fbSXianjun Jiao		slcr@f8000000 {
483*89e3e0fbSXianjun Jiao			#address-cells = <0x1>;
484*89e3e0fbSXianjun Jiao			#size-cells = <0x1>;
485*89e3e0fbSXianjun Jiao			compatible = "xlnx,zynq-slcr", "syscon", "simple-mfd";
486*89e3e0fbSXianjun Jiao			reg = <0xf8000000 0x1000>;
487*89e3e0fbSXianjun Jiao			ranges;
488*89e3e0fbSXianjun Jiao			linux,phandle = <0x9>;
489*89e3e0fbSXianjun Jiao			phandle = <0x9>;
490*89e3e0fbSXianjun Jiao
491*89e3e0fbSXianjun Jiao			clkc@100 {
492*89e3e0fbSXianjun Jiao				#clock-cells = <0x1>;
493*89e3e0fbSXianjun Jiao				compatible = "xlnx,ps7-clkc";
494*89e3e0fbSXianjun Jiao				fclk-enable = <0xf>;
495*89e3e0fbSXianjun Jiao				clock-output-names = "armpll", "ddrpll", "iopll", "cpu_6or4x", "cpu_3or2x", "cpu_2x", "cpu_1x", "ddr2x", "ddr3x", "dci", "lqspi", "smc", "pcap", "gem0", "gem1", "fclk0", "fclk1", "fclk2", "fclk3", "can0", "can1", "sdio0", "sdio1", "uart0", "uart1", "spi0", "spi1", "dma", "usb0_aper", "usb1_aper", "gem0_aper", "gem1_aper", "sdio0_aper", "sdio1_aper", "spi0_aper", "spi1_aper", "can0_aper", "can1_aper", "i2c0_aper", "i2c1_aper", "uart0_aper", "uart1_aper", "gpio_aper", "lqspi_aper", "smc_aper", "swdt", "dbg_trc", "dbg_apb";
496*89e3e0fbSXianjun Jiao				reg = <0x100 0x100>;
497*89e3e0fbSXianjun Jiao				ps-clk-frequency = <0x1fca055>;
498*89e3e0fbSXianjun Jiao				linux,phandle = <0x2>;
499*89e3e0fbSXianjun Jiao				phandle = <0x2>;
500*89e3e0fbSXianjun Jiao			};
501*89e3e0fbSXianjun Jiao
502*89e3e0fbSXianjun Jiao			rstc@200 {
503*89e3e0fbSXianjun Jiao				compatible = "xlnx,zynq-reset";
504*89e3e0fbSXianjun Jiao				reg = <0x200 0x48>;
505*89e3e0fbSXianjun Jiao				#reset-cells = <0x1>;
506*89e3e0fbSXianjun Jiao				syscon = <0x9>;
507*89e3e0fbSXianjun Jiao			};
508*89e3e0fbSXianjun Jiao
509*89e3e0fbSXianjun Jiao			pinctrl@700 {
510*89e3e0fbSXianjun Jiao				compatible = "xlnx,pinctrl-zynq";
511*89e3e0fbSXianjun Jiao				reg = <0x700 0x200>;
512*89e3e0fbSXianjun Jiao				syscon = <0x9>;
513*89e3e0fbSXianjun Jiao			};
514*89e3e0fbSXianjun Jiao		};
515*89e3e0fbSXianjun Jiao
516*89e3e0fbSXianjun Jiao		dmac@f8003000 {
517*89e3e0fbSXianjun Jiao			compatible = "arm,pl330", "arm,primecell";
518*89e3e0fbSXianjun Jiao			reg = <0xf8003000 0x1000>;
519*89e3e0fbSXianjun Jiao			interrupt-parent = <0x1>;
520*89e3e0fbSXianjun Jiao			interrupt-names = "abort", "dma0", "dma1", "dma2", "dma3", "dma4", "dma5", "dma6", "dma7";
521*89e3e0fbSXianjun Jiao			interrupts = <0x0 0xd 0x4 0x0 0xe 0x4 0x0 0xf 0x4 0x0 0x10 0x4 0x0 0x11 0x4 0x0 0x28 0x4 0x0 0x29 0x4 0x0 0x2a 0x4 0x0 0x2b 0x4>;
522*89e3e0fbSXianjun Jiao			#dma-cells = <0x1>;
523*89e3e0fbSXianjun Jiao			#dma-channels = <0x8>;
524*89e3e0fbSXianjun Jiao			#dma-requests = <0x4>;
525*89e3e0fbSXianjun Jiao			clocks = <0x2 0x1b>;
526*89e3e0fbSXianjun Jiao			clock-names = "apb_pclk";
527*89e3e0fbSXianjun Jiao			linux,phandle = <0xe>;
528*89e3e0fbSXianjun Jiao			phandle = <0xe>;
529*89e3e0fbSXianjun Jiao		};
530*89e3e0fbSXianjun Jiao
531*89e3e0fbSXianjun Jiao		devcfg@f8007000 {
532*89e3e0fbSXianjun Jiao			compatible = "xlnx,zynq-devcfg-1.0";
533*89e3e0fbSXianjun Jiao			interrupt-parent = <0x1>;
534*89e3e0fbSXianjun Jiao			interrupts = <0x0 0x8 0x4>;
535*89e3e0fbSXianjun Jiao			reg = <0xf8007000 0x100>;
536*89e3e0fbSXianjun Jiao			clocks = <0x2 0xc 0x2 0xf 0x2 0x10 0x2 0x11 0x2 0x12>;
537*89e3e0fbSXianjun Jiao			clock-names = "ref_clk", "fclk0", "fclk1", "fclk2", "fclk3";
538*89e3e0fbSXianjun Jiao			syscon = <0x9>;
539*89e3e0fbSXianjun Jiao			linux,phandle = <0x4>;
540*89e3e0fbSXianjun Jiao			phandle = <0x4>;
541*89e3e0fbSXianjun Jiao		};
542*89e3e0fbSXianjun Jiao
543*89e3e0fbSXianjun Jiao		efuse@f800d000 {
544*89e3e0fbSXianjun Jiao			compatible = "xlnx,zynq-efuse";
545*89e3e0fbSXianjun Jiao			reg = <0xf800d000 0x20>;
546*89e3e0fbSXianjun Jiao		};
547*89e3e0fbSXianjun Jiao
548*89e3e0fbSXianjun Jiao		timer@f8f00200 {
549*89e3e0fbSXianjun Jiao			compatible = "arm,cortex-a9-global-timer";
550*89e3e0fbSXianjun Jiao			reg = <0xf8f00200 0x20>;
551*89e3e0fbSXianjun Jiao			interrupts = <0x1 0xb 0x301>;
552*89e3e0fbSXianjun Jiao			interrupt-parent = <0x1>;
553*89e3e0fbSXianjun Jiao			clocks = <0x2 0x4>;
554*89e3e0fbSXianjun Jiao		};
555*89e3e0fbSXianjun Jiao
556*89e3e0fbSXianjun Jiao		timer@f8001000 {
557*89e3e0fbSXianjun Jiao			interrupt-parent = <0x1>;
558*89e3e0fbSXianjun Jiao			interrupts = <0x0 0xa 0x4 0x0 0xb 0x4 0x0 0xc 0x4>;
559*89e3e0fbSXianjun Jiao			compatible = "cdns,ttc";
560*89e3e0fbSXianjun Jiao			clocks = <0x2 0x6>;
561*89e3e0fbSXianjun Jiao			reg = <0xf8001000 0x1000>;
562*89e3e0fbSXianjun Jiao		};
563*89e3e0fbSXianjun Jiao
564*89e3e0fbSXianjun Jiao		timer@f8002000 {
565*89e3e0fbSXianjun Jiao			interrupt-parent = <0x1>;
566*89e3e0fbSXianjun Jiao			interrupts = <0x0 0x25 0x4 0x0 0x26 0x4 0x0 0x27 0x4>;
567*89e3e0fbSXianjun Jiao			compatible = "cdns,ttc";
568*89e3e0fbSXianjun Jiao			clocks = <0x2 0x6>;
569*89e3e0fbSXianjun Jiao			reg = <0xf8002000 0x1000>;
570*89e3e0fbSXianjun Jiao		};
571*89e3e0fbSXianjun Jiao
572*89e3e0fbSXianjun Jiao		timer@f8f00600 {
573*89e3e0fbSXianjun Jiao			interrupt-parent = <0x1>;
574*89e3e0fbSXianjun Jiao			interrupts = <0x1 0xd 0x301>;
575*89e3e0fbSXianjun Jiao			compatible = "arm,cortex-a9-twd-timer";
576*89e3e0fbSXianjun Jiao			reg = <0xf8f00600 0x20>;
577*89e3e0fbSXianjun Jiao			clocks = <0x2 0x4>;
578*89e3e0fbSXianjun Jiao		};
579*89e3e0fbSXianjun Jiao
580*89e3e0fbSXianjun Jiao		usb@e0002000 {
581*89e3e0fbSXianjun Jiao			compatible = "xlnx,zynq-usb-2.20a", "chipidea,usb2";
582*89e3e0fbSXianjun Jiao			status = "okay";
583*89e3e0fbSXianjun Jiao			clocks = <0x2 0x1c>;
584*89e3e0fbSXianjun Jiao			interrupt-parent = <0x1>;
585*89e3e0fbSXianjun Jiao			interrupts = <0x0 0x15 0x4>;
586*89e3e0fbSXianjun Jiao			reg = <0xe0002000 0x1000>;
587*89e3e0fbSXianjun Jiao			phy_type = "ulpi";
588*89e3e0fbSXianjun Jiao			dr_mode = "host";
589*89e3e0fbSXianjun Jiao			xlnx,phy-reset-gpio = <0x6 0x7 0x0>;
590*89e3e0fbSXianjun Jiao		};
591*89e3e0fbSXianjun Jiao
592*89e3e0fbSXianjun Jiao		usb@e0003000 {
593*89e3e0fbSXianjun Jiao			compatible = "xlnx,zynq-usb-2.20a", "chipidea,usb2";
594*89e3e0fbSXianjun Jiao			status = "disabled";
595*89e3e0fbSXianjun Jiao			clocks = <0x2 0x1d>;
596*89e3e0fbSXianjun Jiao			interrupt-parent = <0x1>;
597*89e3e0fbSXianjun Jiao			interrupts = <0x0 0x2c 0x4>;
598*89e3e0fbSXianjun Jiao			reg = <0xe0003000 0x1000>;
599*89e3e0fbSXianjun Jiao			phy_type = "ulpi";
600*89e3e0fbSXianjun Jiao		};
601*89e3e0fbSXianjun Jiao
602*89e3e0fbSXianjun Jiao		watchdog@f8005000 {
603*89e3e0fbSXianjun Jiao			clocks = <0x2 0x2d>;
604*89e3e0fbSXianjun Jiao			compatible = "cdns,wdt-r1p2";
605*89e3e0fbSXianjun Jiao			interrupt-parent = <0x1>;
606*89e3e0fbSXianjun Jiao			interrupts = <0x0 0x9 0x1>;
607*89e3e0fbSXianjun Jiao			reg = <0xf8005000 0x1000>;
608*89e3e0fbSXianjun Jiao			timeout-sec = <0xa>;
609*89e3e0fbSXianjun Jiao		};
610*89e3e0fbSXianjun Jiao	};
611*89e3e0fbSXianjun Jiao
612*89e3e0fbSXianjun Jiao	aliases {
613*89e3e0fbSXianjun Jiao		ethernet0 = "/amba/ethernet@e000b000";
614*89e3e0fbSXianjun Jiao		serial0 = "/amba/serial@e0001000";
615*89e3e0fbSXianjun Jiao	};
616*89e3e0fbSXianjun Jiao
617*89e3e0fbSXianjun Jiao	memory {
618*89e3e0fbSXianjun Jiao		device_type = "memory";
619*89e3e0fbSXianjun Jiao		reg = <0x0 0x40000000>;
620*89e3e0fbSXianjun Jiao	};
621*89e3e0fbSXianjun Jiao
622*89e3e0fbSXianjun Jiao	chosen {
623*89e3e0fbSXianjun Jiao		bootargs = "console=ttyPS0,115200 root=/dev/mmcblk0p2 rw earlyprintk rootfstype=ext4 rootwait";
624*89e3e0fbSXianjun Jiao		linux,stdout-path = "/amba@0/uart@E0001000";
625*89e3e0fbSXianjun Jiao	};
626*89e3e0fbSXianjun Jiao
627*89e3e0fbSXianjun Jiao	leds {
628*89e3e0fbSXianjun Jiao		compatible = "gpio-leds";
629*89e3e0fbSXianjun Jiao
630*89e3e0fbSXianjun Jiao		ds8 {
631*89e3e0fbSXianjun Jiao			label = "ds12:green";
632*89e3e0fbSXianjun Jiao			gpios = <0x6 0x3d 0x0>;
633*89e3e0fbSXianjun Jiao			//gpios = <0x6 7 0x0>;//according to zc706 board, do not know why real gpio_bd[7] here becomes 0x3d
634*89e3e0fbSXianjun Jiao			default-state = "off";
635*89e3e0fbSXianjun Jiao		};
636*89e3e0fbSXianjun Jiao
637*89e3e0fbSXianjun Jiao		ds9 {
638*89e3e0fbSXianjun Jiao			label = "ds15:green";
639*89e3e0fbSXianjun Jiao			gpios = <0x6 0x3e 0x0>;
640*89e3e0fbSXianjun Jiao			//gpios = <0x6 8 0x0>;//according to zc706 board, do not know why real gpio_bd[7] here becomes 0x3e
641*89e3e0fbSXianjun Jiao			default-state = "off";
642*89e3e0fbSXianjun Jiao		};
643*89e3e0fbSXianjun Jiao
644*89e3e0fbSXianjun Jiao		ds10 {
645*89e3e0fbSXianjun Jiao			label = "ds16:green";
646*89e3e0fbSXianjun Jiao			gpios = <0x6 0x3f 0x0>;
647*89e3e0fbSXianjun Jiao			//gpios = <0x6 9 0x0>;//according to zc706 board, do not know why real gpio_bd[7] here becomes 0x3f
648*89e3e0fbSXianjun Jiao			default-state = "off";
649*89e3e0fbSXianjun Jiao		};
650*89e3e0fbSXianjun Jiao
651*89e3e0fbSXianjun Jiao		ds35 {
652*89e3e0fbSXianjun Jiao			label = "ds17:green";
653*89e3e0fbSXianjun Jiao			gpios = <0x6 0x40 0x0>;
654*89e3e0fbSXianjun Jiao			//gpios = <0x6 10 0x0>;//according to zc706 board, do not know why real gpio_bd[7] here becomes 0x40
655*89e3e0fbSXianjun Jiao			default-state = "on";
656*89e3e0fbSXianjun Jiao		};
657*89e3e0fbSXianjun Jiao	};
658*89e3e0fbSXianjun Jiao
659*89e3e0fbSXianjun Jiao	gpio_keys {
660*89e3e0fbSXianjun Jiao		compatible = "gpio-keys";
661*89e3e0fbSXianjun Jiao		#address-cells = <0x1>;
662*89e3e0fbSXianjun Jiao		#size-cells = <0x0>;
663*89e3e0fbSXianjun Jiao		autorepeat;
664*89e3e0fbSXianjun Jiao
665*89e3e0fbSXianjun Jiao		sw7 {
666*89e3e0fbSXianjun Jiao			label = "Left";
667*89e3e0fbSXianjun Jiao			linux,code = <0x69>;
668*89e3e0fbSXianjun Jiao			gpios = <0x6 0x3a 0x0>;
669*89e3e0fbSXianjun Jiao		};
670*89e3e0fbSXianjun Jiao
671*89e3e0fbSXianjun Jiao		sw8 {
672*89e3e0fbSXianjun Jiao			label = "Right";
673*89e3e0fbSXianjun Jiao			linux,code = <0x6a>;
674*89e3e0fbSXianjun Jiao			gpios = <0x6 0x3c 0x0>;
675*89e3e0fbSXianjun Jiao		};
676*89e3e0fbSXianjun Jiao
677*89e3e0fbSXianjun Jiao		sw9 {
678*89e3e0fbSXianjun Jiao			label = "Select";
679*89e3e0fbSXianjun Jiao			linux,code = <0x1c>;
680*89e3e0fbSXianjun Jiao			gpios = <0x6 0x3b 0x0>;
681*89e3e0fbSXianjun Jiao		};
682*89e3e0fbSXianjun Jiao	};
683*89e3e0fbSXianjun Jiao
684*89e3e0fbSXianjun Jiao	fpga-axi@0 {
685*89e3e0fbSXianjun Jiao		compatible = "simple-bus";
686*89e3e0fbSXianjun Jiao		#address-cells = <0x1>;
687*89e3e0fbSXianjun Jiao		#size-cells = <0x1>;
688*89e3e0fbSXianjun Jiao		ranges;
689*89e3e0fbSXianjun Jiao
690*89e3e0fbSXianjun Jiao		i2c@41600000 {
691*89e3e0fbSXianjun Jiao			compatible = "xlnx,axi-iic-1.02.a", "xlnx,xps-iic-2.00.a";
692*89e3e0fbSXianjun Jiao			reg = <0x41600000 0x10000>;
693*89e3e0fbSXianjun Jiao			interrupt-parent = <0x1>;
694*89e3e0fbSXianjun Jiao			interrupts = <0x0 0x3a 0x4>;
695*89e3e0fbSXianjun Jiao			clocks = <0x2 0xf>;
696*89e3e0fbSXianjun Jiao			clock-names = "pclk";
697*89e3e0fbSXianjun Jiao			#address-cells = <0x1>;
698*89e3e0fbSXianjun Jiao			#size-cells = <0x0>;
699*89e3e0fbSXianjun Jiao
700*89e3e0fbSXianjun Jiao			i2cswitch@74 {
701*89e3e0fbSXianjun Jiao				compatible = "nxp,pca9548";
702*89e3e0fbSXianjun Jiao				#address-cells = <0x1>;
703*89e3e0fbSXianjun Jiao				#size-cells = <0x0>;
704*89e3e0fbSXianjun Jiao				reg = <0x74>;
705*89e3e0fbSXianjun Jiao
706*89e3e0fbSXianjun Jiao				i2c@0 {
707*89e3e0fbSXianjun Jiao					#address-cells = <0x1>;
708*89e3e0fbSXianjun Jiao					#size-cells = <0x0>;
709*89e3e0fbSXianjun Jiao					reg = <0x0>;
710*89e3e0fbSXianjun Jiao
711*89e3e0fbSXianjun Jiao					osc@5d {
712*89e3e0fbSXianjun Jiao						compatible = "si570";
713*89e3e0fbSXianjun Jiao						temperature-stability = <0x32>;
714*89e3e0fbSXianjun Jiao						reg = <0x5d>;
715*89e3e0fbSXianjun Jiao						factory-fout = <0x9502f90>;
716*89e3e0fbSXianjun Jiao						initial-fout = <0x8d9ee20>;
717*89e3e0fbSXianjun Jiao					};
718*89e3e0fbSXianjun Jiao				};
719*89e3e0fbSXianjun Jiao
720*89e3e0fbSXianjun Jiao				i2c@1 {
721*89e3e0fbSXianjun Jiao					#address-cells = <0x1>;
722*89e3e0fbSXianjun Jiao					#size-cells = <0x0>;
723*89e3e0fbSXianjun Jiao					reg = <0x1>;
724*89e3e0fbSXianjun Jiao
725*89e3e0fbSXianjun Jiao					adv7511 {
726*89e3e0fbSXianjun Jiao						compatible = "adi,adv7511";
727*89e3e0fbSXianjun Jiao						reg = <0x39 0x3f>;
728*89e3e0fbSXianjun Jiao						reg-names = "primary", "edid";
729*89e3e0fbSXianjun Jiao						adi,input-depth = <0x8>;
730*89e3e0fbSXianjun Jiao						adi,input-colorspace = "rgb";
731*89e3e0fbSXianjun Jiao						adi,input-clock = "1x";
732*89e3e0fbSXianjun Jiao						adi,clock-delay = <0x0>;
733*89e3e0fbSXianjun Jiao						#sound-dai-cells = <0x0>;
734*89e3e0fbSXianjun Jiao						linux,phandle = <0x14>;
735*89e3e0fbSXianjun Jiao						phandle = <0x14>;
736*89e3e0fbSXianjun Jiao
737*89e3e0fbSXianjun Jiao						ports {
738*89e3e0fbSXianjun Jiao							#address-cells = <0x1>;
739*89e3e0fbSXianjun Jiao							#size-cells = <0x0>;
740*89e3e0fbSXianjun Jiao
741*89e3e0fbSXianjun Jiao							port@0 {
742*89e3e0fbSXianjun Jiao								reg = <0x0>;
743*89e3e0fbSXianjun Jiao
744*89e3e0fbSXianjun Jiao								endpoint {
745*89e3e0fbSXianjun Jiao									remote-endpoint = <0xa>;
746*89e3e0fbSXianjun Jiao									linux,phandle = <0xd>;
747*89e3e0fbSXianjun Jiao									phandle = <0xd>;
748*89e3e0fbSXianjun Jiao								};
749*89e3e0fbSXianjun Jiao							};
750*89e3e0fbSXianjun Jiao
751*89e3e0fbSXianjun Jiao							port@1 {
752*89e3e0fbSXianjun Jiao								reg = <0x1>;
753*89e3e0fbSXianjun Jiao							};
754*89e3e0fbSXianjun Jiao						};
755*89e3e0fbSXianjun Jiao					};
756*89e3e0fbSXianjun Jiao				};
757*89e3e0fbSXianjun Jiao
758*89e3e0fbSXianjun Jiao				i2c@2 {
759*89e3e0fbSXianjun Jiao					#address-cells = <0x1>;
760*89e3e0fbSXianjun Jiao					#size-cells = <0x0>;
761*89e3e0fbSXianjun Jiao					reg = <0x2>;
762*89e3e0fbSXianjun Jiao
763*89e3e0fbSXianjun Jiao					eeprom@54 {
764*89e3e0fbSXianjun Jiao						compatible = "at,24c08";
765*89e3e0fbSXianjun Jiao						reg = <0x54>;
766*89e3e0fbSXianjun Jiao					};
767*89e3e0fbSXianjun Jiao				};
768*89e3e0fbSXianjun Jiao
769*89e3e0fbSXianjun Jiao				i2c@3 {
770*89e3e0fbSXianjun Jiao					#address-cells = <0x1>;
771*89e3e0fbSXianjun Jiao					#size-cells = <0x0>;
772*89e3e0fbSXianjun Jiao					reg = <0x3>;
773*89e3e0fbSXianjun Jiao
774*89e3e0fbSXianjun Jiao					gpio@21 {
775*89e3e0fbSXianjun Jiao						compatible = "ti,tca6416";
776*89e3e0fbSXianjun Jiao						reg = <0x21>;
777*89e3e0fbSXianjun Jiao						gpio-controller;
778*89e3e0fbSXianjun Jiao						#gpio-cells = <0x2>;
779*89e3e0fbSXianjun Jiao					};
780*89e3e0fbSXianjun Jiao				};
781*89e3e0fbSXianjun Jiao
782*89e3e0fbSXianjun Jiao				i2c@4 {
783*89e3e0fbSXianjun Jiao					#address-cells = <0x1>;
784*89e3e0fbSXianjun Jiao					#size-cells = <0x0>;
785*89e3e0fbSXianjun Jiao					reg = <0x4>;
786*89e3e0fbSXianjun Jiao
787*89e3e0fbSXianjun Jiao					rtc@54 {
788*89e3e0fbSXianjun Jiao						compatible = "nxp,pcf8563";
789*89e3e0fbSXianjun Jiao						reg = <0x51>;
790*89e3e0fbSXianjun Jiao					};
791*89e3e0fbSXianjun Jiao				};
792*89e3e0fbSXianjun Jiao
793*89e3e0fbSXianjun Jiao				i2c@6 {
794*89e3e0fbSXianjun Jiao					#size-cells = <0x0>;
795*89e3e0fbSXianjun Jiao					#address-cells = <0x1>;
796*89e3e0fbSXianjun Jiao					reg = <0x6>;
797*89e3e0fbSXianjun Jiao
798*89e3e0fbSXianjun Jiao					ad7291@2f {
799*89e3e0fbSXianjun Jiao						compatible = "adi,ad7291";
800*89e3e0fbSXianjun Jiao						reg = <0x2f>;
801*89e3e0fbSXianjun Jiao					};
802*89e3e0fbSXianjun Jiao
803*89e3e0fbSXianjun Jiao					eeprom@50 {
804*89e3e0fbSXianjun Jiao						compatible = "at24,24c02";
805*89e3e0fbSXianjun Jiao						reg = <0x50>;
806*89e3e0fbSXianjun Jiao					};
807*89e3e0fbSXianjun Jiao				};
808*89e3e0fbSXianjun Jiao			};
809*89e3e0fbSXianjun Jiao		};
810*89e3e0fbSXianjun Jiao
811*89e3e0fbSXianjun Jiao		axivdma@43000000 {
812*89e3e0fbSXianjun Jiao			#address-cells = <0x1>;
813*89e3e0fbSXianjun Jiao			#size-cells = <0x1>;
814*89e3e0fbSXianjun Jiao			#dma-cells = <0x1>;
815*89e3e0fbSXianjun Jiao			clock-names = "s_axi_lite_aclk", "m_axi_mm2s_aclk", "m_axi_mm2s_aclk";
816*89e3e0fbSXianjun Jiao			clocks = <2 15>, <2 15>, <2 15>;
817*89e3e0fbSXianjun Jiao			compatible = "xlnx,axi-vdma-1.00.a";
818*89e3e0fbSXianjun Jiao			interrupt-names = "mm2s_introut";
819*89e3e0fbSXianjun Jiao			interrupt-parent = <1>;
820*89e3e0fbSXianjun Jiao			interrupts = <0 59 4>;
821*89e3e0fbSXianjun Jiao			reg = <0x43000000 0x1000>;
822*89e3e0fbSXianjun Jiao			xlnx,addrwidth = <0x20>;
823*89e3e0fbSXianjun Jiao			xlnx,flush-fsync = <0x1>;
824*89e3e0fbSXianjun Jiao			xlnx,num-fstores = <0x3>;
825*89e3e0fbSXianjun Jiao			linux,phandle = <0xb>;
826*89e3e0fbSXianjun Jiao			phandle = <0xb>;
827*89e3e0fbSXianjun Jiao
828*89e3e0fbSXianjun Jiao			dma-channel@43000000 {
829*89e3e0fbSXianjun Jiao				compatible = "xlnx,axi-vdma-mm2s-channel";
830*89e3e0fbSXianjun Jiao				interrupts = <0 59 4>;
831*89e3e0fbSXianjun Jiao				xlnx,datawidth = <0x40>;
832*89e3e0fbSXianjun Jiao				xlnx,device-id = <0x0>;
833*89e3e0fbSXianjun Jiao				xlnx,genlock-mode ;
834*89e3e0fbSXianjun Jiao				xlnx,include-dre = <0x0>;
835*89e3e0fbSXianjun Jiao			};
836*89e3e0fbSXianjun Jiao		};
837*89e3e0fbSXianjun Jiao
838*89e3e0fbSXianjun Jiao		axi-clkgen@79000000 {
839*89e3e0fbSXianjun Jiao			compatible = "adi,axi-clkgen-2.00.a";
840*89e3e0fbSXianjun Jiao			reg = <0x79000000 0x10000>;
841*89e3e0fbSXianjun Jiao			#clock-cells = <0x0>;
842*89e3e0fbSXianjun Jiao			clocks = <0x2 0x10>;
843*89e3e0fbSXianjun Jiao			linux,phandle = <0xc>;
844*89e3e0fbSXianjun Jiao			phandle = <0xc>;
845*89e3e0fbSXianjun Jiao		};
846*89e3e0fbSXianjun Jiao
847*89e3e0fbSXianjun Jiao		axi_hdmi@70e00000 {
848*89e3e0fbSXianjun Jiao			compatible = "adi,axi-hdmi-tx-1.00.a";
849*89e3e0fbSXianjun Jiao			reg = <0x70e00000 0x10000>;
850*89e3e0fbSXianjun Jiao			dmas = <0xb 0x0>;
851*89e3e0fbSXianjun Jiao			dma-names = "video";
852*89e3e0fbSXianjun Jiao			clocks = <0xc>;
853*89e3e0fbSXianjun Jiao			adi,is-rgb;
854*89e3e0fbSXianjun Jiao
855*89e3e0fbSXianjun Jiao			port {
856*89e3e0fbSXianjun Jiao
857*89e3e0fbSXianjun Jiao				endpoint {
858*89e3e0fbSXianjun Jiao					remote-endpoint = <0xd>;
859*89e3e0fbSXianjun Jiao					linux,phandle = <0xa>;
860*89e3e0fbSXianjun Jiao					phandle = <0xa>;
861*89e3e0fbSXianjun Jiao				};
862*89e3e0fbSXianjun Jiao			};
863*89e3e0fbSXianjun Jiao		};
864*89e3e0fbSXianjun Jiao
865*89e3e0fbSXianjun Jiao		axi-spdif-tx@75c00000 {
866*89e3e0fbSXianjun Jiao			compatible = "adi,axi-spdif-tx-1.00.a";
867*89e3e0fbSXianjun Jiao			reg = <0x75c00000 0x1000>;
868*89e3e0fbSXianjun Jiao			dmas = <0xe 0x0>;
869*89e3e0fbSXianjun Jiao			dma-names = "tx";
870*89e3e0fbSXianjun Jiao			clocks = <0x2 0xf 0xf>;
871*89e3e0fbSXianjun Jiao			clock-names = "axi", "ref";
872*89e3e0fbSXianjun Jiao			#sound-dai-cells = <0x0>;
873*89e3e0fbSXianjun Jiao			linux,phandle = <0x13>;
874*89e3e0fbSXianjun Jiao			phandle = <0x13>;
875*89e3e0fbSXianjun Jiao		};
876*89e3e0fbSXianjun Jiao
877*89e3e0fbSXianjun Jiao		dma@7c400000 {
878*89e3e0fbSXianjun Jiao			compatible = "adi,axi-dmac-1.00.a";
879*89e3e0fbSXianjun Jiao			reg = <0x7c400000 0x10000>;
880*89e3e0fbSXianjun Jiao			#dma-cells = <0x1>;
881*89e3e0fbSXianjun Jiao			interrupts = <0 57 4>;
882*89e3e0fbSXianjun Jiao			clocks = <0x2 0xf 0xf>;
883*89e3e0fbSXianjun Jiao			linux,phandle = <0x10>;
884*89e3e0fbSXianjun Jiao			phandle = <0x10>;
885*89e3e0fbSXianjun Jiao
886*89e3e0fbSXianjun Jiao			adi,channels {
887*89e3e0fbSXianjun Jiao				#size-cells = <0x0>;
888*89e3e0fbSXianjun Jiao				#address-cells = <0x1>;
889*89e3e0fbSXianjun Jiao
890*89e3e0fbSXianjun Jiao				dma-channel@0 {
891*89e3e0fbSXianjun Jiao					reg = <0x0>;
892*89e3e0fbSXianjun Jiao					adi,source-bus-width = <0x40>;
893*89e3e0fbSXianjun Jiao					adi,source-bus-type = <0x2>;
894*89e3e0fbSXianjun Jiao					adi,destination-bus-width = <0x40>;
895*89e3e0fbSXianjun Jiao					adi,destination-bus-type = <0x0>;
896*89e3e0fbSXianjun Jiao					adi,length-width = <0x18>;
897*89e3e0fbSXianjun Jiao				};
898*89e3e0fbSXianjun Jiao			};
899*89e3e0fbSXianjun Jiao		};
900*89e3e0fbSXianjun Jiao
901*89e3e0fbSXianjun Jiao		dma@7c420000 {
902*89e3e0fbSXianjun Jiao			compatible = "adi,axi-dmac-1.00.a";
903*89e3e0fbSXianjun Jiao			reg = <0x7c420000 0x10000>;
904*89e3e0fbSXianjun Jiao			#dma-cells = <0x1>;
905*89e3e0fbSXianjun Jiao			interrupts = <0 56 4>;
906*89e3e0fbSXianjun Jiao			clocks = <0x2 0xf 0xf>;
907*89e3e0fbSXianjun Jiao			linux,phandle = <0x12>;
908*89e3e0fbSXianjun Jiao			phandle = <0x12>;
909*89e3e0fbSXianjun Jiao
910*89e3e0fbSXianjun Jiao			adi,channels {
911*89e3e0fbSXianjun Jiao				#size-cells = <0x0>;
912*89e3e0fbSXianjun Jiao				#address-cells = <0x1>;
913*89e3e0fbSXianjun Jiao
914*89e3e0fbSXianjun Jiao				dma-channel@0 {
915*89e3e0fbSXianjun Jiao					reg = <0x0>;
916*89e3e0fbSXianjun Jiao					adi,source-bus-width = <0x40>;
917*89e3e0fbSXianjun Jiao					adi,source-bus-type = <0x0>;
918*89e3e0fbSXianjun Jiao					adi,destination-bus-width = <0x40>;
919*89e3e0fbSXianjun Jiao					adi,destination-bus-type = <0x2>;
920*89e3e0fbSXianjun Jiao					adi,length-width = <0x18>;
921*89e3e0fbSXianjun Jiao					adi,cyclic;
922*89e3e0fbSXianjun Jiao				};
923*89e3e0fbSXianjun Jiao			};
924*89e3e0fbSXianjun Jiao		};
925*89e3e0fbSXianjun Jiao
926*89e3e0fbSXianjun Jiao		sdr: sdr {
927*89e3e0fbSXianjun Jiao			compatible ="sdr,sdr";
928*89e3e0fbSXianjun Jiao			dmas = <&rx_dma 0
929*89e3e0fbSXianjun Jiao					&rx_dma 1
930*89e3e0fbSXianjun Jiao					&tx_dma 0
931*89e3e0fbSXianjun Jiao					&tx_dma 1>;
932*89e3e0fbSXianjun Jiao			dma-names = "rx_dma_mm2s", "rx_dma_s2mm", "tx_dma_mm2s", "tx_dma_s2mm";
933*89e3e0fbSXianjun Jiao			interrupt-names = "not_valid_anymore", "rx_pkt_intr", "tx_itrpt0", "tx_itrpt1";
934*89e3e0fbSXianjun Jiao			interrupt-parent = <1>;
935*89e3e0fbSXianjun Jiao			interrupts = <0 29 1 0 30 1 0 33 1 0 34 1>;
936*89e3e0fbSXianjun Jiao		} ;
937*89e3e0fbSXianjun Jiao
938*89e3e0fbSXianjun Jiao		axidmatest_1: axidmatest@1 {
939*89e3e0fbSXianjun Jiao			compatible ="xlnx,axi-dma-test-1.00.a";
940*89e3e0fbSXianjun Jiao			dmas = <&rx_dma 0
941*89e3e0fbSXianjun Jiao				&rx_dma 1>;
942*89e3e0fbSXianjun Jiao			dma-names = "axidma0", "axidma1";
943*89e3e0fbSXianjun Jiao		} ;
944*89e3e0fbSXianjun Jiao
945*89e3e0fbSXianjun Jiao		tx_dma: dma@80400000 {
946*89e3e0fbSXianjun Jiao			#dma-cells = <1>;
947*89e3e0fbSXianjun Jiao			clock-names = "s_axi_lite_aclk", "m_axi_sg_aclk", "m_axi_mm2s_aclk", "m_axi_s2mm_aclk";
948*89e3e0fbSXianjun Jiao			clocks = <0x2 0x10>, <0x2 0x10>, <0x2 0x10>, <0x2 0x10>;
949*89e3e0fbSXianjun Jiao			compatible = "xlnx,axi-dma-1.00.a";
950*89e3e0fbSXianjun Jiao			interrupt-names = "mm2s_introut", "s2mm_introut";
951*89e3e0fbSXianjun Jiao			interrupt-parent = <1>;
952*89e3e0fbSXianjun Jiao			interrupts = <0 35 4 0 36 4>;
953*89e3e0fbSXianjun Jiao			reg = <0x80400000 0x10000>;
954*89e3e0fbSXianjun Jiao			xlnx,addrwidth = <0x20>;
955*89e3e0fbSXianjun Jiao			xlnx,include-sg ;
956*89e3e0fbSXianjun Jiao			xlnx,sg-length-width = <0xe>;
957*89e3e0fbSXianjun Jiao			dma-channel@80400000 {
958*89e3e0fbSXianjun Jiao				compatible = "xlnx,axi-dma-mm2s-channel";
959*89e3e0fbSXianjun Jiao				dma-channels = <0x1>;
960*89e3e0fbSXianjun Jiao				interrupts = <0 35 4>;
961*89e3e0fbSXianjun Jiao				xlnx,datawidth = <0x40>;
962*89e3e0fbSXianjun Jiao				xlnx,device-id = <0x0>;
963*89e3e0fbSXianjun Jiao			};
964*89e3e0fbSXianjun Jiao			dma-channel@80400030 {
965*89e3e0fbSXianjun Jiao				compatible = "xlnx,axi-dma-s2mm-channel";
966*89e3e0fbSXianjun Jiao				dma-channels = <0x1>;
967*89e3e0fbSXianjun Jiao				interrupts = <0 36 4>;
968*89e3e0fbSXianjun Jiao				xlnx,datawidth = <0x40>;
969*89e3e0fbSXianjun Jiao				xlnx,device-id = <0x0>;
970*89e3e0fbSXianjun Jiao			};
971*89e3e0fbSXianjun Jiao		};
972*89e3e0fbSXianjun Jiao
973*89e3e0fbSXianjun Jiao		rx_dma: dma@80410000 {
974*89e3e0fbSXianjun Jiao			#dma-cells = <1>;
975*89e3e0fbSXianjun Jiao			clock-names = "s_axi_lite_aclk", "m_axi_sg_aclk", "m_axi_mm2s_aclk", "m_axi_s2mm_aclk";
976*89e3e0fbSXianjun Jiao			clocks = <0x2 0x10>, <0x2 0x10>, <0x2 0x10>, <0x2 0x10>;
977*89e3e0fbSXianjun Jiao			compatible = "xlnx,axi-dma-1.00.a";
978*89e3e0fbSXianjun Jiao			//dma-coherent ;
979*89e3e0fbSXianjun Jiao			interrupt-names = "mm2s_introut", "s2mm_introut";
980*89e3e0fbSXianjun Jiao			interrupt-parent = <1>;
981*89e3e0fbSXianjun Jiao			interrupts = <0 31 4 0 32 4>;
982*89e3e0fbSXianjun Jiao			reg = <0x80410000 0x10000>;
983*89e3e0fbSXianjun Jiao			xlnx,addrwidth = <0x20>;
984*89e3e0fbSXianjun Jiao			xlnx,include-sg ;
985*89e3e0fbSXianjun Jiao			xlnx,sg-length-width = <0xe>;
986*89e3e0fbSXianjun Jiao			dma-channel@80410000 {
987*89e3e0fbSXianjun Jiao				compatible = "xlnx,axi-dma-mm2s-channel";
988*89e3e0fbSXianjun Jiao				dma-channels = <0x1>;
989*89e3e0fbSXianjun Jiao				interrupts = <0 31 4>;
990*89e3e0fbSXianjun Jiao				xlnx,datawidth = <0x40>;
991*89e3e0fbSXianjun Jiao				xlnx,device-id = <0x1>;
992*89e3e0fbSXianjun Jiao			};
993*89e3e0fbSXianjun Jiao			dma-channel@80410030 {
994*89e3e0fbSXianjun Jiao				compatible = "xlnx,axi-dma-s2mm-channel";
995*89e3e0fbSXianjun Jiao				dma-channels = <0x1>;
996*89e3e0fbSXianjun Jiao				interrupts = <0 32 4>;
997*89e3e0fbSXianjun Jiao				xlnx,datawidth = <0x40>;
998*89e3e0fbSXianjun Jiao				xlnx,device-id = <0x1>;
999*89e3e0fbSXianjun Jiao			};
1000*89e3e0fbSXianjun Jiao		};
1001*89e3e0fbSXianjun Jiao
1002*89e3e0fbSXianjun Jiao		tx_intf_0: tx_intf@83c00000 {
1003*89e3e0fbSXianjun Jiao			clock-names = "s00_axi_aclk", "s00_axis_aclk", "s01_axis_aclk", "m00_axis_aclk";
1004*89e3e0fbSXianjun Jiao			clocks = <0x2 0x10>, <0x2 0x10>, <0x2 0x10>, <0x2 0x10>;
1005*89e3e0fbSXianjun Jiao			compatible = "sdr,tx_intf";
1006*89e3e0fbSXianjun Jiao			interrupt-names = "tx_itrpt0", "tx_itrpt1";
1007*89e3e0fbSXianjun Jiao			interrupt-parent = <1>;
1008*89e3e0fbSXianjun Jiao			interrupts = <0 33 1 0 34 1>;
1009*89e3e0fbSXianjun Jiao			reg = <0x83c00000 0x10000>;
1010*89e3e0fbSXianjun Jiao			xlnx,s00-axi-addr-width = <0x7>;
1011*89e3e0fbSXianjun Jiao			xlnx,s00-axi-data-width = <0x20>;
1012*89e3e0fbSXianjun Jiao		};
1013*89e3e0fbSXianjun Jiao
1014*89e3e0fbSXianjun Jiao		rx_intf_0: rx_intf@83c20000 {
1015*89e3e0fbSXianjun Jiao			clock-names = "s00_axi_aclk", "s00_axis_aclk", "m00_axis_aclk";
1016*89e3e0fbSXianjun Jiao			clocks = <0x2 0x10>, <0x2 0x10>, <0x2 0x10>;
1017*89e3e0fbSXianjun Jiao			compatible = "sdr,rx_intf";
1018*89e3e0fbSXianjun Jiao			interrupt-names = "not_valid_anymore", "rx_pkt_intr";
1019*89e3e0fbSXianjun Jiao			interrupt-parent = <1>;
1020*89e3e0fbSXianjun Jiao			interrupts = <0 29 1 0 30 1>;
1021*89e3e0fbSXianjun Jiao			reg = <0x83c20000 0x10000>;
1022*89e3e0fbSXianjun Jiao			xlnx,s00-axi-addr-width = <0x7>;
1023*89e3e0fbSXianjun Jiao			xlnx,s00-axi-data-width = <0x20>;
1024*89e3e0fbSXianjun Jiao		};
1025*89e3e0fbSXianjun Jiao
1026*89e3e0fbSXianjun Jiao		openofdm_tx_0: openofdm_tx@83c10000 {
1027*89e3e0fbSXianjun Jiao			clock-names = "clk";
1028*89e3e0fbSXianjun Jiao			clocks = <0x2 0x10>;
1029*89e3e0fbSXianjun Jiao			compatible = "sdr,openofdm_tx";
1030*89e3e0fbSXianjun Jiao			reg = <0x83c10000 0x10000>;
1031*89e3e0fbSXianjun Jiao		};
1032*89e3e0fbSXianjun Jiao
1033*89e3e0fbSXianjun Jiao		openofdm_rx_0: openofdm_rx@83c30000 {
1034*89e3e0fbSXianjun Jiao			clock-names = "clk";
1035*89e3e0fbSXianjun Jiao			clocks = <0x2 0x10>;
1036*89e3e0fbSXianjun Jiao			compatible = "sdr,openofdm_rx";
1037*89e3e0fbSXianjun Jiao			reg = <0x83c30000 0x10000>;
1038*89e3e0fbSXianjun Jiao		};
1039*89e3e0fbSXianjun Jiao
1040*89e3e0fbSXianjun Jiao		xpu_0: xpu@83c40000 {
1041*89e3e0fbSXianjun Jiao			clock-names = "s00_axi_aclk";
1042*89e3e0fbSXianjun Jiao			clocks = <0x2 0x10>;
1043*89e3e0fbSXianjun Jiao			compatible = "sdr,xpu";
1044*89e3e0fbSXianjun Jiao			reg = <0x83c40000 0x10000>;
1045*89e3e0fbSXianjun Jiao		};
1046*89e3e0fbSXianjun Jiao
1047*89e3e0fbSXianjun Jiao		cf-ad9361-lpc@79020000 {
1048*89e3e0fbSXianjun Jiao			compatible = "adi,axi-ad9361-6.00.a";
1049*89e3e0fbSXianjun Jiao			reg = <0x79020000 0x6000>;
1050*89e3e0fbSXianjun Jiao			dmas = <0x10 0x0>;
1051*89e3e0fbSXianjun Jiao			dma-names = "rx";
1052*89e3e0fbSXianjun Jiao			spibus-connected = <0x11>;
1053*89e3e0fbSXianjun Jiao		};
1054*89e3e0fbSXianjun Jiao
1055*89e3e0fbSXianjun Jiao		cf-ad9361-dds-core-lpc@79024000 {
1056*89e3e0fbSXianjun Jiao			compatible = "adi,axi-ad9361-dds-6.00.a";
1057*89e3e0fbSXianjun Jiao			reg = <0x79024000 0x1000>;
1058*89e3e0fbSXianjun Jiao			clocks = <0x11 0xd>;
1059*89e3e0fbSXianjun Jiao			clock-names = "sampl_clk";
1060*89e3e0fbSXianjun Jiao			dmas = <0x12 0x0>;
1061*89e3e0fbSXianjun Jiao			dma-names = "tx";
1062*89e3e0fbSXianjun Jiao			adi,axi-dds-rate = <0x1>;
1063*89e3e0fbSXianjun Jiao			adi,axi-dds-1-rf-channel;
1064*89e3e0fbSXianjun Jiao		};
1065*89e3e0fbSXianjun Jiao
1066*89e3e0fbSXianjun Jiao		mwipcore@43c00000 {
1067*89e3e0fbSXianjun Jiao			compatible = "mathworks,mwipcore-axi4lite-v1.00";
1068*89e3e0fbSXianjun Jiao			reg = <0x43c00000 0xffff>;
1069*89e3e0fbSXianjun Jiao		};
1070*89e3e0fbSXianjun Jiao	};
1071*89e3e0fbSXianjun Jiao
1072*89e3e0fbSXianjun Jiao	audio_clock {
1073*89e3e0fbSXianjun Jiao		compatible = "fixed-clock";
1074*89e3e0fbSXianjun Jiao		#clock-cells = <0x0>;
1075*89e3e0fbSXianjun Jiao		clock-frequency = <0xbb8000>;
1076*89e3e0fbSXianjun Jiao		linux,phandle = <0xf>;
1077*89e3e0fbSXianjun Jiao		phandle = <0xf>;
1078*89e3e0fbSXianjun Jiao	};
1079*89e3e0fbSXianjun Jiao
1080*89e3e0fbSXianjun Jiao	adv7511_hdmi_snd {
1081*89e3e0fbSXianjun Jiao		compatible = "simple-audio-card";
1082*89e3e0fbSXianjun Jiao		simple-audio-card,name = "HDMI monitor";
1083*89e3e0fbSXianjun Jiao		simple-audio-card,widgets = "Speaker", "Speaker";
1084*89e3e0fbSXianjun Jiao		simple-audio-card,routing = "Speaker", "TX";
1085*89e3e0fbSXianjun Jiao
1086*89e3e0fbSXianjun Jiao		simple-audio-card,dai-link@0 {
1087*89e3e0fbSXianjun Jiao			format = "spdif";
1088*89e3e0fbSXianjun Jiao
1089*89e3e0fbSXianjun Jiao			cpu {
1090*89e3e0fbSXianjun Jiao				sound-dai = <0x13>;
1091*89e3e0fbSXianjun Jiao				frame-master;
1092*89e3e0fbSXianjun Jiao				bitclock-master;
1093*89e3e0fbSXianjun Jiao			};
1094*89e3e0fbSXianjun Jiao
1095*89e3e0fbSXianjun Jiao			codec {
1096*89e3e0fbSXianjun Jiao				sound-dai = <0x14>;
1097*89e3e0fbSXianjun Jiao			};
1098*89e3e0fbSXianjun Jiao		};
1099*89e3e0fbSXianjun Jiao	};
1100*89e3e0fbSXianjun Jiao
1101*89e3e0fbSXianjun Jiao	clocks {
1102*89e3e0fbSXianjun Jiao
1103*89e3e0fbSXianjun Jiao		clock@0 {
1104*89e3e0fbSXianjun Jiao			#clock-cells = <0x0>;
1105*89e3e0fbSXianjun Jiao			compatible = "fixed-clock";
1106*89e3e0fbSXianjun Jiao			clock-frequency = <0x2625a00>;
1107*89e3e0fbSXianjun Jiao			clock-output-names = "ad9361_ext_refclk";
1108*89e3e0fbSXianjun Jiao			linux,phandle = <0x5>;
1109*89e3e0fbSXianjun Jiao			phandle = <0x5>;
1110*89e3e0fbSXianjun Jiao		};
1111*89e3e0fbSXianjun Jiao
1112*89e3e0fbSXianjun Jiao		clock@1 {
1113*89e3e0fbSXianjun Jiao			#clock-cells = <0x0>;
1114*89e3e0fbSXianjun Jiao			compatible = "fixed-clock";
1115*89e3e0fbSXianjun Jiao			clock-frequency = <0x17d7840>;
1116*89e3e0fbSXianjun Jiao			clock-output-names = "refclk";
1117*89e3e0fbSXianjun Jiao			linux,phandle = <0x7>;
1118*89e3e0fbSXianjun Jiao			phandle = <0x7>;
1119*89e3e0fbSXianjun Jiao		};
1120*89e3e0fbSXianjun Jiao	};
1121*89e3e0fbSXianjun Jiao};
1122