1/dts-v1/; 2 3/ { 4 #address-cells = <0x1>; 5 #size-cells = <0x1>; 6 compatible = "xlnx,zynq-7000"; 7 interrupt-parent = <0x1>; 8 model = "Analog Devices ADRV9361-Z7035 (Z7035/AD9361)"; 9 10 cpus { 11 #address-cells = <0x1>; 12 #size-cells = <0x0>; 13 14 cpu@0 { 15 compatible = "arm,cortex-a9"; 16 device_type = "cpu"; 17 reg = <0x0>; 18 clocks = <0x2 0x3>; 19 clock-latency = <0x3e8>; 20 cpu0-supply = <0x3>; 21 operating-points = <0xa2c2b 0xf4240 0x51616 0xf4240>; 22 }; 23 24 cpu@1 { 25 compatible = "arm,cortex-a9"; 26 device_type = "cpu"; 27 reg = <0x1>; 28 clocks = <0x2 0x3>; 29 }; 30 }; 31 32 fpga-full { 33 compatible = "fpga-region"; 34 fpga-mgr = <0x4>; 35 #address-cells = <0x1>; 36 #size-cells = <0x1>; 37 ranges; 38 }; 39 40 pmu@f8891000 { 41 compatible = "arm,cortex-a9-pmu"; 42 interrupts = <0x0 0x5 0x4 0x0 0x6 0x4>; 43 interrupt-parent = <0x1>; 44 reg = <0xf8891000 0x1000 0xf8893000 0x1000>; 45 }; 46 47 fixedregulator { 48 compatible = "regulator-fixed"; 49 regulator-name = "VCCPINT"; 50 regulator-min-microvolt = <0xf4240>; 51 regulator-max-microvolt = <0xf4240>; 52 regulator-boot-on; 53 regulator-always-on; 54 linux,phandle = <0x3>; 55 phandle = <0x3>; 56 }; 57 58 amba { 59 u-boot,dm-pre-reloc; 60 compatible = "simple-bus"; 61 #address-cells = <0x1>; 62 #size-cells = <0x1>; 63 interrupt-parent = <0x1>; 64 ranges; 65 66 adc@f8007100 { 67 compatible = "xlnx,zynq-xadc-1.00.a"; 68 reg = <0xf8007100 0x20>; 69 interrupts = <0x0 0x7 0x4>; 70 interrupt-parent = <0x1>; 71 clocks = <0x2 0xc>; 72 }; 73 74 can@e0008000 { 75 compatible = "xlnx,zynq-can-1.0"; 76 status = "disabled"; 77 clocks = <0x2 0x13 0x2 0x24>; 78 clock-names = "can_clk", "pclk"; 79 reg = <0xe0008000 0x1000>; 80 interrupts = <0x0 0x1c 0x4>; 81 interrupt-parent = <0x1>; 82 tx-fifo-depth = <0x40>; 83 rx-fifo-depth = <0x40>; 84 }; 85 86 can@e0009000 { 87 compatible = "xlnx,zynq-can-1.0"; 88 status = "disabled"; 89 clocks = <0x2 0x14 0x2 0x25>; 90 clock-names = "can_clk", "pclk"; 91 reg = <0xe0009000 0x1000>; 92 interrupts = <0x0 0x33 0x4>; 93 interrupt-parent = <0x1>; 94 tx-fifo-depth = <0x40>; 95 rx-fifo-depth = <0x40>; 96 }; 97 98 gpio@e000a000 { 99 compatible = "xlnx,zynq-gpio-1.0"; 100 #gpio-cells = <0x2>; 101 clocks = <0x2 0x2a>; 102 gpio-controller; 103 interrupt-controller; 104 #interrupt-cells = <0x2>; 105 interrupt-parent = <0x1>; 106 interrupts = <0x0 0x14 0x4>; 107 reg = <0xe000a000 0x1000>; 108 linux,phandle = <0x6>; 109 phandle = <0x6>; 110 }; 111 112 i2c@e0004000 { 113 compatible = "cdns,i2c-r1p10"; 114 status = "disabled"; 115 clocks = <0x2 0x26>; 116 interrupt-parent = <0x1>; 117 interrupts = <0x0 0x19 0x4>; 118 reg = <0xe0004000 0x1000>; 119 #address-cells = <0x1>; 120 #size-cells = <0x0>; 121 }; 122 123 i2c@e0005000 { 124 compatible = "cdns,i2c-r1p10"; 125 status = "disabled"; 126 clocks = <0x2 0x27>; 127 interrupt-parent = <0x1>; 128 interrupts = <0x0 0x30 0x4>; 129 reg = <0xe0005000 0x1000>; 130 #address-cells = <0x1>; 131 #size-cells = <0x0>; 132 }; 133 134 interrupt-controller@f8f01000 { 135 compatible = "arm,cortex-a9-gic"; 136 #interrupt-cells = <0x3>; 137 interrupt-controller; 138 reg = <0xf8f01000 0x1000 0xf8f00100 0x100>; 139 linux,phandle = <0x1>; 140 phandle = <0x1>; 141 }; 142 143 cache-controller@f8f02000 { 144 compatible = "arm,pl310-cache"; 145 reg = <0xf8f02000 0x1000>; 146 interrupts = <0x0 0x2 0x4>; 147 arm,data-latency = <0x3 0x2 0x2>; 148 arm,tag-latency = <0x2 0x2 0x2>; 149 cache-unified; 150 cache-level = <0x2>; 151 }; 152 153 memory-controller@f8006000 { 154 compatible = "xlnx,zynq-ddrc-a05"; 155 reg = <0xf8006000 0x1000>; 156 }; 157 158 ocmc@f800c000 { 159 compatible = "xlnx,zynq-ocmc-1.0"; 160 interrupt-parent = <0x1>; 161 interrupts = <0x0 0x3 0x4>; 162 reg = <0xf800c000 0x1000>; 163 }; 164 165 serial@e0000000 { 166 compatible = "xlnx,xuartps", "cdns,uart-r1p8"; 167 status = "disabled"; 168 clocks = <0x2 0x17 0x2 0x28>; 169 clock-names = "uart_clk", "pclk"; 170 reg = <0xe0000000 0x1000>; 171 interrupts = <0x0 0x1b 0x4>; 172 }; 173 174 serial@e0001000 { 175 compatible = "xlnx,xuartps", "cdns,uart-r1p8"; 176 status = "okay"; 177 clocks = <0x2 0x18 0x2 0x29>; 178 clock-names = "uart_clk", "pclk"; 179 reg = <0xe0001000 0x1000>; 180 interrupts = <0x0 0x32 0x4>; 181 }; 182 183 spi@e0006000 { 184 compatible = "xlnx,zynq-spi-r1p6"; 185 reg = <0xe0006000 0x1000>; 186 status = "okay"; 187 interrupt-parent = <0x1>; 188 interrupts = <0x0 0x1a 0x4>; 189 clocks = <0x2 0x19 0x2 0x22>; 190 clock-names = "ref_clk", "pclk"; 191 #address-cells = <0x1>; 192 #size-cells = <0x0>; 193 194 ad9361-phy@0 { 195 #address-cells = <0x1>; 196 #size-cells = <0x0>; 197 #clock-cells = <0x1>; 198 compatible = "adi,ad9361"; 199 reg = <0x0>; 200 spi-cpha; 201 spi-max-frequency = <0x989680>; 202 clocks = <0x5 0x0>; 203 clock-names = "ad9361_ext_refclk"; 204 clock-output-names = "rx_sampl_clk", "tx_sampl_clk"; 205 adi,digital-interface-tune-skip-mode = <0x0>; 206 adi,pp-tx-swap-enable; 207 adi,pp-rx-swap-enable; 208 adi,rx-frame-pulse-mode-enable; 209 adi,lvds-mode-enable; 210 adi,lvds-bias-mV = <0x96>; 211 adi,lvds-rx-onchip-termination-enable; 212 adi,rx-data-delay = <0x4>; 213 adi,tx-fb-clock-delay = <0x7>; 214 adi,xo-disable-use-ext-refclk-enable; 215 adi,2rx-2tx-mode-enable; 216 adi,frequency-division-duplex-mode-enable; 217 adi,rx-rf-port-input-select = <0x0>; 218 adi,tx-rf-port-input-select = <0x0>; 219 adi,tx-attenuation-mdB = <0x2710>; 220 adi,rf-rx-bandwidth-hz = <0x112a880>; 221 adi,rf-tx-bandwidth-hz = <0x112a880>; 222 adi,rx-synthesizer-frequency-hz = <0x0 0x8f0d1800>; 223 adi,tx-synthesizer-frequency-hz = <0x0 0x92080880>; 224 adi,rx-path-clock-frequencies = <0x3a980000 0xea60000 0x7530000 0x3a98000 0x1d4c000 0x1d4c000>; 225 adi,tx-path-clock-frequencies = <0x3a980000 0x7530000 0x7530000 0x3a98000 0x1d4c000 0x1d4c000>; 226 adi,gc-rx1-mode = <0x2>; 227 adi,gc-rx2-mode = <0x2>; 228 adi,gc-adc-ovr-sample-size = <0x4>; 229 adi,gc-adc-small-overload-thresh = <0x2f>; 230 adi,gc-adc-large-overload-thresh = <0x3a>; 231 adi,gc-lmt-overload-high-thresh = <0x320>; 232 adi,gc-lmt-overload-low-thresh = <0x2c0>; 233 adi,gc-dec-pow-measurement-duration = <0x2000>; 234 adi,gc-low-power-thresh = <0x18>; 235 adi,mgc-inc-gain-step = <0x2>; 236 adi,mgc-dec-gain-step = <0x2>; 237 adi,mgc-split-table-ctrl-inp-gain-mode = <0x0>; 238 adi,agc-attack-delay-extra-margin-us = <0x1>; 239 adi,agc-outer-thresh-high = <0x5>; 240 adi,agc-outer-thresh-high-dec-steps = <0x2>; 241 adi,agc-inner-thresh-high = <0xa>; 242 adi,agc-inner-thresh-high-dec-steps = <0x1>; 243 adi,agc-inner-thresh-low = <0xc>; 244 adi,agc-inner-thresh-low-inc-steps = <0x1>; 245 adi,agc-outer-thresh-low = <0x12>; 246 adi,agc-outer-thresh-low-inc-steps = <0x2>; 247 adi,agc-adc-small-overload-exceed-counter = <0xa>; 248 adi,agc-adc-large-overload-exceed-counter = <0xa>; 249 adi,agc-adc-large-overload-inc-steps = <0x2>; 250 adi,agc-lmt-overload-large-exceed-counter = <0xa>; 251 adi,agc-lmt-overload-small-exceed-counter = <0xa>; 252 adi,agc-lmt-overload-large-inc-steps = <0x2>; 253 adi,agc-gain-update-interval-us = <0x3e8>; 254 adi,fagc-dec-pow-measurement-duration = <0x40>; 255 adi,fagc-lp-thresh-increment-steps = <0x1>; 256 adi,fagc-lp-thresh-increment-time = <0x5>; 257 adi,fagc-energy-lost-stronger-sig-gain-lock-exit-cnt = <0x8>; 258 adi,fagc-final-overrange-count = <0x3>; 259 adi,fagc-gain-index-type-after-exit-rx-mode = <0x0>; 260 adi,fagc-lmt-final-settling-steps = <0x1>; 261 adi,fagc-lock-level = <0xa>; 262 adi,fagc-lock-level-gain-increase-upper-limit = <0x5>; 263 adi,fagc-lock-level-lmt-gain-increase-enable; 264 adi,fagc-lpf-final-settling-steps = <0x1>; 265 adi,fagc-optimized-gain-offset = <0x5>; 266 adi,fagc-power-measurement-duration-in-state5 = <0x40>; 267 adi,fagc-rst-gla-engergy-lost-goto-optim-gain-enable; 268 adi,fagc-rst-gla-engergy-lost-sig-thresh-below-ll = <0xa>; 269 adi,fagc-rst-gla-engergy-lost-sig-thresh-exceeded-enable; 270 adi,fagc-rst-gla-if-en-agc-pulled-high-mode = <0x0>; 271 adi,fagc-rst-gla-large-adc-overload-enable; 272 adi,fagc-rst-gla-large-lmt-overload-enable; 273 adi,fagc-rst-gla-stronger-sig-thresh-above-ll = <0xa>; 274 adi,fagc-rst-gla-stronger-sig-thresh-exceeded-enable; 275 adi,fagc-state-wait-time-ns = <0x104>; 276 adi,fagc-use-last-lock-level-for-set-gain-enable; 277 adi,rssi-restart-mode = <0x3>; 278 adi,rssi-delay = <0x1>; 279 adi,rssi-wait = <0x1>; 280 adi,rssi-duration = <0x3e8>; 281 adi,ctrl-outs-index = <0x0>; 282 adi,ctrl-outs-enable-mask = <0xff>; 283 adi,temp-sense-measurement-interval-ms = <0x3e8>; 284 adi,temp-sense-offset-signed = <0xce>; 285 adi,temp-sense-periodic-measurement-enable; 286 adi,aux-dac-manual-mode-enable; 287 adi,aux-dac1-default-value-mV = <0x0>; 288 adi,aux-dac1-rx-delay-us = <0x0>; 289 adi,aux-dac1-tx-delay-us = <0x0>; 290 adi,aux-dac2-default-value-mV = <0x0>; 291 adi,aux-dac2-rx-delay-us = <0x0>; 292 adi,aux-dac2-tx-delay-us = <0x0>; 293 en_agc-gpios = <0x6 0x62 0x0>; 294 sync-gpios = <0x6 0x63 0x0>; 295 reset-gpios = <0x6 0x64 0x0>; 296 enable-gpios = <0x6 0x65 0x0>; 297 txnrx-gpios = <0x6 0x66 0x0>; 298 linux,phandle = <0x11>; 299 phandle = <0x11>; 300 }; 301 302 ad9517@1 { 303 #address-cells = <0x1>; 304 #size-cells = <0x0>; 305 #clock-cells = <0x1>; 306 compatible = "adi,ad9517-3"; 307 reg = <0x1>; 308 spi-max-frequency = <0x989680>; 309 clocks = <0x7 0x7>; 310 clock-names = "refclk", "clkin"; 311 clock-output-names = "out0", "out1", "out2", "out3", "out4", "out5", "out6", "out7"; 312 firmware = "pzsdr-fmc-ad9517.stp"; 313 }; 314 }; 315 316 spi@e0007000 { 317 compatible = "xlnx,zynq-spi-r1p6"; 318 reg = <0xe0007000 0x1000>; 319 status = "disabled"; 320 interrupt-parent = <0x1>; 321 interrupts = <0x0 0x31 0x4>; 322 clocks = <0x2 0x1a 0x2 0x23>; 323 clock-names = "ref_clk", "pclk"; 324 #address-cells = <0x1>; 325 #size-cells = <0x0>; 326 }; 327 328 spi@e000d000 { 329 clock-names = "ref_clk", "pclk"; 330 clocks = <0x2 0xa 0x2 0x2b>; 331 compatible = "xlnx,zynq-qspi-1.0"; 332 status = "okay"; 333 interrupt-parent = <0x1>; 334 interrupts = <0x0 0x13 0x4>; 335 reg = <0xe000d000 0x1000>; 336 #address-cells = <0x1>; 337 #size-cells = <0x0>; 338 is-dual = <0x0>; 339 num-cs = <0x1>; 340 341 ps7-qspi@0 { 342 #address-cells = <0x1>; 343 #size-cells = <0x1>; 344 spi-tx-bus-width = <0x1>; 345 spi-rx-bus-width = <0x4>; 346 compatible = "n25q256a", "jedec,spi-nor"; 347 reg = <0x0>; 348 spi-max-frequency = <0x2faf080>; 349 350 partition@qspi-fsbl-uboot { 351 label = "qspi-fsbl-uboot"; 352 reg = <0x0 0xe0000>; 353 }; 354 355 partition@qspi-uboot-env { 356 label = "qspi-uboot-env"; 357 reg = <0xe0000 0x20000>; 358 }; 359 360 partition@qspi-linux { 361 label = "qspi-linux"; 362 reg = <0x100000 0x500000>; 363 }; 364 365 partition@qspi-device-tree { 366 label = "qspi-device-tree"; 367 reg = <0x600000 0x20000>; 368 }; 369 370 partition@qspi-rootfs { 371 label = "qspi-rootfs"; 372 reg = <0x620000 0xce0000>; 373 }; 374 375 partition@qspi-bitstream { 376 label = "qspi-bitstream"; 377 reg = <0x1300000 0xd00000>; 378 }; 379 }; 380 }; 381 382 memory-controller@e000e000 { 383 #address-cells = <0x1>; 384 #size-cells = <0x1>; 385 status = "disabled"; 386 clock-names = "memclk", "aclk"; 387 clocks = <0x2 0xb 0x2 0x2c>; 388 compatible = "arm,pl353-smc-r2p1"; 389 interrupt-parent = <0x1>; 390 interrupts = <0x0 0x12 0x4>; 391 ranges; 392 reg = <0xe000e000 0x1000>; 393 394 flash@e1000000 { 395 status = "disabled"; 396 compatible = "arm,pl353-nand-r2p1"; 397 reg = <0xe1000000 0x1000000>; 398 #address-cells = <0x1>; 399 #size-cells = <0x1>; 400 }; 401 402 flash@e2000000 { 403 status = "disabled"; 404 compatible = "cfi-flash"; 405 reg = <0xe2000000 0x2000000>; 406 #address-cells = <0x1>; 407 #size-cells = <0x1>; 408 }; 409 }; 410 411 ethernet@e000b000 { 412 compatible = "cdns,zynq-gem", "cdns,gem"; 413 reg = <0xe000b000 0x1000>; 414 status = "okay"; 415 interrupts = <0x0 0x16 0x4>; 416 clocks = <0x2 0x1e 0x2 0x1e 0x2 0xd>; 417 clock-names = "pclk", "hclk", "tx_clk"; 418 #address-cells = <0x1>; 419 #size-cells = <0x0>; 420 phy-handle = <0x8>; 421 phy-mode = "rgmii-id"; 422 423 phy@0 { 424 device_type = "ethernet-phy"; 425 reg = <0x0>; 426 marvell,reg-init = <0x3 0x10 0xff00 0x1e 0x3 0x11 0xfff0 0x0>; 427 linux,phandle = <0x8>; 428 phandle = <0x8>; 429 }; 430 }; 431 432 ethernet@e000c000 { 433 compatible = "cdns,zynq-gem", "cdns,gem"; 434 reg = <0xe000c000 0x1000>; 435 status = "okay"; 436 interrupts = <0x0 0x2d 0x4>; 437 clocks = <0x2 0x1f 0x2 0x1f 0x2 0xe>; 438 clock-names = "pclk", "hclk", "tx_clk"; 439 #address-cells = <0x1>; 440 #size-cells = <0x0>; 441 phy-handle = <0x9>; 442 phy-mode = "gmii"; 443 444 gmiitorgmii@8 { 445 compatible = "xlnx,gmii-to-rgmii-1.0"; 446 reg = <0x8>; 447 phy-handle = <0xa>; 448 linux,phandle = <0x9>; 449 phandle = <0x9>; 450 }; 451 452 phy@1 { 453 device_type = "ethernet-phy"; 454 reg = <0x1>; 455 marvell,reg-init = <0x3 0x10 0xff00 0x1e 0x3 0x11 0xfff0 0x0>; 456 linux,phandle = <0xa>; 457 phandle = <0xa>; 458 }; 459 }; 460 461 sdhci@e0100000 { 462 compatible = "arasan,sdhci-8.9a"; 463 status = "okay"; 464 clock-names = "clk_xin", "clk_ahb"; 465 clocks = <0x2 0x15 0x2 0x20>; 466 interrupt-parent = <0x1>; 467 interrupts = <0x0 0x18 0x4>; 468 reg = <0xe0100000 0x1000>; 469 broken-adma2; 470 disable-wp; 471 }; 472 473 sdhci@e0101000 { 474 compatible = "arasan,sdhci-8.9a"; 475 status = "disabled"; 476 clock-names = "clk_xin", "clk_ahb"; 477 clocks = <0x2 0x16 0x2 0x21>; 478 interrupt-parent = <0x1>; 479 interrupts = <0x0 0x2f 0x4>; 480 reg = <0xe0101000 0x1000>; 481 broken-adma2; 482 }; 483 484 slcr@f8000000 { 485 #address-cells = <0x1>; 486 #size-cells = <0x1>; 487 compatible = "xlnx,zynq-slcr", "syscon", "simple-mfd"; 488 reg = <0xf8000000 0x1000>; 489 ranges; 490 linux,phandle = <0xb>; 491 phandle = <0xb>; 492 493 clkc@100 { 494 #clock-cells = <0x1>; 495 compatible = "xlnx,ps7-clkc"; 496 fclk-enable = <0xf>; 497 clock-output-names = "armpll", "ddrpll", "iopll", "cpu_6or4x", "cpu_3or2x", "cpu_2x", "cpu_1x", "ddr2x", "ddr3x", "dci", "lqspi", "smc", "pcap", "gem0", "gem1", "fclk0", "fclk1", "fclk2", "fclk3", "can0", "can1", "sdio0", "sdio1", "uart0", "uart1", "spi0", "spi1", "dma", "usb0_aper", "usb1_aper", "gem0_aper", "gem1_aper", "sdio0_aper", "sdio1_aper", "spi0_aper", "spi1_aper", "can0_aper", "can1_aper", "i2c0_aper", "i2c1_aper", "uart0_aper", "uart1_aper", "gpio_aper", "lqspi_aper", "smc_aper", "swdt", "dbg_trc", "dbg_apb"; 498 reg = <0x100 0x100>; 499 ps-clk-frequency = <0x1fca055>; 500 linux,phandle = <0x2>; 501 phandle = <0x2>; 502 }; 503 504 rstc@200 { 505 compatible = "xlnx,zynq-reset"; 506 reg = <0x200 0x48>; 507 #reset-cells = <0x1>; 508 syscon = <0xb>; 509 }; 510 511 pinctrl@700 { 512 compatible = "xlnx,pinctrl-zynq"; 513 reg = <0x700 0x200>; 514 syscon = <0xb>; 515 }; 516 }; 517 518 dmac@f8003000 { 519 compatible = "arm,pl330", "arm,primecell"; 520 reg = <0xf8003000 0x1000>; 521 interrupt-parent = <0x1>; 522 interrupt-names = "abort", "dma0", "dma1", "dma2", "dma3", "dma4", "dma5", "dma6", "dma7"; 523 interrupts = <0x0 0xd 0x4 0x0 0xe 0x4 0x0 0xf 0x4 0x0 0x10 0x4 0x0 0x11 0x4 0x0 0x28 0x4 0x0 0x29 0x4 0x0 0x2a 0x4 0x0 0x2b 0x4>; 524 #dma-cells = <0x1>; 525 #dma-channels = <0x8>; 526 #dma-requests = <0x4>; 527 clocks = <0x2 0x1b>; 528 clock-names = "apb_pclk"; 529 linux,phandle = <0x16>; 530 phandle = <0x16>; 531 }; 532 533 devcfg@f8007000 { 534 compatible = "xlnx,zynq-devcfg-1.0"; 535 interrupt-parent = <0x1>; 536 interrupts = <0x0 0x8 0x4>; 537 reg = <0xf8007000 0x100>; 538 clocks = <0x2 0xc 0x2 0xf 0x2 0x10 0x2 0x11 0x2 0x12>; 539 clock-names = "ref_clk", "fclk0", "fclk1", "fclk2", "fclk3"; 540 syscon = <0xb>; 541 linux,phandle = <0x4>; 542 phandle = <0x4>; 543 }; 544 545 efuse@f800d000 { 546 compatible = "xlnx,zynq-efuse"; 547 reg = <0xf800d000 0x20>; 548 }; 549 550 timer@f8f00200 { 551 compatible = "arm,cortex-a9-global-timer"; 552 reg = <0xf8f00200 0x20>; 553 interrupts = <0x1 0xb 0x301>; 554 interrupt-parent = <0x1>; 555 clocks = <0x2 0x4>; 556 }; 557 558 timer@f8001000 { 559 interrupt-parent = <0x1>; 560 interrupts = <0x0 0xa 0x4 0x0 0xb 0x4 0x0 0xc 0x4>; 561 compatible = "cdns,ttc"; 562 clocks = <0x2 0x6>; 563 reg = <0xf8001000 0x1000>; 564 }; 565 566 timer@f8002000 { 567 interrupt-parent = <0x1>; 568 interrupts = <0x0 0x25 0x4 0x0 0x26 0x4 0x0 0x27 0x4>; 569 compatible = "cdns,ttc"; 570 clocks = <0x2 0x6>; 571 reg = <0xf8002000 0x1000>; 572 }; 573 574 timer@f8f00600 { 575 interrupt-parent = <0x1>; 576 interrupts = <0x1 0xd 0x301>; 577 compatible = "arm,cortex-a9-twd-timer"; 578 reg = <0xf8f00600 0x20>; 579 clocks = <0x2 0x4>; 580 }; 581 582 usb@e0002000 { 583 compatible = "xlnx,zynq-usb-2.20a", "chipidea,usb2"; 584 status = "okay"; 585 clocks = <0x2 0x1c>; 586 interrupt-parent = <0x1>; 587 interrupts = <0x0 0x15 0x4>; 588 reg = <0xe0002000 0x1000>; 589 phy_type = "ulpi"; 590 dr_mode = "host"; 591 xlnx,phy-reset-gpio = <0x6 0x7 0x0>; 592 }; 593 594 usb@e0003000 { 595 compatible = "xlnx,zynq-usb-2.20a", "chipidea,usb2"; 596 status = "disabled"; 597 clocks = <0x2 0x1d>; 598 interrupt-parent = <0x1>; 599 interrupts = <0x0 0x2c 0x4>; 600 reg = <0xe0003000 0x1000>; 601 phy_type = "ulpi"; 602 }; 603 604 watchdog@f8005000 { 605 clocks = <0x2 0x2d>; 606 compatible = "cdns,wdt-r1p2"; 607 interrupt-parent = <0x1>; 608 interrupts = <0x0 0x9 0x1>; 609 reg = <0xf8005000 0x1000>; 610 timeout-sec = <0xa>; 611 }; 612 }; 613 614 aliases { 615 ethernet0 = "/amba/ethernet@e000b000"; 616 serial0 = "/amba/serial@e0001000"; 617 ethernet1 = "/amba/ethernet@e000c000"; 618 }; 619 620 memory { 621 device_type = "memory"; 622 reg = <0x0 0x40000000>; 623 }; 624 625 chosen { 626 linux,stdout-path = "/amba@0/uart@E0001000"; 627 }; 628 629 clocks { 630 631 clock@0 { 632 #clock-cells = <0x0>; 633 compatible = "adjustable-clock"; 634 clock-frequency = <0x2625a00>; 635 clock-accuracy = <0x30d40>; 636 clock-output-names = "XO_40MHz"; 637 linux,phandle = <0xc>; 638 phandle = <0xc>; 639 }; 640 641 clock@2 { 642 #clock-cells = <0x0>; 643 compatible = "fixed-clock"; 644 clock-frequency = <0x16e3600>; 645 clock-output-names = "24MHz"; 646 linux,phandle = <0xd>; 647 phandle = <0xd>; 648 }; 649 650 clock@3 { 651 #clock-cells = <0x0>; 652 compatible = "fixed-clock"; 653 clock-frequency = <0x17d7840>; 654 clock-output-names = "ad9517_refclk"; 655 linux,phandle = <0x7>; 656 phandle = <0x7>; 657 }; 658 659 audio_clock { 660 compatible = "fixed-clock"; 661 #clock-cells = <0x0>; 662 clock-frequency = <0xbb8000>; 663 linux,phandle = <0xf>; 664 phandle = <0xf>; 665 }; 666 }; 667 668 ad9361-refclk-gpio-gate@0 { 669 #clock-cells = <0x0>; 670 compatible = "gpio-gate-clock"; 671 clocks = <0xc>; 672 enable-gpios = <0x6 0x69 0x0>; 673 clk-set-rate-parent-enable; 674 clock-output-names = "ad9361_ext_refclk"; 675 linux,phandle = <0x5>; 676 phandle = <0x5>; 677 }; 678 679 usb-ulpe-gpio-gate@0 { 680 #clock-cells = <0x0>; 681 compatible = "gpio-gate-clock"; 682 clocks = <0xd>; 683 enable-gpios = <0x6 0x9 0x1>; 684 }; 685 686 fpga-axi@0 { 687 compatible = "simple-bus"; 688 #address-cells = <0x1>; 689 #size-cells = <0x1>; 690 ranges; 691 692 i2c@41600000 { 693 compatible = "xlnx,axi-iic-1.02.a", "xlnx,xps-iic-2.00.a"; 694 reg = <0x41600000 0x10000>; 695 interrupt-parent = <0x1>; 696 interrupts = <0x0 0x3a 0x4>; 697 clocks = <0x2 0xf>; 698 clock-names = "pclk"; 699 #address-cells = <0x1>; 700 #size-cells = <0x0>; 701 702 adm1166@68 { 703 compatible = "adi,adm1166"; 704 reg = <0x68>; 705 }; 706 707 i2cswitch@74 { 708 compatible = "nxp,pca9548"; 709 #address-cells = <0x1>; 710 #size-cells = <0x0>; 711 reg = <0x70>; 712 713 i2c@0 { 714 #address-cells = <0x1>; 715 #size-cells = <0x0>; 716 reg = <0x0>; 717 }; 718 719 i2c@1 { 720 #address-cells = <0x1>; 721 #size-cells = <0x0>; 722 reg = <0x1>; 723 }; 724 725 i2c@2 { 726 #address-cells = <0x1>; 727 #size-cells = <0x0>; 728 reg = <0x2>; 729 730 adv7511@39 { 731 compatible = "adi,adv7511"; 732 reg = <0x39 0x3f>; 733 reg-names = "primary", "edid"; 734 adi,input-depth = <0x8>; 735 adi,input-colorspace = "yuv422"; 736 adi,input-clock = "1x"; 737 adi,input-style = <0x1>; 738 adi,input-justification = "left"; 739 adi,clock-delay = <0x0>; 740 #sound-dai-cells = <0x0>; 741 linux,phandle = <0x18>; 742 phandle = <0x18>; 743 744 ports { 745 #address-cells = <0x1>; 746 #size-cells = <0x0>; 747 748 port@0 { 749 reg = <0x0>; 750 751 endpoint { 752 remote-endpoint = <0xe>; 753 linux,phandle = <0x15>; 754 phandle = <0x15>; 755 }; 756 }; 757 758 port@1 { 759 reg = <0x1>; 760 }; 761 }; 762 }; 763 }; 764 765 i2c@3 { 766 #address-cells = <0x1>; 767 #size-cells = <0x0>; 768 reg = <0x3>; 769 770 adau1761@3b { 771 compatible = "adi,adau1761"; 772 reg = <0x3b>; 773 clocks = <0xf>; 774 clock-names = "mclk"; 775 #sound-dai-cells = <0x0>; 776 linux,phandle = <0x1a>; 777 phandle = <0x1a>; 778 }; 779 }; 780 781 i2c@4 { 782 #address-cells = <0x1>; 783 #size-cells = <0x0>; 784 reg = <0x4>; 785 }; 786 787 i2c@5 { 788 #address-cells = <0x1>; 789 #size-cells = <0x0>; 790 reg = <0x5>; 791 792 eeprom@50 { 793 compatible = "at24,24c32"; 794 reg = <0x50>; 795 }; 796 }; 797 798 i2c@6 { 799 #address-cells = <0x1>; 800 #size-cells = <0x0>; 801 reg = <0x6>; 802 803 ad7291@2f { 804 compatible = "adi,ad7291"; 805 reg = <0x2f>; 806 }; 807 }; 808 809 i2c@7 { 810 #address-cells = <0x1>; 811 #size-cells = <0x0>; 812 reg = <0x7>; 813 }; 814 }; 815 }; 816 817 dma@7c400000 { 818 compatible = "adi,axi-dmac-1.00.a"; 819 reg = <0x7c400000 0x10000>; 820 #dma-cells = <0x1>; 821 interrupts = <0 57 4>; 822 clocks = <0x2 0xf 0xf>; 823 linux,phandle = <0x10>; 824 phandle = <0x10>; 825 826 adi,channels { 827 #size-cells = <0x0>; 828 #address-cells = <0x1>; 829 830 dma-channel@0 { 831 reg = <0x0>; 832 adi,source-bus-width = <0x40>; 833 adi,source-bus-type = <0x2>; 834 adi,destination-bus-width = <0x40>; 835 adi,destination-bus-type = <0x0>; 836 adi,length-width = <0x18>; 837 }; 838 }; 839 }; 840 841 dma@7c420000 { 842 compatible = "adi,axi-dmac-1.00.a"; 843 reg = <0x7c420000 0x10000>; 844 #dma-cells = <0x1>; 845 interrupts = <0 56 4>; 846 clocks = <0x2 0xf 0xf>; 847 linux,phandle = <0x12>; 848 phandle = <0x12>; 849 850 adi,channels { 851 #size-cells = <0x0>; 852 #address-cells = <0x1>; 853 854 dma-channel@0 { 855 reg = <0x0>; 856 adi,source-bus-width = <0x40>; 857 adi,source-bus-type = <0x0>; 858 adi,destination-bus-width = <0x40>; 859 adi,destination-bus-type = <0x2>; 860 adi,length-width = <0x18>; 861 adi,cyclic; 862 }; 863 }; 864 }; 865 866 sdr: sdr { 867 compatible ="sdr,sdr"; 868 dmas = <&rx_dma 0 869 &rx_dma 1 870 &tx_dma 0 871 &tx_dma 1>; 872 dma-names = "rx_dma_mm2s", "rx_dma_s2mm", "tx_dma_mm2s", "tx_dma_s2mm"; 873 interrupt-names = "not_valid_anymore", "rx_pkt_intr", "tx_itrpt0", "tx_itrpt1"; 874 interrupt-parent = <1>; 875 interrupts = <0 29 1 0 30 1 0 33 1 0 34 1>; 876 } ; 877 878 axidmatest_1: axidmatest@1 { 879 compatible ="xlnx,axi-dma-test-1.00.a"; 880 dmas = <&rx_dma 0 881 &rx_dma 1>; 882 dma-names = "axidma0", "axidma1"; 883 } ; 884 885 tx_dma: dma@80400000 { 886 #dma-cells = <1>; 887 clock-names = "s_axi_lite_aclk", "m_axi_sg_aclk", "m_axi_mm2s_aclk", "m_axi_s2mm_aclk"; 888 clocks = <0x2 0x11>, <0x2 0x11>, <0x2 0x11>, <0x2 0x11>; 889 compatible = "xlnx,axi-dma-1.00.a"; 890 interrupt-names = "mm2s_introut", "s2mm_introut"; 891 interrupt-parent = <1>; 892 interrupts = <0 35 4 0 36 4>; 893 reg = <0x80400000 0x10000>; 894 xlnx,addrwidth = <0x20>; 895 xlnx,include-sg ; 896 xlnx,sg-length-width = <0xe>; 897 dma-channel@80400000 { 898 compatible = "xlnx,axi-dma-mm2s-channel"; 899 dma-channels = <0x1>; 900 interrupts = <0 35 4>; 901 xlnx,datawidth = <0x40>; 902 xlnx,device-id = <0x0>; 903 }; 904 dma-channel@80400030 { 905 compatible = "xlnx,axi-dma-s2mm-channel"; 906 dma-channels = <0x1>; 907 interrupts = <0 36 4>; 908 xlnx,datawidth = <0x40>; 909 xlnx,device-id = <0x0>; 910 }; 911 }; 912 913 rx_dma: dma@80410000 { 914 #dma-cells = <1>; 915 clock-names = "s_axi_lite_aclk", "m_axi_sg_aclk", "m_axi_mm2s_aclk", "m_axi_s2mm_aclk"; 916 clocks = <0x2 0x11>, <0x2 0x11>, <0x2 0x11>, <0x2 0x11>; 917 compatible = "xlnx,axi-dma-1.00.a"; 918 //dma-coherent ; 919 interrupt-names = "mm2s_introut", "s2mm_introut"; 920 interrupt-parent = <1>; 921 interrupts = <0 31 4 0 32 4>; 922 reg = <0x80410000 0x10000>; 923 xlnx,addrwidth = <0x20>; 924 xlnx,include-sg ; 925 xlnx,sg-length-width = <0xe>; 926 dma-channel@80410000 { 927 compatible = "xlnx,axi-dma-mm2s-channel"; 928 dma-channels = <0x1>; 929 interrupts = <0 31 4>; 930 xlnx,datawidth = <0x40>; 931 xlnx,device-id = <0x1>; 932 }; 933 dma-channel@80410030 { 934 compatible = "xlnx,axi-dma-s2mm-channel"; 935 dma-channels = <0x1>; 936 interrupts = <0 32 4>; 937 xlnx,datawidth = <0x40>; 938 xlnx,device-id = <0x1>; 939 }; 940 }; 941 942 tx_intf_0: tx_intf@83c00000 { 943 clock-names = "s00_axi_aclk", "s00_axis_aclk", "s01_axis_aclk", "m00_axis_aclk"; 944 clocks = <0x2 0x11>, <0x2 0x11>, <0x2 0x11>, <0x2 0x11>; 945 compatible = "sdr,tx_intf"; 946 interrupt-names = "tx_itrpt0", "tx_itrpt1"; 947 interrupt-parent = <1>; 948 interrupts = <0 33 1 0 34 1>; 949 reg = <0x83c00000 0x10000>; 950 xlnx,s00-axi-addr-width = <0x7>; 951 xlnx,s00-axi-data-width = <0x20>; 952 }; 953 954 rx_intf_0: rx_intf@83c20000 { 955 clock-names = "s00_axi_aclk", "s00_axis_aclk", "m00_axis_aclk"; 956 clocks = <0x2 0x11>, <0x2 0x11>, <0x2 0x11>; 957 compatible = "sdr,rx_intf"; 958 interrupt-names = "not_valid_anymore", "rx_pkt_intr"; 959 interrupt-parent = <1>; 960 interrupts = <0 29 1 0 30 1>; 961 reg = <0x83c20000 0x10000>; 962 xlnx,s00-axi-addr-width = <0x7>; 963 xlnx,s00-axi-data-width = <0x20>; 964 }; 965 966 openofdm_tx_0: openofdm_tx@83c10000 { 967 clock-names = "clk"; 968 clocks = <0x2 0x11>; 969 compatible = "sdr,openofdm_tx"; 970 reg = <0x83c10000 0x10000>; 971 }; 972 973 openofdm_rx_0: openofdm_rx@83c30000 { 974 clock-names = "clk"; 975 clocks = <0x2 0x11>; 976 compatible = "sdr,openofdm_rx"; 977 reg = <0x83c30000 0x10000>; 978 }; 979 980 xpu_0: xpu@83c40000 { 981 clock-names = "s00_axi_aclk"; 982 clocks = <0x2 0x11>; 983 compatible = "sdr,xpu"; 984 reg = <0x83c40000 0x10000>; 985 }; 986 987 cf-ad9361-lpc@79020000 { 988 compatible = "adi,axi-ad9361-6.00.a"; 989 reg = <0x79020000 0x6000>; 990 dmas = <0x10 0x0>; 991 dma-names = "rx"; 992 spibus-connected = <0x11>; 993 }; 994 995 cf-ad9361-dds-core-lpc@79024000 { 996 compatible = "adi,axi-ad9361-dds-6.00.a"; 997 reg = <0x79024000 0x1000>; 998 clocks = <0x11 0xd>; 999 clock-names = "sampl_clk"; 1000 dmas = <0x12 0x0>; 1001 dma-names = "tx"; 1002 }; 1003 1004 mwipcore@43c00000 { 1005 compatible = "mathworks,mwipcore-axi4lite-v1.00"; 1006 reg = <0x43c00000 0xffff>; 1007 }; 1008 1009 axivdma@43000000 { 1010 compatible = "xlnx,axi-vdma-1.00.a"; 1011 clock-names = "s_axi_lite_aclk", "m_axi_mm2s_aclk", "m_axi_mm2s_aclk"; 1012 clocks = <2 15>, <2 15>, <2 15>; 1013 interrupt-names = "mm2s_introut"; 1014 interrupt-parent = <1>; 1015 interrupts = <0 59 4>; 1016 #address-cells = <0x1>; 1017 #size-cells = <0x1>; 1018 #dma-cells = <0x1>; 1019 #dma-channels = <0x1>; 1020 reg = <0x43000000 0x1000>; 1021 xlnx,addrwidth = <0x20>; 1022 xlnx,flush-fsync = <0x1>; 1023 xlnx,num-fstores = <0x3>; 1024 linux,phandle = <0x13>; 1025 phandle = <0x13>; 1026 1027 dma-channel@43000000 { 1028 compatible = "xlnx,axi-vdma-mm2s-channel"; 1029 interrupts = <0 59 4>; 1030 xlnx,datawidth = <0x40>; 1031 xlnx,device-id = <0x0>; 1032 xlnx,genlock-mode ; 1033 xlnx,include-dre = <0x0>; 1034 }; 1035 }; 1036 1037 axi-clkgen@79000000 { 1038 compatible = "adi,axi-clkgen-2.00.a"; 1039 reg = <0x79000000 0x10000>; 1040 #clock-cells = <0x0>; 1041 clocks = <0x2 0x10>; 1042 linux,phandle = <0x14>; 1043 phandle = <0x14>; 1044 }; 1045 1046 axi_hdmi@70e00000 { 1047 compatible = "adi,axi-hdmi-tx-1.00.a"; 1048 reg = <0x70e00000 0x10000>; 1049 dmas = <0x13 0x0>; 1050 dma-names = "video"; 1051 clocks = <0x14>; 1052 1053 port { 1054 1055 endpoint { 1056 remote-endpoint = <0x15>; 1057 linux,phandle = <0xe>; 1058 phandle = <0xe>; 1059 }; 1060 }; 1061 }; 1062 1063 axi-spdif-tx@75c00000 { 1064 compatible = "adi,axi-spdif-tx-1.00.a"; 1065 reg = <0x75c00000 0x1000>; 1066 dmas = <0x16 0x0>; 1067 dma-names = "tx"; 1068 clocks = <0x2 0xf 0xf>; 1069 clock-names = "axi", "ref"; 1070 #sound-dai-cells = <0x0>; 1071 linux,phandle = <0x17>; 1072 phandle = <0x17>; 1073 }; 1074 1075 axi-i2s@77600000 { 1076 compatible = "adi,axi-i2s-1.00.a"; 1077 reg = <0x77600000 0x1000>; 1078 dmas = <0x16 0x1 0x16 0x2>; 1079 dma-names = "tx", "rx"; 1080 clocks = <0x2 0xf 0xf>; 1081 clock-names = "axi", "ref"; 1082 #sound-dai-cells = <0x0>; 1083 linux,phandle = <0x19>; 1084 phandle = <0x19>; 1085 }; 1086 }; 1087 1088 adv7511_hdmi_snd { 1089 compatible = "simple-audio-card"; 1090 simple-audio-card,name = "HDMI monitor"; 1091 simple-audio-card,widgets = "Speaker", "Speaker"; 1092 simple-audio-card,routing = "Speaker", "TX"; 1093 1094 simple-audio-card,dai-link@0 { 1095 format = "spdif"; 1096 1097 cpu { 1098 sound-dai = <0x17>; 1099 frame-master; 1100 bitclock-master; 1101 }; 1102 1103 codec { 1104 sound-dai = <0x18>; 1105 }; 1106 }; 1107 }; 1108 1109 zed_sound { 1110 compatible = "simple-audio-card"; 1111 simple-audio-card,name = "ZED ADAU1761"; 1112 simple-audio-card,widgets = "Microphone", "Mic In", "Headphone", "Headphone Out", "Line", "Line In", "Line", "Line Out"; 1113 simple-audio-card,routing = "Line Out", "LOUT", "Line Out", "ROUT", "Headphone Out", "LHP", "Headphone Out", "RHP", "Mic In", "MICBIAS", "LINN", "Mic In", "RINN", "Mic In", "LAUX", "Line In", "RAUX", "Line In"; 1114 1115 simple-audio-card,dai-link@0 { 1116 format = "i2s"; 1117 1118 cpu { 1119 sound-dai = <0x19>; 1120 frame-master; 1121 bitclock-master; 1122 }; 1123 1124 codec { 1125 sound-dai = <0x1a>; 1126 }; 1127 }; 1128 }; 1129 1130 leds { 1131 compatible = "gpio-leds"; 1132 1133 led0 { 1134 label = "led0:red"; 1135 gpios = <0x6 0x3d 0x0>; 1136 }; 1137 1138 led1 { 1139 label = "led1:red"; 1140 gpios = <0x6 0x3b 0x0>; 1141 }; 1142 1143 led2 { 1144 label = "led2:red"; 1145 gpios = <0x6 0x3a 0x0>; 1146 }; 1147 1148 led3 { 1149 label = "led3:red"; 1150 gpios = <0x6 0x3c 0x0>; 1151 }; 1152 }; 1153 1154 gpio_keys { 1155 compatible = "gpio-keys"; 1156 #address-cells = <0x1>; 1157 #size-cells = <0x0>; 1158 autorepeat; 1159 1160 bt0 { 1161 label = "BT0"; 1162 linux,code = <0x69>; 1163 gpios = <0x6 0x36 0x0>; 1164 }; 1165 1166 bt1 { 1167 label = "BT1"; 1168 linux,code = <0x6a>; 1169 gpios = <0x6 0x37 0x0>; 1170 }; 1171 1172 bt2 { 1173 label = "BT2"; 1174 linux,code = <0x1c>; 1175 gpios = <0x6 0x38 0x0>; 1176 }; 1177 1178 bt3 { 1179 label = "BT3"; 1180 linux,code = <0x1>; 1181 gpios = <0x6 0x39 0x0>; 1182 }; 1183 1184 sw0 { 1185 label = "SW0"; 1186 linux,input-type = <0x5>; 1187 linux,code = <0x0>; 1188 gpios = <0x6 0x41 0x0>; 1189 }; 1190 1191 sw1 { 1192 label = "SW1"; 1193 linux,input-type = <0x5>; 1194 linux,code = <0x1>; 1195 gpios = <0x6 0x3e 0x0>; 1196 }; 1197 1198 sw2 { 1199 label = "SW2"; 1200 linux,input-type = <0x5>; 1201 linux,code = <0x2>; 1202 gpios = <0x6 0x40 0x0>; 1203 }; 1204 1205 sw3 { 1206 label = "SW3"; 1207 linux,input-type = <0x5>; 1208 linux,code = <0x3>; 1209 gpios = <0x6 0x3f 0x0>; 1210 }; 1211 }; 1212}; 1213