1*2ee67178SXianjun JiaoCurrently used driver xilinx_dma-orig.c is based on 552d3f11e374ca0d435aa93a571507819eabdda2 of https://github.com/Xilinx/linux-xlnx ) 2*2ee67178SXianjun Jiao 3*2ee67178SXianjun Jiaoinstruction to generate our customized xilinx dma driver: 4*2ee67178SXianjun Jiao 5*2ee67178SXianjun Jiao./make_xilinx_dma.sh 6*2ee67178SXianjun Jiao 7*2ee67178SXianjun Jiaoinstruction to generate our customized xilinx dma test program: 8*2ee67178SXianjun Jiao 9*2ee67178SXianjun Jiao./make_xilinx_dma_test.sh 10*2ee67178SXianjun Jiao 11*2ee67178SXianjun Jiaotest dma driver on board: login to zc706, then: 12*2ee67178SXianjun Jiao 13*2ee67178SXianjun Jiao rm axidmatest.ko 14*2ee67178SXianjun Jiao wget ftp://192.168.10.1/driver/xilinx_dma/axidmatest.ko 15*2ee67178SXianjun Jiao rm ddc.ko 16*2ee67178SXianjun Jiao wget ftp://192.168.10.1/driver/ddc/ddc.ko 17*2ee67178SXianjun Jiao rm xilinx_dma.ko 18*2ee67178SXianjun Jiao wget ftp://192.168.10.1/driver/xilinx_dma/xilinx_dma.ko 19*2ee67178SXianjun Jiao rmmod axidmatest 20*2ee67178SXianjun Jiao rmmod ddc 21*2ee67178SXianjun Jiao rmmod xilinx_dma 22*2ee67178SXianjun Jiao insmod xilinx_dma.ko 23*2ee67178SXianjun Jiao insmod ddc.ko 24*2ee67178SXianjun Jiao insmod axidmatest.ko 25*2ee67178SXianjun Jiao dmesg -c 26*2ee67178SXianjun Jiao 27*2ee67178SXianjun Jiaodmesg will show test result printed by "insmod axidmatest.ko". Like this: 28*2ee67178SXianjun Jiao 29*2ee67178SXianjun Jiao root@analog:~# dmesg -c 30*2ee67178SXianjun Jiao xilinx_dmatest: dropped channel dma5chan0 31*2ee67178SXianjun Jiao xilinx_dmatest: dropped channel dma5chan1 32*2ee67178SXianjun Jiao 33*2ee67178SXianjun Jiao sdr,ddc dev_remove base_addr 0xf14e0000 34*2ee67178SXianjun Jiao sdr,ddc dev_remove ddc_driver_api_inst 0xbf032284 35*2ee67178SXianjun Jiao sdr,ddc dev_remove ddc_api 0xbf032284 36*2ee67178SXianjun Jiao sdr,ddc dev_remove succeed! 37*2ee67178SXianjun Jiao xilinx-vdma 43000000.axivdma: Xilinx AXI VDMA Engine Driver Probed!! 38*2ee67178SXianjun Jiao xilinx-vdma 80400000.dma: Xilinx AXI DMA Engine Driver Probed!! 39*2ee67178SXianjun Jiao xilinx-vdma 80410000.dma: Xilinx AXI DMA Engine Driver Probed!! 40*2ee67178SXianjun Jiao 41*2ee67178SXianjun Jiao sdr,ddc dev_probe match! 42*2ee67178SXianjun Jiao sdr,ddc dev_probe io start 0x83c20000 end 0x83c2ffff name /fpga-axi@0/rx_intf@83c20000 flags 0x00000200 desc 0x00000000 43*2ee67178SXianjun Jiao sdr,ddc dev_probe base_addr 0xf18e0000 44*2ee67178SXianjun Jiao sdr,ddc dev_probe ddc_driver_api_inst 0xbf0e1284 45*2ee67178SXianjun Jiao sdr,ddc dev_probe ddc_api 0xbf0e1284 46*2ee67178SXianjun Jiao sdr,ddc dev_probe reset tsf timer 47*2ee67178SXianjun Jiao sdr,ddc dev_probe tsf timer runtime read 1 33007 100015us 48*2ee67178SXianjun Jiao sdr,ddc dev_probe succeed! 49*2ee67178SXianjun Jiao sdr,ddc hw_init mode 0 50*2ee67178SXianjun Jiao sdr,ddc hw_init mode DDC_AXIS_LOOP_BACK 51*2ee67178SXianjun Jiao sdr,ddc hw_init err 0 52*2ee67178SXianjun Jiao dmatest: Started 1 threads using dma5chan0 dma5chan1 53*2ee67178SXianjun Jiao align 3 54*2ee67178SXianjun Jiao sdr,ddc hw_init mode 0 55*2ee67178SXianjun Jiao sdr,ddc hw_init mode DDC_AXIS_LOOP_BACK 56*2ee67178SXianjun Jiao sdr,ddc hw_init err 0 57*2ee67178SXianjun Jiao tx_tmo 99 status 0 len 6448 DMA_COMPLETE 0 58*2ee67178SXianjun Jiao dma5chan0-dma5c: verifying source buffer... 59*2ee67178SXianjun Jiao dma5chan0-dma5c: verifying dest buffer... 60*2ee67178SXianjun Jiao dma5chan0-dma5c: #0: No errors with 61*2ee67178SXianjun Jiao src_off=0x448 dst_off=0x568 len=0x1930 62*2ee67178SXianjun Jiao align 3 63*2ee67178SXianjun Jiao sdr,ddc hw_init mode 0 64*2ee67178SXianjun Jiao sdr,ddc hw_init mode DDC_AXIS_LOOP_BACK 65*2ee67178SXianjun Jiao sdr,ddc hw_init err 0 66*2ee67178SXianjun Jiao tx_tmo 100 status 0 len 3248 DMA_COMPLETE 0 67*2ee67178SXianjun Jiao dma5chan0-dma5c: verifying source buffer... 68*2ee67178SXianjun Jiao dma5chan0-dma5c: verifying dest buffer... 69*2ee67178SXianjun Jiao dma5chan0-dma5c: #1: No errors with 70*2ee67178SXianjun Jiao src_off=0x458 dst_off=0xf08 len=0xcb0 71*2ee67178SXianjun Jiao align 3 72*2ee67178SXianjun Jiao sdr,ddc hw_init mode 0 73*2ee67178SXianjun Jiao sdr,ddc hw_init mode DDC_AXIS_LOOP_BACK 74*2ee67178SXianjun Jiao sdr,ddc hw_init err 0 75*2ee67178SXianjun Jiao tx_tmo 100 status 0 len 8112 DMA_COMPLETE 0 76*2ee67178SXianjun Jiao dma5chan0-dma5c: verifying source buffer... 77*2ee67178SXianjun Jiao dma5chan0-dma5c: verifying dest buffer... 78*2ee67178SXianjun Jiao dma5chan0-dma5c: #2: No errors with 79*2ee67178SXianjun Jiao src_off=0x10 dst_off=0x20 len=0x1fb0 80*2ee67178SXianjun Jiao align 3 81*2ee67178SXianjun Jiao sdr,ddc hw_init mode 0 82*2ee67178SXianjun Jiao sdr,ddc hw_init mode DDC_AXIS_LOOP_BACK 83*2ee67178SXianjun Jiao sdr,ddc hw_init err 0 84*2ee67178SXianjun Jiao tx_tmo 100 status 0 len 840 DMA_COMPLETE 0 85*2ee67178SXianjun Jiao dma5chan0-dma5c: verifying source buffer... 86*2ee67178SXianjun Jiao dma5chan0-dma5c: verifying dest buffer... 87*2ee67178SXianjun Jiao dma5chan0-dma5c: #3: No errors with 88*2ee67178SXianjun Jiao src_off=0x1890 dst_off=0x1268 len=0x348 89*2ee67178SXianjun Jiao align 3 90*2ee67178SXianjun Jiao sdr,ddc hw_init mode 0 91*2ee67178SXianjun Jiao sdr,ddc hw_init mode DDC_AXIS_LOOP_BACK 92*2ee67178SXianjun Jiao sdr,ddc hw_init err 0 93*2ee67178SXianjun Jiao tx_tmo 100 status 0 len 7816 DMA_COMPLETE 0 94*2ee67178SXianjun Jiao dma5chan0-dma5c: verifying source buffer... 95*2ee67178SXianjun Jiao dma5chan0-dma5c: verifying dest buffer... 96*2ee67178SXianjun Jiao dma5chan0-dma5c: #4: No errors with 97*2ee67178SXianjun Jiao src_off=0x80 dst_off=0x168 len=0x1e88 98*2ee67178SXianjun Jiao dma5chan0-dma5c: terminating after 5 tests, 0 failures (status 0) 99*2ee67178SXianjun Jiao 100