1 // Author: Xianjun Jiao, Michael Mehari, Wei Liu 2 // SPDX-FileCopyrightText: 2019 UGent 3 // SPDX-License-Identifier: AGPL-3.0-or-later 4 5 #ifndef OPENWIFI_SDR 6 #define OPENWIFI_SDR 7 8 #include "pre_def.h" 9 10 // -------------------for leds-------------------------------- 11 struct gpio_led_data { //please always align with the leds-gpio.c in linux kernel 12 struct led_classdev cdev; 13 struct gpio_desc *gpiod; 14 u8 can_sleep; 15 u8 blinking; 16 gpio_blink_set_t platform_gpio_blink_set; 17 }; 18 19 struct gpio_leds_priv { //please always align with the leds-gpio.c in linux kernel 20 int num_leds; 21 struct gpio_led_data leds[]; 22 }; 23 24 struct openwifi_rf_ops { 25 char *name; 26 // void (*init)(struct ieee80211_hw *); 27 // void (*stop)(struct ieee80211_hw *); 28 void (*set_chan)(struct ieee80211_hw *, struct ieee80211_conf *); 29 // u8 (*calc_rssi)(u8 agc, u8 sq); 30 }; 31 32 struct openwifi_buffer_descriptor { 33 // u32 num_dma_byte; 34 // u32 sn; 35 // u32 hw_queue_idx; 36 // u32 retry_limit; 37 // u32 need_ack; 38 u8 prio; 39 u16 len_mpdu; 40 u16 seq_no; 41 struct sk_buff *skb_linked; 42 dma_addr_t dma_mapping_addr; 43 // u32 reserved; 44 } __packed; 45 46 struct openwifi_ring { 47 struct openwifi_buffer_descriptor *bds; 48 u32 bd_wr_idx; 49 u32 bd_rd_idx; 50 int stop_flag; // -1: normal run; X>=0: stop due to queueX full 51 // u32 num_dma_symbol_request; 52 // u32 reserved; 53 } __packed; 54 55 struct openwifi_vif { 56 struct ieee80211_hw *dev; 57 58 int idx; // this vif's idx on the dev 59 60 /* beaconing */ 61 struct delayed_work beacon_work; 62 bool enable_beacon; 63 }; 64 65 union u32_byte4 { 66 u32 a; 67 u8 c[4]; 68 }; 69 union u16_byte2 { 70 u16 a; 71 u8 c[2]; 72 }; 73 74 #define MAX_NUM_LED 4 75 #define OPENWIFI_LED_MAX_NAME_LEN 32 76 77 #define NUM_TX_ANT_MASK 3 78 #define NUM_RX_ANT_MASK 3 79 80 // -------------sdrctl reg category----------------- 81 enum sdrctl_reg_cat { 82 SDRCTL_REG_CAT_NO_USE = 0, 83 SDRCTL_REG_CAT_RF, 84 SDRCTL_REG_CAT_RX_INTF, 85 SDRCTL_REG_CAT_TX_INTF, 86 SDRCTL_REG_CAT_RX, 87 SDRCTL_REG_CAT_TX, 88 SDRCTL_REG_CAT_XPU, 89 SDRCTL_REG_CAT_DRV_RX, 90 SDRCTL_REG_CAT_DRV_TX, 91 SDRCTL_REG_CAT_DRV_XPU, 92 }; 93 94 // ------------ software and RF reg definition ------------ 95 #define MAX_NUM_DRV_REG 8 96 #define DRV_TX_REG_IDX_RATE 0 97 #define DRV_TX_REG_IDX_RATE_HT 1 98 #define DRV_TX_REG_IDX_RATE_VHT 2 99 #define DRV_TX_REG_IDX_RATE_HE 3 100 #define DRV_TX_REG_IDX_ANT_CFG 4 101 #define DRV_TX_REG_IDX_PRINT_CFG (MAX_NUM_DRV_REG-1) 102 103 #define DRV_RX_REG_IDX_DEMOD_TH 0 104 #define DRV_RX_REG_IDX_ANT_CFG 4 105 #define DRV_RX_REG_IDX_PRINT_CFG (MAX_NUM_DRV_REG-1) 106 107 #define DRV_XPU_REG_IDX_LBT_TH 0 108 #define DRV_XPU_REG_IDX_GIT_REV (MAX_NUM_DRV_REG-1) 109 110 #define MAX_NUM_RF_REG 8 111 #define RF_TX_REG_IDX_ATT 0 112 #define RF_TX_REG_IDX_FREQ_MHZ 1 113 #define RF_RX_REG_IDX_GAIN 4 114 #define RF_RX_REG_IDX_FREQ_MHZ 5 115 // ------end of software and RF reg definition ------------ 116 117 // -------------dmesg printk control flag------------------ 118 #define DMESG_LOG_ERROR (1<<0) 119 #define DMESG_LOG_UNICAST (1<<1) 120 #define DMESG_LOG_BROADCAST (1<<2) 121 #define DMESG_LOG_NORMAL_QUEUE_STOP (1<<3) 122 #define DMESG_LOG_ANY (0xF) 123 124 // ------end of dmesg printk control flag------------------ 125 126 #define MAX_NUM_VIF 4 127 128 //#define LEN_PHY_HEADER 16 129 #define LEN_PHY_CRC 4 130 #define LEN_MPDU_DELIM 4 131 132 #define RING_ROOM_THRESHOLD 2 133 #define NUM_BIT_NUM_TX_BD 6 134 #define NUM_TX_BD (1<<NUM_BIT_NUM_TX_BD) // !!! should align to the fifo size in tx_bit_intf.v 135 136 #ifdef USE_NEW_RX_INTERRUPT 137 #define NUM_RX_BD 64 138 #else 139 #define NUM_RX_BD 16 140 #endif 141 142 #define TX_BD_BUF_SIZE (8192) 143 #define RX_BD_BUF_SIZE (2048) 144 145 #define NUM_BIT_MAX_NUM_HW_QUEUE 2 146 #define MAX_NUM_HW_QUEUE 4 // number of queue in FPGA 147 #define MAX_NUM_SW_QUEUE 4 // number of queue in Linux, depends on the number we report by dev->queues in openwifi_dev_probe 148 #define NUM_BIT_MAX_PHY_TX_SN 10 // decrease 12 to 10 to reserve 2 bits storing related linux prio idx 149 #define MAX_PHY_TX_SN ((1<<NUM_BIT_MAX_PHY_TX_SN)-1) 150 151 #define AD9361_RADIO_OFF_TX_ATT 89750 //please align with ad9361.c 152 #define AD9361_RADIO_ON_TX_ATT 000 //please align with rf_init.sh 153 #define AD9361_CTRL_OUT_EN_MASK (0xFF) 154 #define AD9361_CTRL_OUT_INDEX_ANT0 (0x16) 155 #define AD9361_CTRL_OUT_INDEX_ANT1 (0x17) 156 157 #define SDR_SUPPORTED_FILTERS \ 158 (FIF_ALLMULTI | \ 159 FIF_BCN_PRBRESP_PROMISC | \ 160 FIF_CONTROL | \ 161 FIF_OTHER_BSS | \ 162 FIF_PSPOLL | \ 163 FIF_PROBE_REQ) 164 165 #define HIGH_PRIORITY_DISCARD_FLAG ((~0x040)<<16) // don't force drop OTHER_BSS by high priority discard 166 //#define HIGH_PRIORITY_DISCARD_FLAG ((~0x140)<<16) // don't force drop OTHER_BSS and PROB_REQ by high priority discard 167 168 /* 5G chan 36 - chan 64*/ 169 #define SDR_5GHZ_CH36_64 REG_RULE(5150-10, 5350+10, 80, 0, 20, 0) 170 /* 5G chan 32 - chan 173*/ 171 #define SDR_5GHZ_CH32_173 REG_RULE(5160-10, 5865+10, 80, 0, 20, 0) 172 /* 5G chan 36 - chan 48*/ 173 #define SDR_5GHZ_CH36_48 REG_RULE(5150-10, 5270+10, 80, 0, 20, 0) 174 175 /* 176 *Only these channels all allow active 177 *scan on all world regulatory domains 178 */ 179 #define SDR_2GHZ_CH01_13 REG_RULE(2412-10, 2472+10, 40, 0, 20, NL80211_RRF_NO_CCK) // disable 11b 180 #define SDR_2GHZ_CH01_14 REG_RULE(2412-10, 2484+10, 40, 0, 20, NL80211_RRF_NO_CCK) // disable 11b 181 182 // regulatory.h alpha2 183 // * 00 - World regulatory domain 184 // * 99 - built by driver but a specific alpha2 cannot be determined 185 // * 98 - result of an intersection between two regulatory domains 186 // * 97 - regulatory domain has not yet been configured 187 static const struct ieee80211_regdomain sdr_regd = { // for wiphy_apply_custom_regulatory 188 .n_reg_rules = 2, 189 .alpha2 = "99", 190 .dfs_region = NL80211_DFS_ETSI, 191 .reg_rules = { 192 //SDR_2GHZ_CH01_13, 193 //SDR_5GHZ_CH36_48, //Avoid radar! 194 SDR_2GHZ_CH01_14, 195 // SDR_5GHZ_CH36_64, 196 SDR_5GHZ_CH32_173, 197 } 198 }; 199 200 #define CHAN2G(_channel, _freq, _flags) { \ 201 .band = NL80211_BAND_2GHZ, \ 202 .hw_value = (_channel), \ 203 .center_freq = (_freq), \ 204 .flags = (_flags), \ 205 .max_antenna_gain = 0, \ 206 .max_power = 0, \ 207 } 208 209 #define CHAN5G(_channel, _freq, _flags) { \ 210 .band = NL80211_BAND_5GHZ, \ 211 .hw_value = (_channel), \ 212 .center_freq = (_freq), \ 213 .flags = (_flags), \ 214 .max_antenna_gain = 0, \ 215 .max_power = 0, \ 216 } 217 218 static const struct ieee80211_rate openwifi_5GHz_rates[] = { 219 { .bitrate = 10, .hw_value = 0, .flags = 0}, 220 { .bitrate = 20, .hw_value = 1, .flags = 0}, 221 { .bitrate = 55, .hw_value = 2, .flags = 0}, 222 { .bitrate = 110, .hw_value = 3, .flags = 0}, 223 { .bitrate = 60, .hw_value = 4, .flags = IEEE80211_RATE_MANDATORY_A}, 224 { .bitrate = 90, .hw_value = 5, .flags = IEEE80211_RATE_MANDATORY_A}, 225 { .bitrate = 120, .hw_value = 6, .flags = IEEE80211_RATE_MANDATORY_A}, 226 { .bitrate = 180, .hw_value = 7, .flags = IEEE80211_RATE_MANDATORY_A}, 227 { .bitrate = 240, .hw_value = 8, .flags = IEEE80211_RATE_MANDATORY_A}, 228 { .bitrate = 360, .hw_value = 9, .flags = IEEE80211_RATE_MANDATORY_A}, 229 { .bitrate = 480, .hw_value = 10, .flags = IEEE80211_RATE_MANDATORY_A}, 230 { .bitrate = 540, .hw_value = 11, .flags = IEEE80211_RATE_MANDATORY_A}, 231 }; 232 233 static const struct ieee80211_rate openwifi_2GHz_rates[] = { 234 { .bitrate = 10, .hw_value = 0, .flags = 0}, 235 { .bitrate = 20, .hw_value = 1, .flags = 0}, 236 { .bitrate = 55, .hw_value = 2, .flags = 0}, 237 { .bitrate = 110, .hw_value = 3, .flags = 0}, 238 { .bitrate = 60, .hw_value = 4, .flags = IEEE80211_RATE_MANDATORY_G|IEEE80211_RATE_ERP_G}, 239 { .bitrate = 90, .hw_value = 5, .flags = IEEE80211_RATE_MANDATORY_G|IEEE80211_RATE_ERP_G}, 240 { .bitrate = 120, .hw_value = 6, .flags = IEEE80211_RATE_MANDATORY_G|IEEE80211_RATE_ERP_G}, 241 { .bitrate = 180, .hw_value = 7, .flags = IEEE80211_RATE_MANDATORY_G|IEEE80211_RATE_ERP_G}, 242 { .bitrate = 240, .hw_value = 8, .flags = IEEE80211_RATE_MANDATORY_G|IEEE80211_RATE_ERP_G}, 243 { .bitrate = 360, .hw_value = 9, .flags = IEEE80211_RATE_MANDATORY_G|IEEE80211_RATE_ERP_G}, 244 { .bitrate = 480, .hw_value = 10, .flags = IEEE80211_RATE_MANDATORY_G|IEEE80211_RATE_ERP_G}, 245 { .bitrate = 540, .hw_value = 11, .flags = IEEE80211_RATE_MANDATORY_G|IEEE80211_RATE_ERP_G}, 246 }; 247 248 static const struct ieee80211_channel openwifi_2GHz_channels[] = { 249 CHAN2G(1, 2412, 0), 250 CHAN2G(2, 2417, 0), 251 CHAN2G(3, 2422, 0), 252 CHAN2G(4, 2427, 0), 253 CHAN2G(5, 2432, 0), 254 CHAN2G(6, 2437, 0), 255 CHAN2G(7, 2442, 0), 256 CHAN2G(8, 2447, 0), 257 CHAN2G(9, 2452, 0), 258 CHAN2G(10, 2457, 0), 259 CHAN2G(11, 2462, 0), 260 CHAN2G(12, 2467, 0), 261 CHAN2G(13, 2472, 0), 262 // CHAN2G(14, 2484, 0), 263 }; 264 265 static const struct ieee80211_channel openwifi_5GHz_channels[] = { 266 // CHAN5G(32, 5160, 0), 267 // CHAN5G(34, 5170, 0), 268 CHAN5G(36, 5180, 0), 269 CHAN5G(38, 5190, 0), 270 CHAN5G(40, 5200, 0), 271 CHAN5G(42, 5210, 0), 272 CHAN5G(44, 5220, 0), 273 CHAN5G(46, 5230, 0), 274 CHAN5G(48, 5240, 0), 275 // CHAN5G( 50, 5250, IEEE80211_CHAN_RADAR), 276 CHAN5G( 52, 5260, IEEE80211_CHAN_RADAR), 277 // CHAN5G( 54, 5270, IEEE80211_CHAN_RADAR), 278 CHAN5G( 56, 5280, IEEE80211_CHAN_RADAR), 279 // CHAN5G( 58, 5290, IEEE80211_CHAN_RADAR), 280 CHAN5G( 60, 5300, IEEE80211_CHAN_RADAR), 281 // CHAN5G( 62, 5310, IEEE80211_CHAN_RADAR), 282 CHAN5G( 64, 5320, IEEE80211_CHAN_RADAR), 283 // CHAN5G( 68, 5340, IEEE80211_CHAN_RADAR), 284 // CHAN5G( 96, 5480, IEEE80211_CHAN_RADAR), 285 // CHAN5G(100, 5500, IEEE80211_CHAN_RADAR), 286 // CHAN5G(102, 5510, IEEE80211_CHAN_RADAR), 287 // CHAN5G(104, 5520, IEEE80211_CHAN_RADAR), 288 // CHAN5G(106, 5530, IEEE80211_CHAN_RADAR), 289 // CHAN5G(108, 5540, IEEE80211_CHAN_RADAR), 290 // CHAN5G(110, 5550, IEEE80211_CHAN_RADAR), 291 // CHAN5G(112, 5560, IEEE80211_CHAN_RADAR), 292 // CHAN5G(114, 5570, IEEE80211_CHAN_RADAR), 293 // CHAN5G(116, 5580, IEEE80211_CHAN_RADAR), 294 // CHAN5G(118, 5590, IEEE80211_CHAN_RADAR), 295 // CHAN5G(120, 5600, IEEE80211_CHAN_RADAR), 296 // CHAN5G(122, 5610, IEEE80211_CHAN_RADAR), 297 // CHAN5G(124, 5620, IEEE80211_CHAN_RADAR), 298 // CHAN5G(126, 5630, IEEE80211_CHAN_RADAR), 299 // CHAN5G(128, 5640, IEEE80211_CHAN_RADAR), 300 // CHAN5G(132, 5660, IEEE80211_CHAN_RADAR), 301 // CHAN5G(134, 5670, IEEE80211_CHAN_RADAR), 302 // CHAN5G(136, 5680, IEEE80211_CHAN_RADAR), 303 // CHAN5G(138, 5690, IEEE80211_CHAN_RADAR), 304 // CHAN5G(140, 5700, IEEE80211_CHAN_RADAR), 305 // CHAN5G(142, 5710, IEEE80211_CHAN_RADAR), 306 // CHAN5G(144, 5720, IEEE80211_CHAN_RADAR), 307 // CHAN5G(149, 5745, IEEE80211_CHAN_RADAR), 308 // CHAN5G(151, 5755, IEEE80211_CHAN_RADAR), 309 // CHAN5G(153, 5765, IEEE80211_CHAN_RADAR), 310 // CHAN5G(155, 5775, IEEE80211_CHAN_RADAR), 311 // CHAN5G(157, 5785, IEEE80211_CHAN_RADAR), 312 // CHAN5G(159, 5795, IEEE80211_CHAN_RADAR), 313 // CHAN5G(161, 5805, IEEE80211_CHAN_RADAR), 314 // // CHAN5G(163, 5815, IEEE80211_CHAN_RADAR), 315 // CHAN5G(165, 5825, IEEE80211_CHAN_RADAR), 316 // CHAN5G(167, 5835, IEEE80211_CHAN_RADAR), 317 // CHAN5G(169, 5845, IEEE80211_CHAN_RADAR), 318 // CHAN5G(171, 5855, IEEE80211_CHAN_RADAR), 319 // CHAN5G(173, 5865, IEEE80211_CHAN_RADAR), 320 }; 321 322 static const struct ieee80211_iface_limit openwifi_if_limits[] = { 323 { .max = MAX_NUM_VIF, .types = BIT(NL80211_IFTYPE_STATION) }, 324 { .max = MAX_NUM_VIF, .types = 325 #ifdef CONFIG_MAC80211_MESH 326 BIT(NL80211_IFTYPE_MESH_POINT) | 327 #endif 328 BIT(NL80211_IFTYPE_AP)}, 329 }; 330 331 static const struct ieee80211_iface_combination openwifi_if_comb = { 332 .limits = openwifi_if_limits, 333 .n_limits = ARRAY_SIZE(openwifi_if_limits), 334 .max_interfaces = MAX_NUM_VIF, 335 .num_different_channels = 1, 336 .radar_detect_widths = BIT(NL80211_CHAN_WIDTH_20_NOHT) | 337 BIT(NL80211_CHAN_WIDTH_20) | 338 BIT(NL80211_CHAN_WIDTH_40) | 339 BIT(NL80211_CHAN_WIDTH_80), 340 }; 341 342 static const u8 wifi_rate_table_mapping[24] = { 0, 0, 0, 0, 0, 0, 0, 0, 10, 8, 6, 4, 11, 9, 7, 5, 0, 1, 2, 3, 4, 5, 6, 7}; 343 static const u16 wifi_rate_table[24] = { 0, 0, 0, 0, 0, 0, 0, 0, 480, 240, 120, 60, 540, 360, 180, 90, 65, 130, 195, 260, 390, 520, 585, 650}; 344 static const u16 wifi_rate_all[20] = {10, 20, 55, 110, 60, 90, 120, 180, 240, 360, 480, 540, 65, 130, 195, 260, 390, 520, 585, 650}; 345 static const u8 wifi_mcs_table_11b_force_up[16] = {11, 11, 11, 11, 11, 15, 10, 14, 9, 13, 8, 12, 0, 0, 0, 0}; 346 static const u16 wifi_n_dbps_table[16] = {24, 24, 24, 24, 24, 36, 48, 72, 96, 144, 192, 216, 0, 0, 0, 0}; 347 static const u16 wifi_n_dbps_ht_table[16] = {26, 26, 26, 26, 26, 52, 78, 104, 156, 208, 234, 260, 0, 0, 0, 0}; 348 // static const u8 wifi_mcs_table[8] = {6,9,12,18,24,36,48,54}; 349 // static const u8 wifi_mcs_table_phy_tx[8] = {11,15,10,14,9,13,8,12}; 350 351 // ===== copy from adi-linux/drivers/iio/frequency/cf_axi_dds.c ===== 352 struct cf_axi_dds_state { 353 struct device *dev_spi; 354 struct clk *clk; 355 struct cf_axi_dds_chip_info *chip_info; 356 struct gpio_desc *plddrbypass_gpio; 357 struct gpio_desc *interpolation_gpio; 358 359 bool standalone; 360 bool dp_disable; 361 bool enable; 362 bool pl_dma_fifo_en; 363 enum fifo_ctrl gpio_dma_fifo_ctrl; 364 365 struct iio_info iio_info; 366 size_t regs_size; 367 void __iomem *regs; 368 void __iomem *slave_regs; 369 void __iomem *master_regs; 370 u64 dac_clk; 371 unsigned int ddr_dds_interp_en; 372 unsigned int cached_freq[16]; 373 unsigned int version; 374 unsigned int have_slave_channels; 375 unsigned int interpolation_factor; 376 struct notifier_block clk_nb; 377 }; 378 // ===== end of copy from adi-linux/drivers/iio/frequency/cf_axi_dds.c ===== 379 380 struct openwifi_stat { 381 u32 stat_enable; 382 383 u32 tx_prio_num[MAX_NUM_SW_QUEUE]; 384 u32 tx_prio_interrupt_num[MAX_NUM_SW_QUEUE]; 385 u32 tx_prio_stop0_fake_num[MAX_NUM_SW_QUEUE]; 386 u32 tx_prio_stop0_real_num[MAX_NUM_SW_QUEUE]; 387 u32 tx_prio_stop1_num[MAX_NUM_SW_QUEUE]; 388 u32 tx_prio_wakeup_num[MAX_NUM_SW_QUEUE]; 389 390 u32 tx_queue_num[MAX_NUM_HW_QUEUE]; 391 u32 tx_queue_interrupt_num[MAX_NUM_HW_QUEUE]; 392 u32 tx_queue_stop0_fake_num[MAX_NUM_HW_QUEUE]; 393 u32 tx_queue_stop0_real_num[MAX_NUM_HW_QUEUE]; 394 u32 tx_queue_stop1_num[MAX_NUM_HW_QUEUE]; 395 u32 tx_queue_wakeup_num[MAX_NUM_HW_QUEUE]; 396 397 u32 tx_data_pkt_need_ack_num_total; 398 u32 tx_data_pkt_need_ack_num_total_fail; 399 400 u32 tx_data_pkt_need_ack_num_retx[6]; 401 u32 tx_data_pkt_need_ack_num_retx_fail[6]; 402 403 u32 tx_data_pkt_mcs_realtime; 404 u32 tx_data_pkt_fail_mcs_realtime; 405 406 u32 tx_mgmt_pkt_need_ack_num_total; 407 u32 tx_mgmt_pkt_need_ack_num_total_fail; 408 409 u32 tx_mgmt_pkt_need_ack_num_retx[3]; 410 u32 tx_mgmt_pkt_need_ack_num_retx_fail[3]; 411 412 u32 tx_mgmt_pkt_mcs_realtime; 413 u32 tx_mgmt_pkt_fail_mcs_realtime; 414 415 u32 rx_target_sender_mac_addr; 416 u32 rx_data_ok_agc_gain_value_realtime; 417 u32 rx_data_fail_agc_gain_value_realtime; 418 u32 rx_mgmt_ok_agc_gain_value_realtime; 419 u32 rx_mgmt_fail_agc_gain_value_realtime; 420 u32 rx_ack_ok_agc_gain_value_realtime; 421 422 u32 rx_monitor_all; 423 u32 rx_data_pkt_num_total; 424 u32 rx_data_pkt_num_fail; 425 u32 rx_mgmt_pkt_num_total; 426 u32 rx_mgmt_pkt_num_fail; 427 u32 rx_ack_pkt_num_total; 428 u32 rx_ack_pkt_num_fail; 429 430 u32 rx_data_pkt_mcs_realtime; 431 u32 rx_data_pkt_fail_mcs_realtime; 432 u32 rx_mgmt_pkt_mcs_realtime; 433 u32 rx_mgmt_pkt_fail_mcs_realtime; 434 u32 rx_ack_pkt_mcs_realtime; 435 436 u32 restrict_freq_mhz; 437 438 u32 csma_cfg0; 439 u32 cw_max_min_cfg; 440 441 u32 dbg_ch0; 442 u32 dbg_ch1; 443 u32 dbg_ch2; 444 }; 445 446 #define RX_DMA_CYCLIC_MODE 447 struct openwifi_priv { 448 struct platform_device *pdev; 449 struct ieee80211_vif *vif[MAX_NUM_VIF]; 450 451 const struct openwifi_rf_ops *rf; 452 enum openwifi_fpga_type fpga_type; 453 454 struct cf_axi_dds_state *dds_st; //axi_ad9361 hdl ref design module, dac channel 455 struct axiadc_state *adc_st; //axi_ad9361 hdl ref design module, adc channel 456 struct ad9361_rf_phy *ad9361_phy; //ad9361 chip 457 struct ctrl_outs_control ctrl_out; 458 459 int rx_freq_offset_to_lo_MHz; 460 int tx_freq_offset_to_lo_MHz; 461 u32 rf_bw; 462 u32 actual_rx_lo; 463 u32 actual_tx_lo; 464 u32 last_tx_quad_cal_lo; 465 466 struct ieee80211_rate rates_2GHz[12]; 467 struct ieee80211_rate rates_5GHz[12]; 468 struct ieee80211_channel channels_2GHz[13]; 469 struct ieee80211_channel channels_5GHz[11]; 470 struct ieee80211_supported_band band_2GHz; 471 struct ieee80211_supported_band band_5GHz; 472 bool rfkill_off; 473 u8 runtime_tx_ant_cfg; 474 u8 runtime_rx_ant_cfg; 475 476 int rssi_correction; // dynamic RSSI correction according to current channel in _rf_set_channel() 477 478 enum rx_intf_mode rx_intf_cfg; 479 enum tx_intf_mode tx_intf_cfg; 480 enum openofdm_rx_mode openofdm_rx_cfg; 481 enum openofdm_tx_mode openofdm_tx_cfg; 482 enum xpu_mode xpu_cfg; 483 484 int irq_rx; 485 int irq_tx; 486 487 // u32 call_counter; 488 u8 *rx_cyclic_buf; 489 dma_addr_t rx_cyclic_buf_dma_mapping_addr; 490 struct dma_chan *rx_chan; 491 struct dma_async_tx_descriptor *rxd; 492 dma_cookie_t rx_cookie; 493 494 struct openwifi_ring tx_ring[MAX_NUM_SW_QUEUE]; 495 struct scatterlist tx_sg; 496 struct dma_chan *tx_chan; 497 struct dma_async_tx_descriptor *txd; 498 dma_cookie_t tx_cookie; 499 // struct completion tx_dma_complete; 500 // bool openwifi_tx_first_time_run; 501 502 // int phy_tx_sn; 503 u32 slice_idx; 504 u32 dest_mac_addr_queue_map[MAX_NUM_HW_QUEUE]; 505 u8 mac_addr[ETH_ALEN]; 506 u16 seqno; 507 508 bool use_short_slot; 509 u8 band; 510 u16 channel; 511 512 u32 ampdu_reference; 513 514 u32 drv_rx_reg_val[MAX_NUM_DRV_REG]; 515 u32 drv_tx_reg_val[MAX_NUM_DRV_REG]; 516 u32 drv_xpu_reg_val[MAX_NUM_DRV_REG]; 517 int rf_reg_val[MAX_NUM_RF_REG]; 518 int last_auto_fpga_lbt_th; 519 520 struct bin_attribute bin_iq; 521 u32 tx_intf_arbitrary_iq[512]; 522 u16 tx_intf_arbitrary_iq_num; 523 u8 tx_intf_iq_ctl; 524 525 struct openwifi_stat stat; 526 // u8 num_led; 527 // struct led_classdev *led[MAX_NUM_LED];//zc706 has 4 user leds. please find openwifi_dev_probe to see how we get them. 528 // char led_name[MAX_NUM_LED][OPENWIFI_LED_MAX_NAME_LEN]; 529 530 spinlock_t lock; 531 }; 532 533 #endif /* OPENWIFI_SDR */ 534