xref: /openwifi/driver/sdr.h (revision 088d2d18c43c6a090ad91a5866e9b531f15d0ac7)
1 // Author: Xianjun Jiao, Michael Mehari, Wei Liu
2 // SPDX-FileCopyrightText: 2019 UGent
3 // SPDX-License-Identifier: AGPL-3.0-or-later
4 
5 #ifndef OPENWIFI_SDR
6 #define OPENWIFI_SDR
7 
8 #include "pre_def.h"
9 
10 // -------------------for leds--------------------------------
11 struct gpio_led_data { //please always align with the leds-gpio.c in linux kernel
12 	struct led_classdev cdev;
13 	struct gpio_desc *gpiod;
14 	u8 can_sleep;
15 	u8 blinking;
16 	gpio_blink_set_t platform_gpio_blink_set;
17 };
18 
19 struct gpio_leds_priv { //please always align with the leds-gpio.c in linux kernel
20 	int num_leds;
21 	struct gpio_led_data leds[];
22 };
23 
24 struct openwifi_rf_ops {
25 	char *name;
26 //	void (*init)(struct ieee80211_hw *);
27 //	void (*stop)(struct ieee80211_hw *);
28 	void (*set_chan)(struct ieee80211_hw *, struct ieee80211_conf *);
29 //	u8 (*calc_rssi)(u8 agc, u8 sq);
30 };
31 
32 struct openwifi_buffer_descriptor {
33 	// u32 num_dma_byte;
34     // u32 sn;
35     // u32 hw_queue_idx;
36     // u32 retry_limit;
37     // u32 need_ack;
38     u16 seq_no;
39     struct sk_buff *skb_linked;
40     dma_addr_t dma_mapping_addr;
41     // u32 reserved;
42 } __packed;
43 
44 struct openwifi_ring {
45 	struct openwifi_buffer_descriptor *bds;
46     u32 bd_wr_idx;
47 	u32 bd_rd_idx;
48     u32 stop_flag; // track the stop/wake status between tx interrupt and openwifi_tx
49 	// u32 num_dma_symbol_request;
50 	// u32 reserved;
51 } __packed;
52 
53 struct openwifi_vif {
54 	struct ieee80211_hw *dev;
55 
56 	int idx; // this vif's idx on the dev
57 
58 	/* beaconing */
59 	struct delayed_work beacon_work;
60 	bool enable_beacon;
61 };
62 
63 union u32_byte4 {
64 	u32 a;
65 	u8 c[4];
66 };
67 union u16_byte2 {
68 	u16 a;
69 	u8 c[2];
70 };
71 
72 #define MAX_NUM_LED 4
73 #define OPENWIFI_LED_MAX_NAME_LEN 32
74 
75 #define NUM_TX_ANT_MASK 3
76 #define NUM_RX_ANT_MASK 3
77 
78 // -------------sdrctl reg category-----------------
79 enum sdrctl_reg_cat {
80 	SDRCTL_REG_CAT_NO_USE = 0,
81 	SDRCTL_REG_CAT_RF,
82 	SDRCTL_REG_CAT_RX_INTF,
83 	SDRCTL_REG_CAT_TX_INTF,
84 	SDRCTL_REG_CAT_RX,
85 	SDRCTL_REG_CAT_TX,
86 	SDRCTL_REG_CAT_XPU,
87 	SDRCTL_REG_CAT_DRV_RX,
88 	SDRCTL_REG_CAT_DRV_TX,
89 	SDRCTL_REG_CAT_DRV_XPU,
90 };
91 
92 // ------------ software and RF reg definition ------------
93 #define MAX_NUM_DRV_REG            8
94 #define DRV_TX_REG_IDX_RATE        0
95 #define DRV_TX_REG_IDX_RATE_HT     1
96 #define DRV_TX_REG_IDX_RATE_VHT    2
97 #define DRV_TX_REG_IDX_RATE_HE     3
98 #define DRV_TX_REG_IDX_ANT_CFG     4
99 #define DRV_TX_REG_IDX_PRINT_CFG   (MAX_NUM_DRV_REG-1)
100 
101 #define DRV_RX_REG_IDX_DEMOD_TH    0
102 #define DRV_RX_REG_IDX_ANT_CFG     4
103 #define DRV_RX_REG_IDX_PRINT_CFG   (MAX_NUM_DRV_REG-1)
104 
105 #define DRV_XPU_REG_IDX_LBT_TH     0
106 #define DRV_XPU_REG_IDX_GIT_REV    (MAX_NUM_DRV_REG-1)
107 
108 #define MAX_NUM_RF_REG             8
109 #define RF_TX_REG_IDX_ATT          0
110 #define RF_TX_REG_IDX_FO           1
111 #define RF_RX_REG_IDX_GAIN         4
112 #define RF_RX_REG_IDX_FO           5
113 // ------end of software and RF reg definition ------------
114 
115 // -------------dmesg printk control flag------------------
116 #define DMESG_LOG_ERROR (1<<0)
117 #define DMESG_LOG_UNICAST (1<<1)
118 #define DMESG_LOG_BROADCAST (1<<2)
119 #define DMESG_LOG_NORMAL_QUEUE_STOP (1<<3)
120 #define DMESG_LOG_ANY (0xF)
121 
122 // ------end of dmesg printk control flag------------------
123 
124 #define MAX_NUM_VIF 4
125 
126 //#define LEN_PHY_HEADER 16
127 #define LEN_PHY_CRC 4
128 #define LEN_MPDU_DELIM 4
129 
130 #define RING_ROOM_THRESHOLD 4
131 #define NUM_BIT_NUM_TX_BD 6
132 #define NUM_TX_BD (1<<NUM_BIT_NUM_TX_BD) // !!! should align to the fifo size in tx_bit_intf.v
133 
134 #ifdef USE_NEW_RX_INTERRUPT
135 #define NUM_RX_BD 8
136 #else
137 #define NUM_RX_BD 16
138 #endif
139 
140 #define TX_BD_BUF_SIZE (8192)
141 #define RX_BD_BUF_SIZE (8192)
142 
143 #define NUM_BIT_MAX_NUM_HW_QUEUE 2
144 #define MAX_NUM_HW_QUEUE 4 // number of queue in FPGA
145 #define MAX_NUM_SW_QUEUE 4 // number of queue in Linux, depends on the number we report by dev->queues in openwifi_dev_probe
146 #define NUM_BIT_MAX_PHY_TX_SN 10 // decrease 12 to 10 to reserve 2 bits storing related linux prio idx
147 #define MAX_PHY_TX_SN ((1<<NUM_BIT_MAX_PHY_TX_SN)-1)
148 
149 #define AD9361_RADIO_OFF_TX_ATT 89750 //please align with ad9361.c
150 #define AD9361_RADIO_ON_TX_ATT 000    //please align with rf_init.sh
151 #define AD9361_CTRL_OUT_EN_MASK (0xFF)
152 #define AD9361_CTRL_OUT_INDEX_ANT0 (0x16)
153 #define AD9361_CTRL_OUT_INDEX_ANT1 (0x17)
154 
155 #define SDR_SUPPORTED_FILTERS	\
156 	(FIF_ALLMULTI |				\
157 	FIF_BCN_PRBRESP_PROMISC |	\
158 	FIF_CONTROL |				\
159 	FIF_OTHER_BSS |				\
160 	FIF_PSPOLL |				\
161 	FIF_PROBE_REQ)
162 
163 #define HIGH_PRIORITY_DISCARD_FLAG ((~0x040)<<16) // don't force drop OTHER_BSS by high priority discard
164 //#define HIGH_PRIORITY_DISCARD_FLAG ((~0x140)<<16) // don't force drop OTHER_BSS and PROB_REQ by high priority discard
165 
166 /* 5G chan 36 - chan 64*/
167 #define SDR_5GHZ_CH36_64 REG_RULE(5150-10, 5350+10, 80, 0, 20, 0)
168 /* 5G chan 32 - chan 173*/
169 #define SDR_5GHZ_CH32_173 REG_RULE(5160-10, 5865+10, 80, 0, 20, 0)
170 /* 5G chan 36 - chan 48*/
171 #define SDR_5GHZ_CH36_48 REG_RULE(5150-10, 5270+10, 80, 0, 20, 0)
172 
173 /*
174  *Only these channels all allow active
175  *scan on all world regulatory domains
176  */
177 #define SDR_2GHZ_CH01_13	REG_RULE(2412-10, 2472+10, 40, 0, 20, NL80211_RRF_NO_CCK) // disable 11b
178 #define SDR_2GHZ_CH01_14	REG_RULE(2412-10, 2484+10, 40, 0, 20, NL80211_RRF_NO_CCK) // disable 11b
179 
180 // regulatory.h alpha2
181 //  *	00 - World regulatory domain
182 //  *	99 - built by driver but a specific alpha2 cannot be determined
183 //  *	98 - result of an intersection between two regulatory domains
184 //  *	97 - regulatory domain has not yet been configured
185 static const struct ieee80211_regdomain sdr_regd = { // for wiphy_apply_custom_regulatory
186 	.n_reg_rules = 2,
187 	.alpha2 = "99",
188 	.dfs_region = NL80211_DFS_ETSI,
189 	.reg_rules = {
190 		//SDR_2GHZ_CH01_13,
191 		//SDR_5GHZ_CH36_48, //Avoid radar!
192 		SDR_2GHZ_CH01_14,
193 		// SDR_5GHZ_CH36_64,
194 		SDR_5GHZ_CH32_173,
195 		}
196 };
197 
198 #define CHAN2G(_channel, _freq, _flags) { \
199 	.band			= NL80211_BAND_2GHZ, \
200 	.hw_value		= (_channel), \
201 	.center_freq		= (_freq), \
202 	.flags			= (_flags), \
203 	.max_antenna_gain	= 0, \
204 	.max_power		= 0, \
205 }
206 
207 #define CHAN5G(_channel, _freq, _flags) { \
208 	.band			= NL80211_BAND_5GHZ, \
209 	.hw_value		= (_channel), \
210 	.center_freq		= (_freq), \
211 	.flags			= (_flags), \
212 	.max_antenna_gain	= 0, \
213 	.max_power		= 0, \
214 }
215 
216 static const struct ieee80211_rate openwifi_5GHz_rates[] = {
217 	{ .bitrate = 10,  .hw_value = 0,  .flags = 0},
218 	{ .bitrate = 20,  .hw_value = 1,  .flags = 0},
219 	{ .bitrate = 55,  .hw_value = 2,  .flags = 0},
220 	{ .bitrate = 110, .hw_value = 3,  .flags = 0},
221 	{ .bitrate = 60,  .hw_value = 4,  .flags = IEEE80211_RATE_MANDATORY_A},
222 	{ .bitrate = 90,  .hw_value = 5,  .flags = IEEE80211_RATE_MANDATORY_A},
223 	{ .bitrate = 120, .hw_value = 6,  .flags = IEEE80211_RATE_MANDATORY_A},
224 	{ .bitrate = 180, .hw_value = 7,  .flags = IEEE80211_RATE_MANDATORY_A},
225 	{ .bitrate = 240, .hw_value = 8,  .flags = IEEE80211_RATE_MANDATORY_A},
226 	{ .bitrate = 360, .hw_value = 9,  .flags = IEEE80211_RATE_MANDATORY_A},
227 	{ .bitrate = 480, .hw_value = 10, .flags = IEEE80211_RATE_MANDATORY_A},
228 	{ .bitrate = 540, .hw_value = 11, .flags = IEEE80211_RATE_MANDATORY_A},
229 };
230 
231 static const struct ieee80211_rate openwifi_2GHz_rates[] = {
232 	{ .bitrate = 10,  .hw_value = 0,  .flags = 0},
233 	{ .bitrate = 20,  .hw_value = 1,  .flags = 0},
234 	{ .bitrate = 55,  .hw_value = 2,  .flags = 0},
235 	{ .bitrate = 110, .hw_value = 3,  .flags = 0},
236 	{ .bitrate = 60,  .hw_value = 4,  .flags = IEEE80211_RATE_MANDATORY_G|IEEE80211_RATE_ERP_G},
237 	{ .bitrate = 90,  .hw_value = 5,  .flags = IEEE80211_RATE_MANDATORY_G|IEEE80211_RATE_ERP_G},
238 	{ .bitrate = 120, .hw_value = 6,  .flags = IEEE80211_RATE_MANDATORY_G|IEEE80211_RATE_ERP_G},
239 	{ .bitrate = 180, .hw_value = 7,  .flags = IEEE80211_RATE_MANDATORY_G|IEEE80211_RATE_ERP_G},
240 	{ .bitrate = 240, .hw_value = 8,  .flags = IEEE80211_RATE_MANDATORY_G|IEEE80211_RATE_ERP_G},
241 	{ .bitrate = 360, .hw_value = 9,  .flags = IEEE80211_RATE_MANDATORY_G|IEEE80211_RATE_ERP_G},
242 	{ .bitrate = 480, .hw_value = 10, .flags = IEEE80211_RATE_MANDATORY_G|IEEE80211_RATE_ERP_G},
243 	{ .bitrate = 540, .hw_value = 11, .flags = IEEE80211_RATE_MANDATORY_G|IEEE80211_RATE_ERP_G},
244 };
245 
246 static const struct ieee80211_channel openwifi_2GHz_channels[] = {
247 	CHAN2G(1, 2412, 0),
248 	CHAN2G(2, 2417, 0),
249 	CHAN2G(3, 2422, 0),
250 	CHAN2G(4, 2427, 0),
251 	CHAN2G(5, 2432, 0),
252 	CHAN2G(6, 2437, 0),
253 	CHAN2G(7, 2442, 0),
254 	CHAN2G(8, 2447, 0),
255 	CHAN2G(9, 2452, 0),
256 	CHAN2G(10, 2457, 0),
257 	CHAN2G(11, 2462, 0),
258 	CHAN2G(12, 2467, 0),
259 	CHAN2G(13, 2472, 0),
260 	CHAN2G(14, 2484, 0),
261 };
262 
263 static const struct ieee80211_channel openwifi_5GHz_channels[] = {
264 	CHAN5G(32, 5160, 0),
265 	CHAN5G(34, 5170, 0),
266 	CHAN5G(36, 5180, 0),
267 	CHAN5G(38, 5190, 0),
268 	CHAN5G(40, 5200, 0),
269 	CHAN5G(42, 5210, 0),
270 	CHAN5G(44, 5220, 0),
271 	CHAN5G(46, 5230, 0),
272 	CHAN5G(48, 5240, 0),
273 	CHAN5G( 50, 5250, IEEE80211_CHAN_RADAR),
274 	CHAN5G( 52, 5260, IEEE80211_CHAN_RADAR),
275 	CHAN5G( 54, 5270, IEEE80211_CHAN_RADAR),
276 	CHAN5G( 56, 5280, IEEE80211_CHAN_RADAR),
277 	CHAN5G( 58, 5290, IEEE80211_CHAN_RADAR),
278 	CHAN5G( 60, 5300, IEEE80211_CHAN_RADAR),
279 	CHAN5G( 62, 5310, IEEE80211_CHAN_RADAR),
280 	CHAN5G( 64, 5320, IEEE80211_CHAN_RADAR),
281 	CHAN5G( 68, 5340, IEEE80211_CHAN_RADAR),
282 	CHAN5G( 96, 5480, IEEE80211_CHAN_RADAR),
283 	CHAN5G(100, 5500, IEEE80211_CHAN_RADAR),
284 	CHAN5G(102, 5510, IEEE80211_CHAN_RADAR),
285 	CHAN5G(104, 5520, IEEE80211_CHAN_RADAR),
286 	CHAN5G(106, 5530, IEEE80211_CHAN_RADAR),
287 	CHAN5G(108, 5540, IEEE80211_CHAN_RADAR),
288 	CHAN5G(110, 5550, IEEE80211_CHAN_RADAR),
289 	CHAN5G(112, 5560, IEEE80211_CHAN_RADAR),
290 	CHAN5G(114, 5570, IEEE80211_CHAN_RADAR),
291 	CHAN5G(116, 5580, IEEE80211_CHAN_RADAR),
292 	CHAN5G(118, 5590, IEEE80211_CHAN_RADAR),
293 	CHAN5G(120, 5600, IEEE80211_CHAN_RADAR),
294 	CHAN5G(122, 5610, IEEE80211_CHAN_RADAR),
295 	CHAN5G(124, 5620, IEEE80211_CHAN_RADAR),
296 	CHAN5G(126, 5630, IEEE80211_CHAN_RADAR),
297 	CHAN5G(128, 5640, IEEE80211_CHAN_RADAR),
298 	CHAN5G(132, 5660, IEEE80211_CHAN_RADAR),
299 	CHAN5G(134, 5670, IEEE80211_CHAN_RADAR),
300 	CHAN5G(136, 5680, IEEE80211_CHAN_RADAR),
301 	CHAN5G(138, 5690, IEEE80211_CHAN_RADAR),
302 	CHAN5G(140, 5700, IEEE80211_CHAN_RADAR),
303 	CHAN5G(142, 5710, IEEE80211_CHAN_RADAR),
304 	CHAN5G(144, 5720, IEEE80211_CHAN_RADAR),
305 	CHAN5G(149, 5745, IEEE80211_CHAN_RADAR),
306 	CHAN5G(151, 5755, IEEE80211_CHAN_RADAR),
307 	CHAN5G(153, 5765, IEEE80211_CHAN_RADAR),
308 	CHAN5G(155, 5775, IEEE80211_CHAN_RADAR),
309 	CHAN5G(157, 5785, IEEE80211_CHAN_RADAR),
310 	CHAN5G(159, 5795, IEEE80211_CHAN_RADAR),
311 	CHAN5G(161, 5805, IEEE80211_CHAN_RADAR),
312 	// CHAN5G(163, 5815, IEEE80211_CHAN_RADAR),
313 	CHAN5G(165, 5825, IEEE80211_CHAN_RADAR),
314 	CHAN5G(167, 5835, IEEE80211_CHAN_RADAR),
315 	CHAN5G(169, 5845, IEEE80211_CHAN_RADAR),
316 	CHAN5G(171, 5855, IEEE80211_CHAN_RADAR),
317 	CHAN5G(173, 5865, IEEE80211_CHAN_RADAR),
318 };
319 
320 static const struct ieee80211_iface_limit openwifi_if_limits[] = {
321 	{ .max = MAX_NUM_VIF,	.types = BIT(NL80211_IFTYPE_STATION) },
322 	{ .max = MAX_NUM_VIF,	.types =
323 #ifdef CONFIG_MAC80211_MESH
324 				 BIT(NL80211_IFTYPE_MESH_POINT) |
325 #endif
326 				 BIT(NL80211_IFTYPE_AP)},
327 };
328 
329 static const struct ieee80211_iface_combination openwifi_if_comb = {
330 	.limits = openwifi_if_limits,
331 	.n_limits = ARRAY_SIZE(openwifi_if_limits),
332 	.max_interfaces = MAX_NUM_VIF,
333 	.num_different_channels = 1,
334 	.radar_detect_widths =	BIT(NL80211_CHAN_WIDTH_20_NOHT) |
335 					BIT(NL80211_CHAN_WIDTH_20) |
336 					BIT(NL80211_CHAN_WIDTH_40) |
337 					BIT(NL80211_CHAN_WIDTH_80),
338 };
339 
340 static const u8  wifi_rate_table_mapping[24] =     { 0,  0,  0,   0,  0,  0,   0,   0,  10,   8,   6,   4,  11,   9,   7,  5,   0,    1,   2,   3,   4,   5,   6,   7};
341 static const u16 wifi_rate_table[24] =             { 0,  0,  0,   0,  0,  0,   0,   0, 480, 240, 120,  60, 540, 360, 180, 90,  65,  130, 195, 260, 390, 520, 585, 650};
342 static const u16 wifi_rate_all[20] =               {10, 20, 55, 110, 60, 90, 120, 180, 240, 360, 480, 540,  65, 130, 195, 260, 390, 520, 585, 650};
343 static const u8  wifi_mcs_table_11b_force_up[16] = {11, 11, 11,  11, 11, 15,  10,  14,   9,  13,   8,  12,   0,   0,   0,  0};
344 static const u16 wifi_n_dbps_table[16] =           {24, 24, 24,  24, 24, 36,  48,  72,  96, 144, 192, 216,   0,   0,   0,  0};
345 static const u16 wifi_n_dbps_ht_table[16] =        {26, 26, 26,  26, 26, 52,  78, 104, 156, 208, 234, 260,   0,   0,   0,  0};
346 // static const u8 wifi_mcs_table[8] =             {6,9,12,18,24,36,48,54};
347 // static const u8 wifi_mcs_table_phy_tx[8]    =   {11,15,10,14,9,13,8,12};
348 
349 // ===== copy from adi-linux/drivers/iio/frequency/cf_axi_dds.c =====
350 struct cf_axi_dds_state {
351 	struct device			*dev_spi;
352 	struct clk			*clk;
353 	struct cf_axi_dds_chip_info	*chip_info;
354 	struct gpio_desc		*plddrbypass_gpio;
355 	struct gpio_desc		*interpolation_gpio;
356 
357 	bool				standalone;
358 	bool				dp_disable;
359 	bool				enable;
360 	bool				pl_dma_fifo_en;
361 	enum fifo_ctrl			gpio_dma_fifo_ctrl;
362 
363 	struct iio_info			iio_info;
364 	size_t				regs_size;
365 	void __iomem			*regs;
366 	void __iomem			*slave_regs;
367 	void __iomem			*master_regs;
368 	u64				dac_clk;
369 	unsigned int			ddr_dds_interp_en;
370 	unsigned int			cached_freq[16];
371 	unsigned int			version;
372 	unsigned int			have_slave_channels;
373 	unsigned int			interpolation_factor;
374 	struct notifier_block		clk_nb;
375 };
376 // ===== end of copy from adi-linux/drivers/iio/frequency/cf_axi_dds.c =====
377 
378 #define RX_DMA_CYCLIC_MODE
379 struct openwifi_priv {
380 	struct platform_device *pdev;
381 	struct ieee80211_vif *vif[MAX_NUM_VIF];
382 
383 	const struct openwifi_rf_ops *rf;
384 	enum openwifi_fpga_type fpga_type;
385 
386 	struct cf_axi_dds_state *dds_st;  //axi_ad9361 hdl ref design module, dac channel
387 	struct axiadc_state *adc_st;      //axi_ad9361 hdl ref design module, adc channel
388 	struct ad9361_rf_phy *ad9361_phy; //ad9361 chip
389 	struct ctrl_outs_control ctrl_out;
390 
391 	int rx_freq_offset_to_lo_MHz;
392 	int tx_freq_offset_to_lo_MHz;
393 	u32 rf_bw;
394 	u32 actual_rx_lo;
395 	u32 actual_tx_lo;
396 	u32 last_tx_quad_cal_lo;
397 
398 	struct ieee80211_rate rates_2GHz[12];
399 	struct ieee80211_rate rates_5GHz[12];
400 	struct ieee80211_channel channels_2GHz[14];
401 	struct ieee80211_channel channels_5GHz[53];
402 	struct ieee80211_supported_band band_2GHz;
403 	struct ieee80211_supported_band band_5GHz;
404 	bool rfkill_off;
405 	u8 runtime_tx_ant_cfg;
406 	u8 runtime_rx_ant_cfg;
407 
408 	int rssi_correction; // dynamic RSSI correction according to current channel in _rf_set_channel()
409 
410 	enum rx_intf_mode rx_intf_cfg;
411 	enum tx_intf_mode tx_intf_cfg;
412 	enum openofdm_rx_mode openofdm_rx_cfg;
413 	enum openofdm_tx_mode openofdm_tx_cfg;
414 	enum xpu_mode xpu_cfg;
415 
416 	int irq_rx;
417 	int irq_tx;
418 
419 	// u32 call_counter;
420 	u8 *rx_cyclic_buf;
421 	dma_addr_t rx_cyclic_buf_dma_mapping_addr;
422 	struct dma_chan *rx_chan;
423 	struct dma_async_tx_descriptor *rxd;
424 	dma_cookie_t rx_cookie;
425 
426 	struct openwifi_ring tx_ring[MAX_NUM_SW_QUEUE];
427 	struct scatterlist tx_sg;
428 	struct dma_chan *tx_chan;
429 	struct dma_async_tx_descriptor *txd;
430 	dma_cookie_t tx_cookie;
431 	// struct completion tx_dma_complete;
432 	// bool openwifi_tx_first_time_run;
433 
434 	// int phy_tx_sn;
435 	u32 slice_idx;
436 	u32 dest_mac_addr_queue_map[MAX_NUM_HW_QUEUE];
437 	u8 mac_addr[ETH_ALEN];
438 	u16 seqno;
439 
440 	bool use_short_slot;
441 	u8 band;
442 	u16 channel;
443 
444 	u32 ampdu_reference;
445 
446 	u32 drv_rx_reg_val[MAX_NUM_DRV_REG];
447 	u32 drv_tx_reg_val[MAX_NUM_DRV_REG];
448 	u32 drv_xpu_reg_val[MAX_NUM_DRV_REG];
449 	int rf_reg_val[MAX_NUM_RF_REG];
450 	int last_auto_fpga_lbt_th;
451 	// u8 num_led;
452 	// struct led_classdev *led[MAX_NUM_LED];//zc706 has 4 user leds. please find openwifi_dev_probe to see how we get them.
453 	// char led_name[MAX_NUM_LED][OPENWIFI_LED_MAX_NAME_LEN];
454 
455 	spinlock_t lock;
456 };
457 
458 #endif /* OPENWIFI_SDR */
459