xref: /openwifi/driver/sdr.h (revision 6a9949ee8114a09294710dd454ae0e4862b04a72)
1d8d76f88SJiao Xianjun // Author: Xianjun Jiao, Michael Mehari, Wei Liu
2d8d76f88SJiao Xianjun // SPDX-FileCopyrightText: 2019 UGent
3a6085186SLina Ceballos // SPDX-License-Identifier: AGPL-3.0-or-later
42ee67178SXianjun Jiao 
52ee67178SXianjun Jiao #ifndef OPENWIFI_SDR
62ee67178SXianjun Jiao #define OPENWIFI_SDR
72ee67178SXianjun Jiao 
8109b1cfdSXianjun Jiao #include "pre_def.h"
9109b1cfdSXianjun Jiao 
102ee67178SXianjun Jiao // -------------------for leds--------------------------------
11b1dd94e3Sluz paz struct gpio_led_data { //please always align with the leds-gpio.c in linux kernel
122ee67178SXianjun Jiao 	struct led_classdev cdev;
132ee67178SXianjun Jiao 	struct gpio_desc *gpiod;
142ee67178SXianjun Jiao 	u8 can_sleep;
152ee67178SXianjun Jiao 	u8 blinking;
162ee67178SXianjun Jiao 	gpio_blink_set_t platform_gpio_blink_set;
172ee67178SXianjun Jiao };
182ee67178SXianjun Jiao 
19b1dd94e3Sluz paz struct gpio_leds_priv { //please always align with the leds-gpio.c in linux kernel
202ee67178SXianjun Jiao 	int num_leds;
212ee67178SXianjun Jiao 	struct gpio_led_data leds[];
222ee67178SXianjun Jiao };
232ee67178SXianjun Jiao 
242ee67178SXianjun Jiao struct openwifi_rf_ops {
252ee67178SXianjun Jiao 	char *name;
262ee67178SXianjun Jiao //	void (*init)(struct ieee80211_hw *);
272ee67178SXianjun Jiao //	void (*stop)(struct ieee80211_hw *);
282ee67178SXianjun Jiao 	void (*set_chan)(struct ieee80211_hw *, struct ieee80211_conf *);
292ee67178SXianjun Jiao //	u8 (*calc_rssi)(u8 agc, u8 sq);
302ee67178SXianjun Jiao };
312ee67178SXianjun Jiao 
322ee67178SXianjun Jiao struct openwifi_buffer_descriptor {
33838a9007SXianjun Jiao 	// u32 num_dma_byte;
34838a9007SXianjun Jiao     // u32 sn;
35838a9007SXianjun Jiao     // u32 hw_queue_idx;
36838a9007SXianjun Jiao     // u32 retry_limit;
37838a9007SXianjun Jiao     // u32 need_ack;
38f738aefaSmmehari     u16 seq_no;
392ee67178SXianjun Jiao     struct sk_buff *skb_linked;
402ee67178SXianjun Jiao     dma_addr_t dma_mapping_addr;
41838a9007SXianjun Jiao     // u32 reserved;
422ee67178SXianjun Jiao } __packed;
432ee67178SXianjun Jiao 
442ee67178SXianjun Jiao struct openwifi_ring {
452ee67178SXianjun Jiao 	struct openwifi_buffer_descriptor *bds;
462ee67178SXianjun Jiao     u32 bd_wr_idx;
472ee67178SXianjun Jiao 	u32 bd_rd_idx;
48838a9007SXianjun Jiao     u32 stop_flag; // track the stop/wake status between tx interrupt and openwifi_tx
49838a9007SXianjun Jiao 	// u32 num_dma_symbol_request;
50838a9007SXianjun Jiao 	// u32 reserved;
512ee67178SXianjun Jiao } __packed;
522ee67178SXianjun Jiao 
532ee67178SXianjun Jiao struct openwifi_vif {
542ee67178SXianjun Jiao 	struct ieee80211_hw *dev;
552ee67178SXianjun Jiao 
562ee67178SXianjun Jiao 	int idx; // this vif's idx on the dev
572ee67178SXianjun Jiao 
582ee67178SXianjun Jiao 	/* beaconing */
592ee67178SXianjun Jiao 	struct delayed_work beacon_work;
602ee67178SXianjun Jiao 	bool enable_beacon;
612ee67178SXianjun Jiao };
622ee67178SXianjun Jiao 
632ee67178SXianjun Jiao union u32_byte4 {
642ee67178SXianjun Jiao 	u32 a;
652ee67178SXianjun Jiao 	u8 c[4];
662ee67178SXianjun Jiao };
672ee67178SXianjun Jiao union u16_byte2 {
682ee67178SXianjun Jiao 	u16 a;
692ee67178SXianjun Jiao 	u8 c[2];
702ee67178SXianjun Jiao };
712ee67178SXianjun Jiao 
722ee67178SXianjun Jiao #define MAX_NUM_LED 4
732ee67178SXianjun Jiao #define OPENWIFI_LED_MAX_NAME_LEN 32
742ee67178SXianjun Jiao 
75838a9007SXianjun Jiao // ------------ software reg definition ------------
76838a9007SXianjun Jiao #define MAX_NUM_DRV_REG            8
77838a9007SXianjun Jiao #define DRV_TX_REG_IDX_RATE        0
78838a9007SXianjun Jiao #define DRV_TX_REG_IDX_FREQ_BW_CFG 1
79838a9007SXianjun Jiao #define DRV_TX_REG_IDX_PRINT_CFG   (MAX_NUM_DRV_REG-1)
80838a9007SXianjun Jiao 
81838a9007SXianjun Jiao #define DRV_RX_REG_IDX_FREQ_BW_CFG 1
8222dd0cc4SXianjun Jiao #define DRV_RX_REG_IDX_EXTRA_FO    2
83838a9007SXianjun Jiao #define DRV_RX_REG_IDX_PRINT_CFG   (MAX_NUM_DRV_REG-1)
84838a9007SXianjun Jiao 
858598d294SXianjun Jiao #define DRV_XPU_REG_IDX_LBT_TH     0
860a92505dSXianjun Jiao #define DRV_XPU_REG_IDX_GIT_REV    (MAX_NUM_DRV_REG-1)
870a92505dSXianjun Jiao 
88838a9007SXianjun Jiao // ------end of software reg definition ------------
89838a9007SXianjun Jiao 
902ee67178SXianjun Jiao #define MAX_NUM_VIF 4
912ee67178SXianjun Jiao 
92f738aefaSmmehari //#define LEN_PHY_HEADER 16
932ee67178SXianjun Jiao #define LEN_PHY_CRC 4
94f738aefaSmmehari #define LEN_MPDU_DELIM 4
952ee67178SXianjun Jiao 
96febc5adfSXianjun Jiao #define RING_ROOM_THRESHOLD 4
97f738aefaSmmehari #define NUM_BIT_NUM_TX_BD 6
98f738aefaSmmehari #define NUM_TX_BD (1<<NUM_BIT_NUM_TX_BD) // !!! should align to the fifo size in tx_bit_intf.v
99109b1cfdSXianjun Jiao 
100109b1cfdSXianjun Jiao #ifdef USE_NEW_RX_INTERRUPT
101109b1cfdSXianjun Jiao #define NUM_RX_BD 8
102109b1cfdSXianjun Jiao #else
1032ee67178SXianjun Jiao #define NUM_RX_BD 16
104109b1cfdSXianjun Jiao #endif
105109b1cfdSXianjun Jiao 
1062ee67178SXianjun Jiao #define TX_BD_BUF_SIZE (8192)
1072ee67178SXianjun Jiao #define RX_BD_BUF_SIZE (8192)
1082ee67178SXianjun Jiao 
1092ee67178SXianjun Jiao #define NUM_BIT_MAX_NUM_HW_QUEUE 2
110838a9007SXianjun Jiao #define MAX_NUM_HW_QUEUE 4 // number of queue in FPGA
111838a9007SXianjun Jiao #define MAX_NUM_SW_QUEUE 4 // number of queue in Linux, depends on the number we report by dev->queues in openwifi_dev_probe
112838a9007SXianjun Jiao #define NUM_BIT_MAX_PHY_TX_SN 10 // decrease 12 to 10 to reserve 2 bits storing related linux prio idx
1132ee67178SXianjun Jiao #define MAX_PHY_TX_SN ((1<<NUM_BIT_MAX_PHY_TX_SN)-1)
1142ee67178SXianjun Jiao 
1152ee67178SXianjun Jiao #define AD9361_RADIO_OFF_TX_ATT 89750 //please align with ad9361.c
1162ee67178SXianjun Jiao #define AD9361_RADIO_ON_TX_ATT 000    //please align with rf_init.sh
1172ee67178SXianjun Jiao 
1182ee67178SXianjun Jiao #define SDR_SUPPORTED_FILTERS	\
1192ee67178SXianjun Jiao 	(FIF_ALLMULTI |				\
1202ee67178SXianjun Jiao 	FIF_BCN_PRBRESP_PROMISC |	\
1212ee67178SXianjun Jiao 	FIF_CONTROL |				\
1222ee67178SXianjun Jiao 	FIF_OTHER_BSS |				\
1232ee67178SXianjun Jiao 	FIF_PSPOLL |				\
1242ee67178SXianjun Jiao 	FIF_PROBE_REQ)
1252ee67178SXianjun Jiao 
1262ee67178SXianjun Jiao #define HIGH_PRIORITY_DISCARD_FLAG ((~0x040)<<16) // don't force drop OTHER_BSS by high priority discard
1272ee67178SXianjun Jiao //#define HIGH_PRIORITY_DISCARD_FLAG ((~0x140)<<16) // don't force drop OTHER_BSS and PROB_REQ by high priority discard
1282ee67178SXianjun Jiao 
1292ee67178SXianjun Jiao /* 5G chan 36 - chan 64*/
1302ee67178SXianjun Jiao #define SDR_5GHZ_CH36_64	\
1312ee67178SXianjun Jiao 	REG_RULE(5150-10, 5350+10, 80, 0, 20, 0)
1322ee67178SXianjun Jiao /* 5G chan 36 - chan 48*/
1332ee67178SXianjun Jiao #define SDR_5GHZ_CH36_48	\
1342ee67178SXianjun Jiao 	REG_RULE(5150-10, 5270+10, 80, 0, 20, 0)
1352ee67178SXianjun Jiao 
1362ee67178SXianjun Jiao /*
1372ee67178SXianjun Jiao  *Only these channels all allow active
1382ee67178SXianjun Jiao  *scan on all world regulatory domains
1392ee67178SXianjun Jiao  */
1402ee67178SXianjun Jiao #define SDR_2GHZ_CH01_13	REG_RULE(2412-10, 2472+10, 40, 0, 20, NL80211_RRF_NO_CCK) // disable 11b
1412ee67178SXianjun Jiao #define SDR_2GHZ_CH01_14	REG_RULE(2412-10, 2484+10, 40, 0, 20, NL80211_RRF_NO_CCK) // disable 11b
1422ee67178SXianjun Jiao 
1432ee67178SXianjun Jiao // regulatory.h alpha2
1442ee67178SXianjun Jiao //  *	00 - World regulatory domain
1452ee67178SXianjun Jiao //  *	99 - built by driver but a specific alpha2 cannot be determined
1462ee67178SXianjun Jiao //  *	98 - result of an intersection between two regulatory domains
1472ee67178SXianjun Jiao //  *	97 - regulatory domain has not yet been configured
1482ee67178SXianjun Jiao static const struct ieee80211_regdomain sdr_regd = { // for wiphy_apply_custom_regulatory
1492ee67178SXianjun Jiao 	.n_reg_rules = 2,
1502ee67178SXianjun Jiao 	.alpha2 = "99",
1512ee67178SXianjun Jiao 	.dfs_region = NL80211_DFS_ETSI,
1522ee67178SXianjun Jiao 	.reg_rules = {
1532ee67178SXianjun Jiao 		//SDR_2GHZ_CH01_13,
1542ee67178SXianjun Jiao 		//SDR_5GHZ_CH36_48, //Avoid radar!
1552ee67178SXianjun Jiao 		SDR_2GHZ_CH01_14,
1562ee67178SXianjun Jiao 		SDR_5GHZ_CH36_64,
1572ee67178SXianjun Jiao 		}
1582ee67178SXianjun Jiao };
1592ee67178SXianjun Jiao 
1602ee67178SXianjun Jiao #define CHAN2G(_channel, _freq, _flags) { \
1612ee67178SXianjun Jiao 	.band			= NL80211_BAND_2GHZ, \
1622ee67178SXianjun Jiao 	.hw_value		= (_channel), \
1632ee67178SXianjun Jiao 	.center_freq		= (_freq), \
1642ee67178SXianjun Jiao 	.flags			= (_flags), \
1652ee67178SXianjun Jiao 	.max_antenna_gain	= 0, \
1662ee67178SXianjun Jiao 	.max_power		= 0, \
1672ee67178SXianjun Jiao }
1682ee67178SXianjun Jiao 
1692ee67178SXianjun Jiao #define CHAN5G(_channel, _freq, _flags) { \
1702ee67178SXianjun Jiao 	.band			= NL80211_BAND_5GHZ, \
1712ee67178SXianjun Jiao 	.hw_value		= (_channel), \
1722ee67178SXianjun Jiao 	.center_freq		= (_freq), \
1732ee67178SXianjun Jiao 	.flags			= (_flags), \
1742ee67178SXianjun Jiao 	.max_antenna_gain	= 0, \
1752ee67178SXianjun Jiao 	.max_power		= 0, \
1762ee67178SXianjun Jiao }
1772ee67178SXianjun Jiao 
1782ee67178SXianjun Jiao static const struct ieee80211_rate openwifi_5GHz_rates[] = {
1792ee67178SXianjun Jiao 	{ .bitrate = 10,  .hw_value = 0,  .flags = 0},
1802ee67178SXianjun Jiao 	{ .bitrate = 20,  .hw_value = 1,  .flags = 0},
1812ee67178SXianjun Jiao 	{ .bitrate = 55,  .hw_value = 2,  .flags = 0},
1822ee67178SXianjun Jiao 	{ .bitrate = 110, .hw_value = 3,  .flags = 0},
1832ee67178SXianjun Jiao 	{ .bitrate = 60,  .hw_value = 4,  .flags = IEEE80211_RATE_MANDATORY_A},
1842ee67178SXianjun Jiao 	{ .bitrate = 90,  .hw_value = 5,  .flags = IEEE80211_RATE_MANDATORY_A},
1852ee67178SXianjun Jiao 	{ .bitrate = 120, .hw_value = 6,  .flags = IEEE80211_RATE_MANDATORY_A},
1862ee67178SXianjun Jiao 	{ .bitrate = 180, .hw_value = 7,  .flags = IEEE80211_RATE_MANDATORY_A},
1872ee67178SXianjun Jiao 	{ .bitrate = 240, .hw_value = 8,  .flags = IEEE80211_RATE_MANDATORY_A},
1882ee67178SXianjun Jiao 	{ .bitrate = 360, .hw_value = 9,  .flags = IEEE80211_RATE_MANDATORY_A},
1892ee67178SXianjun Jiao 	{ .bitrate = 480, .hw_value = 10, .flags = IEEE80211_RATE_MANDATORY_A},
1902ee67178SXianjun Jiao 	{ .bitrate = 540, .hw_value = 11, .flags = IEEE80211_RATE_MANDATORY_A},
1912ee67178SXianjun Jiao };
1922ee67178SXianjun Jiao 
1932ee67178SXianjun Jiao static const struct ieee80211_rate openwifi_2GHz_rates[] = {
1942ee67178SXianjun Jiao 	{ .bitrate = 10,  .hw_value = 0,  .flags = 0},
1952ee67178SXianjun Jiao 	{ .bitrate = 20,  .hw_value = 1,  .flags = 0},
1962ee67178SXianjun Jiao 	{ .bitrate = 55,  .hw_value = 2,  .flags = 0},
1972ee67178SXianjun Jiao 	{ .bitrate = 110, .hw_value = 3,  .flags = 0},
1982ee67178SXianjun Jiao 	{ .bitrate = 60,  .hw_value = 4,  .flags = IEEE80211_RATE_MANDATORY_G|IEEE80211_RATE_ERP_G},
1992ee67178SXianjun Jiao 	{ .bitrate = 90,  .hw_value = 5,  .flags = IEEE80211_RATE_MANDATORY_G|IEEE80211_RATE_ERP_G},
2002ee67178SXianjun Jiao 	{ .bitrate = 120, .hw_value = 6,  .flags = IEEE80211_RATE_MANDATORY_G|IEEE80211_RATE_ERP_G},
2012ee67178SXianjun Jiao 	{ .bitrate = 180, .hw_value = 7,  .flags = IEEE80211_RATE_MANDATORY_G|IEEE80211_RATE_ERP_G},
2022ee67178SXianjun Jiao 	{ .bitrate = 240, .hw_value = 8,  .flags = IEEE80211_RATE_MANDATORY_G|IEEE80211_RATE_ERP_G},
2032ee67178SXianjun Jiao 	{ .bitrate = 360, .hw_value = 9,  .flags = IEEE80211_RATE_MANDATORY_G|IEEE80211_RATE_ERP_G},
2042ee67178SXianjun Jiao 	{ .bitrate = 480, .hw_value = 10, .flags = IEEE80211_RATE_MANDATORY_G|IEEE80211_RATE_ERP_G},
2052ee67178SXianjun Jiao 	{ .bitrate = 540, .hw_value = 11, .flags = IEEE80211_RATE_MANDATORY_G|IEEE80211_RATE_ERP_G},
2062ee67178SXianjun Jiao };
2072ee67178SXianjun Jiao 
2082ee67178SXianjun Jiao static const struct ieee80211_channel openwifi_2GHz_channels[] = {
2092ee67178SXianjun Jiao 	CHAN2G(1, 2412, 0),
2102ee67178SXianjun Jiao 	CHAN2G(2, 2417, 0),
2112ee67178SXianjun Jiao 	CHAN2G(3, 2422, 0),
2122ee67178SXianjun Jiao 	CHAN2G(4, 2427, 0),
2132ee67178SXianjun Jiao 	CHAN2G(5, 2432, 0),
2142ee67178SXianjun Jiao 	CHAN2G(6, 2437, 0),
2152ee67178SXianjun Jiao 	CHAN2G(7, 2442, 0),
2162ee67178SXianjun Jiao 	CHAN2G(8, 2447, 0),
2172ee67178SXianjun Jiao 	CHAN2G(9, 2452, 0),
2182ee67178SXianjun Jiao 	CHAN2G(10, 2457, 0),
2192ee67178SXianjun Jiao 	CHAN2G(11, 2462, 0),
2202ee67178SXianjun Jiao 	CHAN2G(12, 2467, 0),
2212ee67178SXianjun Jiao 	CHAN2G(13, 2472, 0),
2222ee67178SXianjun Jiao 	CHAN2G(14, 2484, 0),
2232ee67178SXianjun Jiao };
2242ee67178SXianjun Jiao 
2252ee67178SXianjun Jiao static const struct ieee80211_channel openwifi_5GHz_channels[] = {
2262ee67178SXianjun Jiao 	CHAN5G(36, 5180, 0),
2272ee67178SXianjun Jiao 	CHAN5G(38, 5190, 0),
2282ee67178SXianjun Jiao 	CHAN5G(40, 5200, 0),
2292ee67178SXianjun Jiao 	CHAN5G(42, 5210, 0),
2302ee67178SXianjun Jiao 	CHAN5G(44, 5220, 0),
2312ee67178SXianjun Jiao 	CHAN5G(46, 5230, 0),
2322ee67178SXianjun Jiao 	CHAN5G(48, 5240, 0),
2332ee67178SXianjun Jiao 	CHAN5G(52, 5260, IEEE80211_CHAN_RADAR),
2342ee67178SXianjun Jiao 	CHAN5G(56, 5280, IEEE80211_CHAN_RADAR),
2352ee67178SXianjun Jiao 	CHAN5G(60, 5300, IEEE80211_CHAN_RADAR),
2362ee67178SXianjun Jiao 	CHAN5G(64, 5320, IEEE80211_CHAN_RADAR),
2372ee67178SXianjun Jiao 	// CHAN5G(100, 5500, 0),
2382ee67178SXianjun Jiao 	// CHAN5G(104, 5520, 0),
2392ee67178SXianjun Jiao 	// CHAN5G(108, 5540, 0),
2402ee67178SXianjun Jiao 	// CHAN5G(112, 5560, 0),
2412ee67178SXianjun Jiao 	// CHAN5G(116, 5580, 0),
2422ee67178SXianjun Jiao 	// CHAN5G(120, 5600, 0),
2432ee67178SXianjun Jiao 	// CHAN5G(124, 5620, 0),
2442ee67178SXianjun Jiao 	// CHAN5G(128, 5640, 0),
2452ee67178SXianjun Jiao 	// CHAN5G(132, 5660, 0),
2462ee67178SXianjun Jiao 	// CHAN5G(136, 5680, 0),
2472ee67178SXianjun Jiao 	// CHAN5G(140, 5700, 0),
2482ee67178SXianjun Jiao 	// CHAN5G(144, 5720, 0),
2492ee67178SXianjun Jiao 	// CHAN5G(149, 5745, 0),
2502ee67178SXianjun Jiao 	// CHAN5G(153, 5765, 0),
2512ee67178SXianjun Jiao 	// CHAN5G(157, 5785, 0),
2522ee67178SXianjun Jiao 	// CHAN5G(161, 5805, 0),
2532ee67178SXianjun Jiao 	// CHAN5G(165, 5825, 0),
2542ee67178SXianjun Jiao 	// CHAN5G(169, 5845, 0),
2552ee67178SXianjun Jiao };
2562ee67178SXianjun Jiao 
2572ee67178SXianjun Jiao static const struct ieee80211_iface_limit openwifi_if_limits[] = {
258*6a9949eeSXianjun Jiao 	{ .max = MAX_NUM_VIF,	.types = BIT(NL80211_IFTYPE_STATION) },
259*6a9949eeSXianjun Jiao 	{ .max = MAX_NUM_VIF,	.types =
2602ee67178SXianjun Jiao #ifdef CONFIG_MAC80211_MESH
2612ee67178SXianjun Jiao 				 BIT(NL80211_IFTYPE_MESH_POINT) |
2622ee67178SXianjun Jiao #endif
2632ee67178SXianjun Jiao 				 BIT(NL80211_IFTYPE_AP)},
2642ee67178SXianjun Jiao };
2652ee67178SXianjun Jiao 
2662ee67178SXianjun Jiao static const struct ieee80211_iface_combination openwifi_if_comb = {
2672ee67178SXianjun Jiao 	.limits = openwifi_if_limits,
2682ee67178SXianjun Jiao 	.n_limits = ARRAY_SIZE(openwifi_if_limits),
269*6a9949eeSXianjun Jiao 	.max_interfaces = MAX_NUM_VIF,
2702ee67178SXianjun Jiao 	.num_different_channels = 1,
2712ee67178SXianjun Jiao 	.radar_detect_widths =	BIT(NL80211_CHAN_WIDTH_20_NOHT) |
2722ee67178SXianjun Jiao 					BIT(NL80211_CHAN_WIDTH_20) |
2732ee67178SXianjun Jiao 					BIT(NL80211_CHAN_WIDTH_40) |
2742ee67178SXianjun Jiao 					BIT(NL80211_CHAN_WIDTH_80),
2752ee67178SXianjun Jiao };
2762ee67178SXianjun Jiao 
277b6d71713Smmehari static const u8  wifi_rate_table_mapping[24] =     { 0,  0,  0,   0,  0,  0,   0,   0,  10,   8,   6,   4,  11,   9,   7,  5,   0,    1,   2,   3,   4,   5,   6,   7};
278b6d71713Smmehari static const u16 wifi_rate_table[24] =             { 0,  0,  0,   0,  0,  0,   0,   0, 480, 240, 120,  60, 540, 360, 180, 90,  65,  130, 195, 260, 390, 520, 585, 650};
279b6d71713Smmehari static const u16 wifi_rate_all[20] =               {10, 20, 55, 110, 60, 90, 120, 180, 240, 360, 480, 540,  65, 130, 195, 260, 390, 520, 585, 650};
2802ee67178SXianjun Jiao static const u8  wifi_mcs_table_11b_force_up[16] = {11, 11, 11,  11, 11, 15,  10,  14,   9,  13,   8,  12,   0,   0,   0,  0};
2812ee67178SXianjun Jiao static const u16 wifi_n_dbps_table[16] =           {24, 24, 24,  24, 24, 36,  48,  72,  96, 144, 192, 216,   0,   0,   0,  0};
282b6d71713Smmehari static const u16 wifi_n_dbps_ht_table[16] =        {26, 26, 26,  26, 26, 52,  78, 104, 156, 208, 234, 260,   0,   0,   0,  0};
2832ee67178SXianjun Jiao // static const u8 wifi_mcs_table[8] =             {6,9,12,18,24,36,48,54};
2842ee67178SXianjun Jiao // static const u8 wifi_mcs_table_phy_tx[8]    =   {11,15,10,14,9,13,8,12};
2852ee67178SXianjun Jiao 
286febc5adfSXianjun Jiao // ===== copy from adi-linux/drivers/iio/frequency/cf_axi_dds.c =====
287febc5adfSXianjun Jiao struct cf_axi_dds_state {
288febc5adfSXianjun Jiao 	struct device			*dev_spi;
289febc5adfSXianjun Jiao 	struct clk			*clk;
290febc5adfSXianjun Jiao 	struct cf_axi_dds_chip_info	*chip_info;
291febc5adfSXianjun Jiao 	struct gpio_desc		*plddrbypass_gpio;
292febc5adfSXianjun Jiao 	struct gpio_desc		*interpolation_gpio;
293febc5adfSXianjun Jiao 
294febc5adfSXianjun Jiao 	bool				standalone;
295febc5adfSXianjun Jiao 	bool				dp_disable;
296febc5adfSXianjun Jiao 	bool				enable;
297febc5adfSXianjun Jiao 	bool				pl_dma_fifo_en;
298febc5adfSXianjun Jiao 	enum fifo_ctrl			gpio_dma_fifo_ctrl;
299febc5adfSXianjun Jiao 
300febc5adfSXianjun Jiao 	struct iio_info			iio_info;
301febc5adfSXianjun Jiao 	size_t				regs_size;
302febc5adfSXianjun Jiao 	void __iomem			*regs;
303febc5adfSXianjun Jiao 	void __iomem			*slave_regs;
304febc5adfSXianjun Jiao 	void __iomem			*master_regs;
305febc5adfSXianjun Jiao 	u64				dac_clk;
306febc5adfSXianjun Jiao 	unsigned int			ddr_dds_interp_en;
307febc5adfSXianjun Jiao 	unsigned int			cached_freq[16];
308febc5adfSXianjun Jiao 	unsigned int			version;
309febc5adfSXianjun Jiao 	unsigned int			have_slave_channels;
310febc5adfSXianjun Jiao 	unsigned int			interpolation_factor;
311febc5adfSXianjun Jiao 	struct notifier_block		clk_nb;
312febc5adfSXianjun Jiao };
313febc5adfSXianjun Jiao // ===== end of copy from adi-linux/drivers/iio/frequency/cf_axi_dds.c =====
314febc5adfSXianjun Jiao 
3152ee67178SXianjun Jiao #define RX_DMA_CYCLIC_MODE
3162ee67178SXianjun Jiao struct openwifi_priv {
3172ee67178SXianjun Jiao 	struct platform_device *pdev;
3182ee67178SXianjun Jiao 	struct ieee80211_vif *vif[MAX_NUM_VIF];
3192ee67178SXianjun Jiao 
3202ee67178SXianjun Jiao 	const struct openwifi_rf_ops *rf;
3216e3730c0Smmehari 	enum openwifi_fpga_type fpga_type;
3222ee67178SXianjun Jiao 
3232ee67178SXianjun Jiao 	struct cf_axi_dds_state *dds_st;  //axi_ad9361 hdl ref design module, dac channel
3242ee67178SXianjun Jiao 	struct axiadc_state *adc_st;      //axi_ad9361 hdl ref design module, adc channel
3252ee67178SXianjun Jiao 	struct ad9361_rf_phy *ad9361_phy; //ad9361 chip
3262ee67178SXianjun Jiao 	struct ctrl_outs_control ctrl_out;
3272ee67178SXianjun Jiao 
3282ee67178SXianjun Jiao 	int rx_freq_offset_to_lo_MHz;
3292ee67178SXianjun Jiao 	int tx_freq_offset_to_lo_MHz;
3302ee67178SXianjun Jiao 	u32 rf_bw;
3312ee67178SXianjun Jiao 	u32 actual_rx_lo;
3322ee67178SXianjun Jiao 
3332ee67178SXianjun Jiao 	struct ieee80211_rate rates_2GHz[12];
3342ee67178SXianjun Jiao 	struct ieee80211_rate rates_5GHz[12];
3352ee67178SXianjun Jiao 	struct ieee80211_channel channels_2GHz[14];
3362ee67178SXianjun Jiao 	struct ieee80211_channel channels_5GHz[11];
3372ee67178SXianjun Jiao 	struct ieee80211_supported_band band_2GHz;
3382ee67178SXianjun Jiao 	struct ieee80211_supported_band band_5GHz;
3392ee67178SXianjun Jiao 	bool rfkill_off;
3402ee67178SXianjun Jiao 
3412ee67178SXianjun Jiao 	int rssi_correction; // dynamic RSSI correction according to current channel in _rf_set_channel()
3422ee67178SXianjun Jiao 
3432ee67178SXianjun Jiao 	enum rx_intf_mode rx_intf_cfg;
3442ee67178SXianjun Jiao 	enum tx_intf_mode tx_intf_cfg;
3452ee67178SXianjun Jiao 	enum openofdm_rx_mode openofdm_rx_cfg;
3462ee67178SXianjun Jiao 	enum openofdm_tx_mode openofdm_tx_cfg;
3472ee67178SXianjun Jiao 	enum xpu_mode xpu_cfg;
3482ee67178SXianjun Jiao 
3492ee67178SXianjun Jiao 	int irq_rx;
3502ee67178SXianjun Jiao 	int irq_tx;
3512ee67178SXianjun Jiao 
352838a9007SXianjun Jiao 	// u32 call_counter;
3532ee67178SXianjun Jiao 	u8 *rx_cyclic_buf;
3542ee67178SXianjun Jiao 	dma_addr_t rx_cyclic_buf_dma_mapping_addr;
3552ee67178SXianjun Jiao 	struct dma_chan *rx_chan;
3562ee67178SXianjun Jiao 	struct dma_async_tx_descriptor *rxd;
3572ee67178SXianjun Jiao 	dma_cookie_t rx_cookie;
3582ee67178SXianjun Jiao 
359838a9007SXianjun Jiao 	struct openwifi_ring tx_ring[MAX_NUM_SW_QUEUE];
3602ee67178SXianjun Jiao 	struct scatterlist tx_sg;
3612ee67178SXianjun Jiao 	struct dma_chan *tx_chan;
3622ee67178SXianjun Jiao 	struct dma_async_tx_descriptor *txd;
3632ee67178SXianjun Jiao 	dma_cookie_t tx_cookie;
364838a9007SXianjun Jiao 	// struct completion tx_dma_complete;
365838a9007SXianjun Jiao 	// bool openwifi_tx_first_time_run;
3662ee67178SXianjun Jiao 
367838a9007SXianjun Jiao 	// int phy_tx_sn;
368838a9007SXianjun Jiao 	u32 slice_idx;
3692ee67178SXianjun Jiao 	u32 dest_mac_addr_queue_map[MAX_NUM_HW_QUEUE];
3702ee67178SXianjun Jiao 	u8 mac_addr[ETH_ALEN];
3712ee67178SXianjun Jiao 	u16 seqno;
3722ee67178SXianjun Jiao 
3732ee67178SXianjun Jiao 	bool use_short_slot;
3742ee67178SXianjun Jiao 	u8 band;
375f738aefaSmmehari 	u16 channel, tid;
3762ee67178SXianjun Jiao 
377261bb9eeSmmehari 	u32 ampdu_reference;
378261bb9eeSmmehari 
3792ee67178SXianjun Jiao 	u32 drv_rx_reg_val[MAX_NUM_DRV_REG];
3802ee67178SXianjun Jiao 	u32 drv_tx_reg_val[MAX_NUM_DRV_REG];
3812ee67178SXianjun Jiao 	u32 drv_xpu_reg_val[MAX_NUM_DRV_REG];
3828598d294SXianjun Jiao 	int last_auto_fpga_lbt_th;
3832ee67178SXianjun Jiao 	// u8 num_led;
3842ee67178SXianjun Jiao 	// struct led_classdev *led[MAX_NUM_LED];//zc706 has 4 user leds. please find openwifi_dev_probe to see how we get them.
3852ee67178SXianjun Jiao 	// char led_name[MAX_NUM_LED][OPENWIFI_LED_MAX_NAME_LEN];
3862ee67178SXianjun Jiao 
3872ee67178SXianjun Jiao 	spinlock_t lock;
3882ee67178SXianjun Jiao };
3892ee67178SXianjun Jiao 
3902ee67178SXianjun Jiao #endif /* OPENWIFI_SDR */
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