1*10465441SEvalZero; 2*10465441SEvalZero; These are the macros used by the v850 port of the uCOS/II. 3*10465441SEvalZero; 4*10465441SEvalZero 5*10465441SEvalZero 6*10465441SEvalZero 7*10465441SEvalZero 8*10465441SEvalZero 9*10465441SEvalZero;******************************************************************** 10*10465441SEvalZero; function: 11*10465441SEvalZero; description: 12*10465441SEvalZero; --- Modifies ---------------------------------------------- 13*10465441SEvalZero; IO : 14*10465441SEvalZero; Mem: 15*10465441SEvalZero; CPU: 16*10465441SEvalZero; --- Uses -------------------------------------------------- 17*10465441SEvalZero; IO : 18*10465441SEvalZero; Mem: 19*10465441SEvalZero; --- Input ------------------------------------------------- 20*10465441SEvalZero; --- Output ------------------------------------------------ 21*10465441SEvalZero; --- Notes ------------------------------------------------- 22*10465441SEvalZero;==================================================================== 23*10465441SEvalZero 24*10465441SEvalZeroSAVE_CPU_CTX MACRO 25*10465441SEvalZero ;Save all registers on entry (r3 is the stack pointer) 26*10465441SEvalZero prepare {r23,r24,r25,r26,r27,r28,r29,r30,r31},(8+(4*14)) ;Add 8 bytes for 2 more registers 27*10465441SEvalZero mov sp, ep 28*10465441SEvalZero sst.w r1, 0[ep] 29*10465441SEvalZero sst.w r2, 4[ep] 30*10465441SEvalZero sst.w r5, 8[ep] 31*10465441SEvalZero sst.w r6, 12[ep] 32*10465441SEvalZero sst.w r7, 16[ep] 33*10465441SEvalZero sst.w r8, 20[ep] 34*10465441SEvalZero sst.w r9, 24[ep] 35*10465441SEvalZero sst.w r10, 28[ep] 36*10465441SEvalZero sst.w r11, 32[ep] 37*10465441SEvalZero sst.w r12, 36[ep] 38*10465441SEvalZero sst.w r13, 40[ep] 39*10465441SEvalZero sst.w r14, 44[ep] 40*10465441SEvalZero sst.w r15, 48[ep] 41*10465441SEvalZero sst.w r16, 52[ep] 42*10465441SEvalZero ;Save caller's PC 43*10465441SEvalZero stsr EIPC, r1 44*10465441SEvalZero sst.w r1, 56[ep] 45*10465441SEvalZero ;Save caller's PSW 46*10465441SEvalZero stsr EIPSW, r1 47*10465441SEvalZero sst.w r1, 60[ep] 48*10465441SEvalZero 49*10465441SEvalZero ENDMAC 50*10465441SEvalZero 51*10465441SEvalZero 52*10465441SEvalZero 53*10465441SEvalZero 54*10465441SEvalZero 55*10465441SEvalZero;******************************************************************** 56*10465441SEvalZero; function: 57*10465441SEvalZero; description: 58*10465441SEvalZero; --- Modifies ---------------------------------------------- 59*10465441SEvalZero; IO : 60*10465441SEvalZero; Mem: 61*10465441SEvalZero; CPU: 62*10465441SEvalZero; --- Uses -------------------------------------------------- 63*10465441SEvalZero; IO : 64*10465441SEvalZero; Mem: 65*10465441SEvalZero; --- Input ------------------------------------------------- 66*10465441SEvalZero; --- Output ------------------------------------------------ 67*10465441SEvalZero; --- Notes ------------------------------------------------- 68*10465441SEvalZero;==================================================================== 69*10465441SEvalZeroSAVE_SP MACRO 70*10465441SEvalZero ;Save stack pointer on OSTCBCur->OSTCBStkPtr (OSTCBStkPtr=0) 71*10465441SEvalZero mov OSTCBCur, r21 72*10465441SEvalZero ld.w 0[r21], r21 73*10465441SEvalZero st.w sp, 0[r21] 74*10465441SEvalZero ENDMAC 75*10465441SEvalZero 76*10465441SEvalZero 77*10465441SEvalZero 78*10465441SEvalZero;******************************************************************** 79*10465441SEvalZero; function: 80*10465441SEvalZero; description: 81*10465441SEvalZero; --- Modifies ---------------------------------------------- 82*10465441SEvalZero; IO : 83*10465441SEvalZero; Mem: 84*10465441SEvalZero; CPU: 85*10465441SEvalZero; --- Uses -------------------------------------------------- 86*10465441SEvalZero; IO : 87*10465441SEvalZero; Mem: 88*10465441SEvalZero; --- Input ------------------------------------------------- 89*10465441SEvalZero; --- Output ------------------------------------------------ 90*10465441SEvalZero; --- Notes ------------------------------------------------- 91*10465441SEvalZero;==================================================================== 92*10465441SEvalZeroISR_ENTRY MACRO 93*10465441SEvalZero LOCAL _DontSaveSP 94*10465441SEvalZero 95*10465441SEvalZero ;Save all CPU registers according to the standard stack frame 96*10465441SEvalZero SAVE_CPU_CTX 97*10465441SEvalZero 98*10465441SEvalZero mov OSIntNesting, r1 ;Increment OSNesting by one 99*10465441SEvalZero LD.BU 0[r1],r2 100*10465441SEvalZero add 1, r2 101*10465441SEvalZero ST.B r2, 0[r1] 102*10465441SEvalZero cmp 1, r2 ;If OSNesting==1 save SP in current TCB 103*10465441SEvalZero bne _DontSaveSP 104*10465441SEvalZero SAVE_SP 105*10465441SEvalZero_DontSaveSP: 106*10465441SEvalZero ENDMAC 107*10465441SEvalZero 108*10465441SEvalZero;******************************************************************** 109*10465441SEvalZero; function: 110*10465441SEvalZero; description: 111*10465441SEvalZero; --- Modifies ---------------------------------------------- 112*10465441SEvalZero; IO : 113*10465441SEvalZero; Mem: 114*10465441SEvalZero; CPU: 115*10465441SEvalZero; --- Uses -------------------------------------------------- 116*10465441SEvalZero; IO : 117*10465441SEvalZero; Mem: 118*10465441SEvalZero; --- Input ------------------------------------------------- 119*10465441SEvalZero; --- Output ------------------------------------------------ 120*10465441SEvalZero; --- Notes ------------------------------------------------- 121*10465441SEvalZero;==================================================================== 122*10465441SEvalZeroISR_EXIT MACRO 123*10465441SEvalZero jarl OSIntExit, lp ;Call OSIntExit() 124*10465441SEvalZero jr OS_Restore_CPU_Context ;Restore processors registers and execute RETI 125*10465441SEvalZero ENDMAC 126