1*10465441SEvalZero /*
2*10465441SEvalZero * File : interrupt.c
3*10465441SEvalZero * This file is part of RT-Thread RTOS
4*10465441SEvalZero * COPYRIGHT (C) 2006 - 2013, RT-Thread Development Team
5*10465441SEvalZero *
6*10465441SEvalZero * This program is free software; you can redistribute it and/or modify
7*10465441SEvalZero * it under the terms of the GNU General Public License as published by
8*10465441SEvalZero * the Free Software Foundation; either version 2 of the License, or
9*10465441SEvalZero * (at your option) any later version.
10*10465441SEvalZero *
11*10465441SEvalZero * This program is distributed in the hope that it will be useful,
12*10465441SEvalZero * but WITHOUT ANY WARRANTY; without even the implied warranty of
13*10465441SEvalZero * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14*10465441SEvalZero * GNU General Public License for more details.
15*10465441SEvalZero *
16*10465441SEvalZero * You should have received a copy of the GNU General Public License along
17*10465441SEvalZero * with this program; if not, write to the Free Software Foundation, Inc.,
18*10465441SEvalZero * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
19*10465441SEvalZero *
20*10465441SEvalZero * Change Logs:
21*10465441SEvalZero * Date Author Notes
22*10465441SEvalZero * 2013-7-14 Peng Fan sep6200 implementation
23*10465441SEvalZero */
24*10465441SEvalZero
25*10465441SEvalZero #include <rtthread.h>
26*10465441SEvalZero #include <rthw.h>
27*10465441SEvalZero #include <sep6200.h>
28*10465441SEvalZero
29*10465441SEvalZero #define MAX_HANDLERS 64
30*10465441SEvalZero
31*10465441SEvalZero
32*10465441SEvalZero #define SEP6200_IRQ_TYPE 0
33*10465441SEvalZero #define SEP6200_FIQ_TYPE 1
34*10465441SEvalZero
35*10465441SEvalZero #define int_enable_all() \
36*10465441SEvalZero do { \
37*10465441SEvalZero *(volatile unsigned long*)SEP6200_VIC_INT_EN_L = ~0x0;\
38*10465441SEvalZero *(volatile unsigned long*)SEP6200_VIC_INT_EN_H = ~0x0;\
39*10465441SEvalZero }while(0)
40*10465441SEvalZero #define int_disable_all() \
41*10465441SEvalZero do { \
42*10465441SEvalZero *(volatile unsigned long*)SEP6200_VIC_INT_EN_L = 0x0;\
43*10465441SEvalZero *(volatile unsigned long*)SEP6200_VIC_INT_EN_H = 0x0;\
44*10465441SEvalZero }while(0)
45*10465441SEvalZero #define mask_all_int(int_type) \
46*10465441SEvalZero do { \
47*10465441SEvalZero if (int_type == SEP6200_IRQ_TYPE){ \
48*10465441SEvalZero *(volatile unsigned long*)SEP6200_VIC_INT_MSK_ALL = 0x1;\
49*10465441SEvalZero } else if (int_type == SEP6200_FIQ_TYPE) {\
50*10465441SEvalZero *(volatile unsigned long*)SEP6200_VIC_INT_MSK_ALL = 0x2;\
51*10465441SEvalZero }\
52*10465441SEvalZero }while(0)
53*10465441SEvalZero #define unmask_all_int(int_type)\
54*10465441SEvalZero do { \
55*10465441SEvalZero if (int_type == SEP6200_IRQ_TYPE){ \
56*10465441SEvalZero *(volatile unsigned long*)SEP6200_VIC_INT_MSK_ALL = ~0x1;\
57*10465441SEvalZero } else if (int_type == SEP6200_FIQ_TYPE) {\
58*10465441SEvalZero *(volatile unsigned long*)SEP6200_VIC_INT_MSK_ALL = ~0x2;\
59*10465441SEvalZero }\
60*10465441SEvalZero }while(0)
61*10465441SEvalZero
62*10465441SEvalZero #define SEP6200_INT_SET(intnum) \
63*10465441SEvalZero do{ \
64*10465441SEvalZero if(intnum < 32) \
65*10465441SEvalZero *(volatile unsigned long*)SEP6200_VIC_SFT_INT_L |= (1 << intnum); \
66*10465441SEvalZero else \
67*10465441SEvalZero *(volatile unsigned long*)SEP6200_VIC_SFT_INT_H |= (1 << (intnum - 32)); \
68*10465441SEvalZero }while(0)
69*10465441SEvalZero
70*10465441SEvalZero #define SEP6200_INT_CLR(intnum) \
71*10465441SEvalZero do{ \
72*10465441SEvalZero if(intnum < 32) \
73*10465441SEvalZero *(volatile unsigned long*)SEP6200_VIC_SFT_INT_L &= ~(1 << intnum);\
74*10465441SEvalZero else \
75*10465441SEvalZero *(volatile unsigned long*)SEP6200_VIC_SFT_INT_H &= ~(1 << (intnum - 32)); \
76*10465441SEvalZero }while(0)
77*10465441SEvalZero
78*10465441SEvalZero #define SEP6200_INT_ENABLE(intnum)\
79*10465441SEvalZero do{ \
80*10465441SEvalZero if(intnum < 32) \
81*10465441SEvalZero *(volatile unsigned long*)SEP6200_VIC_INT_EN_L |= (1 << intnum); \
82*10465441SEvalZero else \
83*10465441SEvalZero *(volatile unsigned long*)SEP6200_VIC_INT_EN_H |= (1 << (intnum - 32)); \
84*10465441SEvalZero }while(0)
85*10465441SEvalZero
86*10465441SEvalZero #define SEP6200_INT_DISABLE(intnum) \
87*10465441SEvalZero do{ \
88*10465441SEvalZero if(intnum < 32) \
89*10465441SEvalZero *(volatile unsigned long*)SEP6200_VIC_INT_EN_L &= ~(1 << intnum); \
90*10465441SEvalZero else \
91*10465441SEvalZero *(volatile unsigned long*)SEP6200_VIC_INT_EN_H &= ~(1 << (intnum - 32)); \
92*10465441SEvalZero }while(0)
93*10465441SEvalZero
94*10465441SEvalZero
95*10465441SEvalZero extern rt_uint32_t rt_interrupt_nest;
96*10465441SEvalZero /* exception and interrupt handler table */
97*10465441SEvalZero struct rt_irq_desc isr_table[MAX_HANDLERS];
98*10465441SEvalZero rt_uint32_t rt_interrupt_from_thread, rt_interrupt_to_thread;
99*10465441SEvalZero rt_uint32_t rt_thread_switch_interrupt_flag;
100*10465441SEvalZero
101*10465441SEvalZero
102*10465441SEvalZero /* --------------------------------------------------------------------
103*10465441SEvalZero * Interrupt initialization
104*10465441SEvalZero * -------------------------------------------------------------------- */
105*10465441SEvalZero
106*10465441SEvalZero /**
107*10465441SEvalZero * @addtogroup sep6200
108*10465441SEvalZero */
109*10465441SEvalZero /*@{*/
110*10465441SEvalZero
111*10465441SEvalZero void rt_hw_interrupt_mask(int irq);
112*10465441SEvalZero void rt_hw_interrupt_umask(int irq);
113*10465441SEvalZero
sep6200_irq_enable(rt_uint32_t irq)114*10465441SEvalZero rt_inline void sep6200_irq_enable(rt_uint32_t irq)
115*10465441SEvalZero {
116*10465441SEvalZero SEP6200_INT_ENABLE(irq);
117*10465441SEvalZero }
118*10465441SEvalZero
sep6200_irq_disable(rt_uint32_t irq)119*10465441SEvalZero rt_inline void sep6200_irq_disable(rt_uint32_t irq)
120*10465441SEvalZero {
121*10465441SEvalZero SEP6200_INT_DISABLE(irq);
122*10465441SEvalZero }
123*10465441SEvalZero
sep6200_irq_unmask(rt_uint32_t irq)124*10465441SEvalZero rt_inline void sep6200_irq_unmask(rt_uint32_t irq)
125*10465441SEvalZero {
126*10465441SEvalZero SEP6200_INT_ENABLE(irq);
127*10465441SEvalZero }
128*10465441SEvalZero
sep6200_irq_mask(rt_uint32_t irq)129*10465441SEvalZero rt_inline void sep6200_irq_mask(rt_uint32_t irq)
130*10465441SEvalZero {
131*10465441SEvalZero SEP6200_INT_DISABLE(irq);
132*10465441SEvalZero }
rt_hw_interrupt_handle(rt_uint32_t vector)133*10465441SEvalZero rt_isr_handler_t rt_hw_interrupt_handle(rt_uint32_t vector)
134*10465441SEvalZero {
135*10465441SEvalZero rt_kprintf("Unhandled interrupt %d occured!!!\n", vector);
136*10465441SEvalZero return RT_NULL;
137*10465441SEvalZero }
138*10465441SEvalZero
139*10465441SEvalZero /**
140*10465441SEvalZero * This function will initialize hardware interrupt
141*10465441SEvalZero */
rt_hw_interrupt_init(void)142*10465441SEvalZero void rt_hw_interrupt_init(void)
143*10465441SEvalZero {
144*10465441SEvalZero rt_int32_t i;
145*10465441SEvalZero register rt_uint32_t idx;
146*10465441SEvalZero
147*10465441SEvalZero
148*10465441SEvalZero /* init exceptions table */
149*10465441SEvalZero for(idx=0; idx < MAX_HANDLERS; idx++)
150*10465441SEvalZero {
151*10465441SEvalZero isr_table[idx].handler = (rt_isr_handler_t)rt_hw_interrupt_handle;
152*10465441SEvalZero }
153*10465441SEvalZero int_disable_all();
154*10465441SEvalZero mask_all_int(SEP6200_FIQ_TYPE);
155*10465441SEvalZero
156*10465441SEvalZero //int_enable_all();
157*10465441SEvalZero unmask_all_int(SEP6200_IRQ_TYPE);
158*10465441SEvalZero
159*10465441SEvalZero /* init interrupt nest, and context in thread sp */
160*10465441SEvalZero rt_interrupt_nest = 0;
161*10465441SEvalZero rt_interrupt_from_thread = 0;
162*10465441SEvalZero rt_interrupt_to_thread = 0;
163*10465441SEvalZero rt_thread_switch_interrupt_flag = 0;
164*10465441SEvalZero }
165*10465441SEvalZero
166*10465441SEvalZero
167*10465441SEvalZero
168*10465441SEvalZero /**
169*10465441SEvalZero * This function will mask a interrupt.
170*10465441SEvalZero * @param vector the interrupt number
171*10465441SEvalZero */
rt_hw_interrupt_mask(int irq)172*10465441SEvalZero void rt_hw_interrupt_mask(int irq)
173*10465441SEvalZero {
174*10465441SEvalZero if (irq >= MAX_HANDLERS) {
175*10465441SEvalZero rt_kprintf("Wrong irq num to mask\n");
176*10465441SEvalZero } else {
177*10465441SEvalZero sep6200_irq_mask(irq);
178*10465441SEvalZero }
179*10465441SEvalZero
180*10465441SEvalZero }
181*10465441SEvalZero
182*10465441SEvalZero /**
183*10465441SEvalZero * This function will un-mask a interrupt.
184*10465441SEvalZero * @param vector the interrupt number
185*10465441SEvalZero */
rt_hw_interrupt_umask(int irq)186*10465441SEvalZero void rt_hw_interrupt_umask(int irq)
187*10465441SEvalZero {
188*10465441SEvalZero if (irq >= MAX_HANDLERS) {
189*10465441SEvalZero rt_kprintf("Wrong irq num to unmask\n");
190*10465441SEvalZero } else {
191*10465441SEvalZero sep6200_irq_unmask(irq);
192*10465441SEvalZero }
193*10465441SEvalZero }
194*10465441SEvalZero
195*10465441SEvalZero /**
196*10465441SEvalZero * This function will install a interrupt service routine to a interrupt.
197*10465441SEvalZero * @param vector the interrupt number
198*10465441SEvalZero * @param new_handler the interrupt service routine to be installed
199*10465441SEvalZero * @param old_handler the old interrupt service routine
200*10465441SEvalZero */
rt_hw_interrupt_install(int vector,rt_isr_handler_t handler,void * param,const char * name)201*10465441SEvalZero rt_isr_handler_t rt_hw_interrupt_install(int vector, rt_isr_handler_t handler,
202*10465441SEvalZero void *param, const char *name)
203*10465441SEvalZero {
204*10465441SEvalZero rt_isr_handler_t old_handler = RT_NULL;
205*10465441SEvalZero
206*10465441SEvalZero if(vector < MAX_HANDLERS)
207*10465441SEvalZero {
208*10465441SEvalZero old_handler = isr_table[vector].handler;
209*10465441SEvalZero
210*10465441SEvalZero if (handler != RT_NULL)
211*10465441SEvalZero {
212*10465441SEvalZero #ifdef RT_USING_INTERRUPT_INFO
213*10465441SEvalZero rt_strncpy(isr_table[vector].name, name, RT_NAME_MAX);
214*10465441SEvalZero #endif /* RT_USING_INTERRUPT_INFO */
215*10465441SEvalZero isr_table[vector].handler = handler;
216*10465441SEvalZero isr_table[vector].param = param;
217*10465441SEvalZero }
218*10465441SEvalZero }
219*10465441SEvalZero
220*10465441SEvalZero return old_handler;
221*10465441SEvalZero }
222*10465441SEvalZero
223*10465441SEvalZero /*@}*/
224