1*10465441SEvalZero/* 2*10465441SEvalZero * File : context_gcc.S 3*10465441SEvalZero * This file is part of RT-Thread RTOS 4*10465441SEvalZero * COPYRIGHT (C) 2006 - 2013, RT-Thread Development Team 5*10465441SEvalZero * 6*10465441SEvalZero * This program is free software; you can redistribute it and/or modify 7*10465441SEvalZero * it under the terms of the GNU General Public License as published by 8*10465441SEvalZero * the Free Software Foundation; either version 2 of the License, or 9*10465441SEvalZero * (at your option) any later version. 10*10465441SEvalZero * 11*10465441SEvalZero * This program is distributed in the hope that it will be useful, 12*10465441SEvalZero * but WITHOUT ANY WARRANTY; without even the implied warranty of 13*10465441SEvalZero * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14*10465441SEvalZero * GNU General Public License for more details. 15*10465441SEvalZero * 16*10465441SEvalZero * You should have received a copy of the GNU General Public License along 17*10465441SEvalZero * with this program; if not, write to the Free Software Foundation, Inc., 18*10465441SEvalZero * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. 19*10465441SEvalZero * 20*10465441SEvalZero * Change Logs: 21*10465441SEvalZero * Date Author Notes 22*10465441SEvalZero * 2013-7-14 Peng Fan sep6200 implementation 23*10465441SEvalZero */ 24*10465441SEvalZero 25*10465441SEvalZero/** 26*10465441SEvalZero * \addtogroup sep6200 27*10465441SEvalZero */ 28*10465441SEvalZero 29*10465441SEvalZero/*@{*/ 30*10465441SEvalZero 31*10465441SEvalZero#define NOINT 0xc0 32*10465441SEvalZero 33*10465441SEvalZero/* 34*10465441SEvalZero * rt_base_t rt_hw_interrupt_disable(); 35*10465441SEvalZero */ 36*10465441SEvalZero.globl rt_hw_interrupt_disable 37*10465441SEvalZero.type rt_hw_interrupt_disable, %function 38*10465441SEvalZerort_hw_interrupt_disable: 39*10465441SEvalZero stw.w r1, [sp-], #4 40*10465441SEvalZero mov r0, asr 41*10465441SEvalZero or r1, r0, #NOINT 42*10465441SEvalZero mov.a asr, r1 43*10465441SEvalZero ldw.w r1, [sp]+, #4 44*10465441SEvalZero mov pc, lr 45*10465441SEvalZero 46*10465441SEvalZero/* 47*10465441SEvalZero * void rt_hw_interrupt_enable(rt_base_t level); 48*10465441SEvalZero */ 49*10465441SEvalZero.globl rt_hw_interrupt_enable 50*10465441SEvalZero.type rt_hw_interrupt_disable, %function 51*10465441SEvalZerort_hw_interrupt_enable: 52*10465441SEvalZero mov.a asr, r0 53*10465441SEvalZero mov pc, lr 54*10465441SEvalZero 55*10465441SEvalZero/* 56*10465441SEvalZero * void rt_hw_context_switch(rt_uint32 from, rt_uint32 to); 57*10465441SEvalZero * r0 --> from 58*10465441SEvalZero * r1 --> to 59*10465441SEvalZero */ 60*10465441SEvalZero.globl rt_hw_context_switch 61*10465441SEvalZero.type rt_hw_interrupt_disable, %function 62*10465441SEvalZerort_hw_context_switch: 63*10465441SEvalZero stm.w (lr), [sp-] 64*10465441SEvalZero stm.w (r16, r17, r18, r19, r20, r21, r22, r23, r24, r25, r26, r27, r28, lr), [sp-] 65*10465441SEvalZero stm.w (r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11, r12, r13, r14, r15), [sp-] 66*10465441SEvalZero mov r4, asr 67*10465441SEvalZero stm.w (r4), [sp-] 68*10465441SEvalZero mov r4, bsr 69*10465441SEvalZero stm.w (r4), [sp-] 70*10465441SEvalZero 71*10465441SEvalZero stw sp, [r0+] 72*10465441SEvalZero ldw sp, [r1+] 73*10465441SEvalZero 74*10465441SEvalZero ldm.w (r4), [sp]+ 75*10465441SEvalZero mov.a bsr,r4 76*10465441SEvalZero ldm.w (r4), [sp]+ 77*10465441SEvalZero mov.a asr, r4 78*10465441SEvalZero 79*10465441SEvalZero ldm.w (r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11, r12, r13, r14, r15), [sp]+ 80*10465441SEvalZero ldm.w (r16, r17, r18, r19, r20, r21, r22, r23, r24, r25, r26, r27, r28, lr, pc), [sp]+ 81*10465441SEvalZero 82*10465441SEvalZero/* 83*10465441SEvalZero * void rt_hw_context_switch_to(rt_uint32 to); 84*10465441SEvalZero * r0 --> to 85*10465441SEvalZero */ 86*10465441SEvalZero.globl rt_hw_context_switch_to 87*10465441SEvalZerort_hw_context_switch_to: 88*10465441SEvalZero ldw sp, [r0+] 89*10465441SEvalZero ldm.w (r4), [sp]+ 90*10465441SEvalZero mov.a bsr, r4 91*10465441SEvalZero ldm.w (r4), [sp]+ 92*10465441SEvalZero mov.a asr, r4 93*10465441SEvalZero ldm.w (r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11, r12, r13, r14, r15), [sp]+ 94*10465441SEvalZero ldm.w (r16, r17, r18, r19, r20, r21, r22, r23, r24, r25, r26, r27, r28, lr, pc), [sp]+ 95*10465441SEvalZero 96*10465441SEvalZero/* 97*10465441SEvalZero * void rt_hw_context_switch_interrupt(rt_uint32 from, rt_uint32 to); 98*10465441SEvalZero */ 99*10465441SEvalZero.globl rt_thread_switch_interrupt_flag 100*10465441SEvalZero.globl rt_interrupt_from_thread 101*10465441SEvalZero.globl rt_interrupt_to_thread 102*10465441SEvalZero.globl rt_hw_context_switch_interrupt 103*10465441SEvalZerort_hw_context_switch_interrupt: 104*10465441SEvalZero ldw r2, =rt_thread_switch_interrupt_flag 105*10465441SEvalZero ldw r3, [r2+] 106*10465441SEvalZero cmpsub.a r3, #1 107*10465441SEvalZero beq _reswitch 108*10465441SEvalZero mov r3, #1 109*10465441SEvalZero stw r3, [r2+] 110*10465441SEvalZero ldw r2, =rt_interrupt_from_thread 111*10465441SEvalZero stw r0, [r2+] 112*10465441SEvalZero_reswitch: 113*10465441SEvalZero ldw r2, =rt_interrupt_to_thread 114*10465441SEvalZero stw r1, [r2+] 115*10465441SEvalZero mov pc, lr 116