1 /* 2 * Copyright (c) 2006-2018, RT-Thread Development Team 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 * 6 * Change Logs: 7 * Date Author Notes 8 * 2018/10/28 Bernard The unify RISC-V porting code. 9 */ 10 11 #include <rthw.h> 12 #include <rtthread.h> 13 14 #include "cpuport.h" 15 16 #ifndef RT_USING_SMP 17 volatile rt_ubase_t rt_interrupt_from_thread = 0; 18 volatile rt_ubase_t rt_interrupt_to_thread = 0; 19 volatile rt_uint32_t rt_thread_switch_interrupt_flag = 0; 20 #endif 21 22 struct rt_hw_stack_frame 23 { 24 rt_ubase_t epc; /* epc - epc - program counter */ 25 rt_ubase_t ra; /* x1 - ra - return address for jumps */ 26 rt_ubase_t mstatus; /* - machine status register */ 27 rt_ubase_t gp; /* x3 - gp - global pointer */ 28 rt_ubase_t tp; /* x4 - tp - thread pointer */ 29 rt_ubase_t t0; /* x5 - t0 - temporary register 0 */ 30 rt_ubase_t t1; /* x6 - t1 - temporary register 1 */ 31 rt_ubase_t t2; /* x7 - t2 - temporary register 2 */ 32 rt_ubase_t s0_fp; /* x8 - s0/fp - saved register 0 or frame pointer */ 33 rt_ubase_t s1; /* x9 - s1 - saved register 1 */ 34 rt_ubase_t a0; /* x10 - a0 - return value or function argument 0 */ 35 rt_ubase_t a1; /* x11 - a1 - return value or function argument 1 */ 36 rt_ubase_t a2; /* x12 - a2 - function argument 2 */ 37 rt_ubase_t a3; /* x13 - a3 - function argument 3 */ 38 rt_ubase_t a4; /* x14 - a4 - function argument 4 */ 39 rt_ubase_t a5; /* x15 - a5 - function argument 5 */ 40 rt_ubase_t a6; /* x16 - a6 - function argument 6 */ 41 rt_ubase_t a7; /* x17 - s7 - function argument 7 */ 42 rt_ubase_t s2; /* x18 - s2 - saved register 2 */ 43 rt_ubase_t s3; /* x19 - s3 - saved register 3 */ 44 rt_ubase_t s4; /* x20 - s4 - saved register 4 */ 45 rt_ubase_t s5; /* x21 - s5 - saved register 5 */ 46 rt_ubase_t s6; /* x22 - s6 - saved register 6 */ 47 rt_ubase_t s7; /* x23 - s7 - saved register 7 */ 48 rt_ubase_t s8; /* x24 - s8 - saved register 8 */ 49 rt_ubase_t s9; /* x25 - s9 - saved register 9 */ 50 rt_ubase_t s10; /* x26 - s10 - saved register 10 */ 51 rt_ubase_t s11; /* x27 - s11 - saved register 11 */ 52 rt_ubase_t t3; /* x28 - t3 - temporary register 3 */ 53 rt_ubase_t t4; /* x29 - t4 - temporary register 4 */ 54 rt_ubase_t t5; /* x30 - t5 - temporary register 5 */ 55 rt_ubase_t t6; /* x31 - t6 - temporary register 6 */ 56 }; 57 58 /** 59 * This function will initialize thread stack 60 * 61 * @param tentry the entry of thread 62 * @param parameter the parameter of entry 63 * @param stack_addr the beginning stack address 64 * @param texit the function will be called when thread exit 65 * 66 * @return stack address 67 */ 68 rt_uint8_t *rt_hw_stack_init(void *tentry, 69 void *parameter, 70 rt_uint8_t *stack_addr, 71 void *texit) 72 { 73 struct rt_hw_stack_frame *frame; 74 rt_uint8_t *stk; 75 int i; 76 77 stk = stack_addr + sizeof(rt_ubase_t); 78 stk = (rt_uint8_t *)RT_ALIGN_DOWN((rt_ubase_t)stk, REGBYTES); 79 stk -= sizeof(struct rt_hw_stack_frame); 80 81 frame = (struct rt_hw_stack_frame *)stk; 82 83 for (i = 0; i < sizeof(struct rt_hw_stack_frame) / sizeof(rt_ubase_t); i++) 84 { 85 ((rt_ubase_t *)frame)[i] = 0xdeadbeef; 86 } 87 88 frame->ra = (rt_ubase_t)texit; 89 frame->a0 = (rt_ubase_t)parameter; 90 frame->epc = (rt_ubase_t)tentry; 91 92 /* force to machine mode(MPP=11) and set MPIE to 1 */ 93 frame->mstatus = 0x00007880; 94 95 return stk; 96 } 97 98 /* 99 * #ifdef RT_USING_SMP 100 * void rt_hw_context_switch_interrupt(void *context, rt_ubase_t from, rt_ubase_t to, struct rt_thread *to_thread); 101 * #else 102 * void rt_hw_context_switch_interrupt(rt_ubase_t from, rt_ubase_t to); 103 * #endif 104 */ 105 #ifndef RT_USING_SMP 106 void rt_hw_context_switch_interrupt(rt_ubase_t from, rt_ubase_t to) 107 { 108 if (rt_thread_switch_interrupt_flag == 0) 109 rt_interrupt_from_thread = from; 110 111 rt_interrupt_to_thread = to; 112 rt_thread_switch_interrupt_flag = 1; 113 114 return ; 115 } 116 #endif /* end of RT_USING_SMP */ 117 118 /** shutdown CPU */ 119 void rt_hw_cpu_shutdown() 120 { 121 rt_uint32_t level; 122 rt_kprintf("shutdown...\n"); 123 124 level = rt_hw_interrupt_disable(); 125 while (level) 126 { 127 RT_ASSERT(0); 128 } 129 } 130