xref: /nrf52832-nimble/rt-thread/libcpu/ppc/common/ptrace.h (revision 104654410c56c573564690304ae786df310c91fc)
1*10465441SEvalZero #ifndef _PPC_PTRACE_H
2*10465441SEvalZero #define _PPC_PTRACE_H
3*10465441SEvalZero 
4*10465441SEvalZero /*
5*10465441SEvalZero  * This struct defines the way the registers are stored on the
6*10465441SEvalZero  * kernel stack during a system call or other kernel entry.
7*10465441SEvalZero  *
8*10465441SEvalZero  * this should only contain volatile regs
9*10465441SEvalZero  * since we can keep non-volatile in the thread_struct
10*10465441SEvalZero  * should set this up when only volatiles are saved
11*10465441SEvalZero  * by intr code.
12*10465441SEvalZero  *
13*10465441SEvalZero  * Since this is going on the stack, *CARE MUST BE TAKEN* to insure
14*10465441SEvalZero  * that the overall structure is a multiple of 16 bytes in length.
15*10465441SEvalZero  *
16*10465441SEvalZero  * Note that the offsets of the fields in this struct correspond with
17*10465441SEvalZero  * the PT_* values below.  This simplifies arch/ppc/kernel/ptrace.c.
18*10465441SEvalZero  */
19*10465441SEvalZero 
20*10465441SEvalZero #ifndef __ASSEMBLY__
21*10465441SEvalZero #define PPC_REG unsigned long
22*10465441SEvalZero 
23*10465441SEvalZero struct pt_regs {
24*10465441SEvalZero     PPC_REG gpr[32];
25*10465441SEvalZero     PPC_REG nip;
26*10465441SEvalZero     PPC_REG msr;
27*10465441SEvalZero     PPC_REG orig_gpr3;	/* Used for restarting system calls */
28*10465441SEvalZero     PPC_REG ctr;
29*10465441SEvalZero     PPC_REG link;
30*10465441SEvalZero     PPC_REG xer;
31*10465441SEvalZero     PPC_REG ccr;
32*10465441SEvalZero     PPC_REG mq;		/* 601 only (not used at present) */
33*10465441SEvalZero                     /* Used on APUS to hold IPL value. */
34*10465441SEvalZero     PPC_REG trap;		/* Reason for being here */
35*10465441SEvalZero     PPC_REG dar;		/* Fault registers */
36*10465441SEvalZero     PPC_REG dsisr;
37*10465441SEvalZero     PPC_REG result;		/* Result of a system call */
38*10465441SEvalZero }__attribute__((packed)) CELL_STACK_FRAME_t;
39*10465441SEvalZero #endif
40*10465441SEvalZero 
41*10465441SEvalZero #define STACK_FRAME_OVERHEAD	16	/* size of minimum stack frame */
42*10465441SEvalZero 
43*10465441SEvalZero /* Size of stack frame allocated when calling signal handler. */
44*10465441SEvalZero #define __SIGNAL_FRAMESIZE	64
45*10465441SEvalZero 
46*10465441SEvalZero #define instruction_pointer(regs) ((regs)->nip)
47*10465441SEvalZero #define user_mode(regs) (((regs)->msr & MSR_PR) != 0)
48*10465441SEvalZero 
49*10465441SEvalZero /*
50*10465441SEvalZero  * Offsets used by 'ptrace' system call interface.
51*10465441SEvalZero  * These can't be changed without breaking binary compatibility
52*10465441SEvalZero  * with MkLinux, etc.
53*10465441SEvalZero  */
54*10465441SEvalZero #define PT_R0	0
55*10465441SEvalZero #define PT_R1	1
56*10465441SEvalZero #define PT_R2	2
57*10465441SEvalZero #define PT_R3	3
58*10465441SEvalZero #define PT_R4	4
59*10465441SEvalZero #define PT_R5	5
60*10465441SEvalZero #define PT_R6	6
61*10465441SEvalZero #define PT_R7	7
62*10465441SEvalZero #define PT_R8	8
63*10465441SEvalZero #define PT_R9	9
64*10465441SEvalZero #define PT_R10	10
65*10465441SEvalZero #define PT_R11	11
66*10465441SEvalZero #define PT_R12	12
67*10465441SEvalZero #define PT_R13	13
68*10465441SEvalZero #define PT_R14	14
69*10465441SEvalZero #define PT_R15	15
70*10465441SEvalZero #define PT_R16	16
71*10465441SEvalZero #define PT_R17	17
72*10465441SEvalZero #define PT_R18	18
73*10465441SEvalZero #define PT_R19	19
74*10465441SEvalZero #define PT_R20	20
75*10465441SEvalZero #define PT_R21	21
76*10465441SEvalZero #define PT_R22	22
77*10465441SEvalZero #define PT_R23	23
78*10465441SEvalZero #define PT_R24	24
79*10465441SEvalZero #define PT_R25	25
80*10465441SEvalZero #define PT_R26	26
81*10465441SEvalZero #define PT_R27	27
82*10465441SEvalZero #define PT_R28	28
83*10465441SEvalZero #define PT_R29	29
84*10465441SEvalZero #define PT_R30	30
85*10465441SEvalZero #define PT_R31	31
86*10465441SEvalZero 
87*10465441SEvalZero #define PT_NIP	32
88*10465441SEvalZero #define PT_MSR	33
89*10465441SEvalZero #define PT_ORIG_R3 34
90*10465441SEvalZero #define PT_CTR	35
91*10465441SEvalZero #define PT_LNK	36
92*10465441SEvalZero #define PT_XER	37
93*10465441SEvalZero #define PT_CCR	38
94*10465441SEvalZero #define PT_MQ	39
95*10465441SEvalZero 
96*10465441SEvalZero #define PT_FPR0	48	/* each FP reg occupies 2 slots in this space */
97*10465441SEvalZero #define PT_FPR31 (PT_FPR0 + 2*31)
98*10465441SEvalZero #define PT_FPSCR (PT_FPR0 + 2*32 + 1)
99*10465441SEvalZero 
100*10465441SEvalZero #endif
101