1*10465441SEvalZero /*
2*10465441SEvalZero * File : interrupt.c
3*10465441SEvalZero * COPYRIGHT (C) 2008 - 2016, RT-Thread Development Team
4*10465441SEvalZero *
5*10465441SEvalZero * This program is free software; you can redistribute it and/or modify
6*10465441SEvalZero * it under the terms of the GNU General Public License as published by
7*10465441SEvalZero * the Free Software Foundation; either version 2 of the License, or
8*10465441SEvalZero * (at your option) any later version.
9*10465441SEvalZero *
10*10465441SEvalZero * This program is distributed in the hope that it will be useful,
11*10465441SEvalZero * but WITHOUT ANY WARRANTY; without even the implied warranty of
12*10465441SEvalZero * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13*10465441SEvalZero * GNU General Public License for more details.
14*10465441SEvalZero *
15*10465441SEvalZero * You should have received a copy of the GNU General Public License along
16*10465441SEvalZero * with this program; if not, write to the Free Software Foundation, Inc.,
17*10465441SEvalZero * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
18*10465441SEvalZero *
19*10465441SEvalZero * Change Logs:
20*10465441SEvalZero * 2010-07-09 Bernard first version
21*10465441SEvalZero * 2013-03-29 aozima Modify the interrupt interface implementations.
22*10465441SEvalZero */
23*10465441SEvalZero
24*10465441SEvalZero #include <rtthread.h>
25*10465441SEvalZero #include <rthw.h>
26*10465441SEvalZero #include <board.h>
27*10465441SEvalZero
28*10465441SEvalZero #if defined(RT_USING_JZ4770) || defined(RT_USING_JZ4775) || defined(RT_USING_JZ_M150) || defined(RT_USING_JZ_X1000)
29*10465441SEvalZero #define INTERRUPTS_MAX 64
30*10465441SEvalZero #else
31*10465441SEvalZero #define INTERRUPTS_MAX 32
32*10465441SEvalZero #endif
33*10465441SEvalZero
34*10465441SEvalZero extern rt_uint32_t rt_interrupt_nest;
35*10465441SEvalZero rt_uint32_t rt_interrupt_from_thread, rt_interrupt_to_thread;
36*10465441SEvalZero rt_uint32_t rt_thread_switch_interrupt_flag;
37*10465441SEvalZero
38*10465441SEvalZero static struct rt_irq_desc isr_table[INTERRUPTS_MAX];
39*10465441SEvalZero
40*10465441SEvalZero /**
41*10465441SEvalZero * @addtogroup Ingenic
42*10465441SEvalZero */
43*10465441SEvalZero /*@{*/
44*10465441SEvalZero
rt_hw_interrupt_handler(int vector,void * param)45*10465441SEvalZero static void rt_hw_interrupt_handler(int vector, void *param)
46*10465441SEvalZero {
47*10465441SEvalZero rt_kprintf("Unhandled interrupt %d occured!!!\n", vector);
48*10465441SEvalZero }
49*10465441SEvalZero
50*10465441SEvalZero /**
51*10465441SEvalZero * This function will initialize hardware interrupt
52*10465441SEvalZero */
rt_hw_interrupt_init(void)53*10465441SEvalZero void rt_hw_interrupt_init(void)
54*10465441SEvalZero {
55*10465441SEvalZero rt_int32_t idx;
56*10465441SEvalZero
57*10465441SEvalZero rt_memset(isr_table, 0x00, sizeof(isr_table));
58*10465441SEvalZero for (idx = 0; idx < INTERRUPTS_MAX; idx ++)
59*10465441SEvalZero {
60*10465441SEvalZero isr_table[idx].handler = rt_hw_interrupt_handler;
61*10465441SEvalZero }
62*10465441SEvalZero
63*10465441SEvalZero /* init interrupt nest, and context in thread sp */
64*10465441SEvalZero rt_interrupt_nest = 0;
65*10465441SEvalZero rt_interrupt_from_thread = 0;
66*10465441SEvalZero rt_interrupt_to_thread = 0;
67*10465441SEvalZero rt_thread_switch_interrupt_flag = 0;
68*10465441SEvalZero }
69*10465441SEvalZero
70*10465441SEvalZero /**
71*10465441SEvalZero * This function will mask a interrupt.
72*10465441SEvalZero * @param vector the interrupt number
73*10465441SEvalZero */
rt_hw_interrupt_mask(int vector)74*10465441SEvalZero void rt_hw_interrupt_mask(int vector)
75*10465441SEvalZero {
76*10465441SEvalZero /* mask interrupt */
77*10465441SEvalZero __intc_mask_irq(vector);
78*10465441SEvalZero }
79*10465441SEvalZero
80*10465441SEvalZero /**
81*10465441SEvalZero * This function will un-mask a interrupt.
82*10465441SEvalZero * @param vector the interrupt number
83*10465441SEvalZero */
rt_hw_interrupt_umask(int vector)84*10465441SEvalZero void rt_hw_interrupt_umask(int vector)
85*10465441SEvalZero {
86*10465441SEvalZero __intc_unmask_irq(vector);
87*10465441SEvalZero }
88*10465441SEvalZero
89*10465441SEvalZero /**
90*10465441SEvalZero * This function will install a interrupt service routine to a interrupt.
91*10465441SEvalZero * @param vector the interrupt number
92*10465441SEvalZero * @param handler the interrupt service routine to be installed
93*10465441SEvalZero * @param param the interrupt service function parameter
94*10465441SEvalZero * @param name the interrupt name
95*10465441SEvalZero * @return old handler
96*10465441SEvalZero */
rt_hw_interrupt_install(int vector,rt_isr_handler_t handler,void * param,const char * name)97*10465441SEvalZero rt_isr_handler_t rt_hw_interrupt_install(int vector, rt_isr_handler_t handler,
98*10465441SEvalZero void *param, const char *name)
99*10465441SEvalZero {
100*10465441SEvalZero rt_isr_handler_t old_handler = RT_NULL;
101*10465441SEvalZero
102*10465441SEvalZero if(vector < INTERRUPTS_MAX)
103*10465441SEvalZero {
104*10465441SEvalZero old_handler = isr_table[vector].handler;
105*10465441SEvalZero
106*10465441SEvalZero #ifdef RT_USING_INTERRUPT_INFO
107*10465441SEvalZero rt_strncpy(isr_table[vector].name, name, RT_NAME_MAX);
108*10465441SEvalZero #endif /* RT_USING_INTERRUPT_INFO */
109*10465441SEvalZero isr_table[vector].handler = handler;
110*10465441SEvalZero isr_table[vector].param = param;
111*10465441SEvalZero }
112*10465441SEvalZero
113*10465441SEvalZero return old_handler;
114*10465441SEvalZero }
115*10465441SEvalZero
116*10465441SEvalZero #if defined(RT_USING_JZ4770) || defined(RT_USING_JZ4775) || defined(RT_USING_JZ_M150) || defined(RT_USING_JZ_X1000)
117*10465441SEvalZero /*
118*10465441SEvalZero * fls - find last bit set.
119*10465441SEvalZero * @word: The word to search
120*10465441SEvalZero *
121*10465441SEvalZero * This is defined the same way as ffs.
122*10465441SEvalZero * Note fls(0) = 0, fls(1) = 1, fls(0x80000000) = 32.
123*10465441SEvalZero */
fls(int x)124*10465441SEvalZero rt_inline int fls(int x)
125*10465441SEvalZero {
126*10465441SEvalZero __asm__("clz %0, %1" : "=r" (x) : "r" (x));
127*10465441SEvalZero
128*10465441SEvalZero return 32 - x;
129*10465441SEvalZero }
130*10465441SEvalZero #endif
131*10465441SEvalZero
132*10465441SEvalZero #include <mipsregs.h>
133*10465441SEvalZero
rt_interrupt_dispatch(void * ptreg)134*10465441SEvalZero void rt_interrupt_dispatch(void *ptreg)
135*10465441SEvalZero {
136*10465441SEvalZero int i;
137*10465441SEvalZero void *param;
138*10465441SEvalZero rt_isr_handler_t irq_func;
139*10465441SEvalZero
140*10465441SEvalZero #if defined(RT_USING_JZ4770) || defined(RT_USING_JZ4775) || defined(RT_USING_JZ_M150) || defined(RT_USING_JZ_X1000)
141*10465441SEvalZero int irq = 0, group;
142*10465441SEvalZero rt_uint32_t intc_ipr0 = 0, intc_ipr1 = 0, vpu_pending = 0;
143*10465441SEvalZero
144*10465441SEvalZero rt_uint32_t c0_status, c0_cause;
145*10465441SEvalZero rt_uint32_t pending_im;
146*10465441SEvalZero
147*10465441SEvalZero /* check os timer */
148*10465441SEvalZero c0_status = read_c0_status();
149*10465441SEvalZero c0_cause = read_c0_cause();
150*10465441SEvalZero
151*10465441SEvalZero pending_im = (c0_cause & ST0_IM) & (c0_status & ST0_IM);
152*10465441SEvalZero
153*10465441SEvalZero if (pending_im & CAUSEF_IP3)
154*10465441SEvalZero {
155*10465441SEvalZero extern void rt_hw_ost_handler(void);
156*10465441SEvalZero rt_hw_ost_handler();
157*10465441SEvalZero return;
158*10465441SEvalZero }
159*10465441SEvalZero
160*10465441SEvalZero if (pending_im & CAUSEF_IP2)
161*10465441SEvalZero {
162*10465441SEvalZero intc_ipr0 = REG_INTC_IPR(0);
163*10465441SEvalZero intc_ipr1 = REG_INTC_IPR(1);
164*10465441SEvalZero
165*10465441SEvalZero if (intc_ipr0)
166*10465441SEvalZero {
167*10465441SEvalZero irq = fls(intc_ipr0) - 1;
168*10465441SEvalZero intc_ipr0 &= ~(1<<irq);
169*10465441SEvalZero }
170*10465441SEvalZero else if(intc_ipr1)
171*10465441SEvalZero {
172*10465441SEvalZero irq = fls(intc_ipr1) - 1;
173*10465441SEvalZero intc_ipr1 &= ~(1<<irq);
174*10465441SEvalZero irq += 32;
175*10465441SEvalZero }
176*10465441SEvalZero #ifndef RT_USING_JZ_X1000 /* X1000 has no VPU */
177*10465441SEvalZero else
178*10465441SEvalZero {
179*10465441SEvalZero __asm__ __volatile__ (
180*10465441SEvalZero "mfc0 %0, $13, 0 \n\t"
181*10465441SEvalZero "nop \n\t"
182*10465441SEvalZero :"=r"(vpu_pending)
183*10465441SEvalZero :);
184*10465441SEvalZero
185*10465441SEvalZero if(vpu_pending & 0x800)
186*10465441SEvalZero irq = IRQ_VPU;
187*10465441SEvalZero else
188*10465441SEvalZero return;
189*10465441SEvalZero }
190*10465441SEvalZero #endif
191*10465441SEvalZero
192*10465441SEvalZero if (irq >= INTERRUPTS_MAX)
193*10465441SEvalZero rt_kprintf("max interrupt, irq=%d\n", irq);
194*10465441SEvalZero
195*10465441SEvalZero /* do interrupt */
196*10465441SEvalZero irq_func = isr_table[irq].handler;
197*10465441SEvalZero param = isr_table[irq].param;
198*10465441SEvalZero (*irq_func)(irq, param);
199*10465441SEvalZero
200*10465441SEvalZero #ifdef RT_USING_INTERRUPT_INFO
201*10465441SEvalZero isr_table[i].counter++;
202*10465441SEvalZero #endif /* RT_USING_INTERRUPT_INFO */
203*10465441SEvalZero
204*10465441SEvalZero /* ack interrupt */
205*10465441SEvalZero __intc_ack_irq(irq);
206*10465441SEvalZero }
207*10465441SEvalZero
208*10465441SEvalZero if (pending_im & CAUSEF_IP0)
209*10465441SEvalZero rt_kprintf("CAUSEF_IP0\n");
210*10465441SEvalZero if (pending_im & CAUSEF_IP1)
211*10465441SEvalZero rt_kprintf("CAUSEF_IP1\n");
212*10465441SEvalZero if (pending_im & CAUSEF_IP4)
213*10465441SEvalZero rt_kprintf("CAUSEF_IP4\n");
214*10465441SEvalZero if (pending_im & CAUSEF_IP5)
215*10465441SEvalZero rt_kprintf("CAUSEF_IP5\n");
216*10465441SEvalZero if (pending_im & CAUSEF_IP6)
217*10465441SEvalZero rt_kprintf("CAUSEF_IP6\n");
218*10465441SEvalZero if (pending_im & CAUSEF_IP7)
219*10465441SEvalZero rt_kprintf("CAUSEF_IP7\n");
220*10465441SEvalZero #else
221*10465441SEvalZero static rt_uint32_t pending = 0;
222*10465441SEvalZero
223*10465441SEvalZero /* the hardware interrupt */
224*10465441SEvalZero pending |= REG_INTC_IPR;
225*10465441SEvalZero if (!pending) return;
226*10465441SEvalZero
227*10465441SEvalZero for (i = INTERRUPTS_MAX; i > 0; --i)
228*10465441SEvalZero {
229*10465441SEvalZero if ((pending & (1<<i)))
230*10465441SEvalZero {
231*10465441SEvalZero pending &= ~(1<<i);
232*10465441SEvalZero
233*10465441SEvalZero /* do interrupt */
234*10465441SEvalZero irq_func = isr_table[i].handler;
235*10465441SEvalZero param = isr_table[i].param;
236*10465441SEvalZero (*irq_func)(i, param);
237*10465441SEvalZero
238*10465441SEvalZero #ifdef RT_USING_INTERRUPT_INFO
239*10465441SEvalZero isr_table[i].counter++;
240*10465441SEvalZero #endif /* RT_USING_INTERRUPT_INFO */
241*10465441SEvalZero
242*10465441SEvalZero /* ack interrupt */
243*10465441SEvalZero __intc_ack_irq(i);
244*10465441SEvalZero }
245*10465441SEvalZero }
246*10465441SEvalZero #endif
247*10465441SEvalZero }
248*10465441SEvalZero
249*10465441SEvalZero /*@}*/
250