xref: /nrf52832-nimble/rt-thread/libcpu/mips/common/mips_addrspace.h (revision 104654410c56c573564690304ae786df310c91fc)
1*10465441SEvalZero /*
2*10465441SEvalZero  * File      : mips_addrspace.h
3*10465441SEvalZero  * This file is part of RT-Thread RTOS
4*10465441SEvalZero  * COPYRIGHT (C) 2008 - 2012, RT-Thread Development Team
5*10465441SEvalZero  *
6*10465441SEvalZero  *  This program is free software; you can redistribute it and/or modify
7*10465441SEvalZero  *  it under the terms of the GNU General Public License as published by
8*10465441SEvalZero  *  the Free Software Foundation; either version 2 of the License, or
9*10465441SEvalZero  *  (at your option) any later version.
10*10465441SEvalZero  *
11*10465441SEvalZero  *  This program is distributed in the hope that it will be useful,
12*10465441SEvalZero  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
13*10465441SEvalZero  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14*10465441SEvalZero  *  GNU General Public License for more details.
15*10465441SEvalZero  *
16*10465441SEvalZero  *  You should have received a copy of the GNU General Public License along
17*10465441SEvalZero  *  with this program; if not, write to the Free Software Foundation, Inc.,
18*10465441SEvalZero  *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
19*10465441SEvalZero  *
20*10465441SEvalZero  * Change Logs:
21*10465441SEvalZero  * Date           Author       Notes
22*10465441SEvalZero  * 2016��9��12��     Urey         the first version
23*10465441SEvalZero  */
24*10465441SEvalZero 
25*10465441SEvalZero #ifndef _MIPS_ADDRSPACE_H_
26*10465441SEvalZero #define _MIPS_ADDRSPACE_H_
27*10465441SEvalZero 
28*10465441SEvalZero 
29*10465441SEvalZero /*
30*10465441SEvalZero  *  Configure language
31*10465441SEvalZero  */
32*10465441SEvalZero #ifdef __ASSEMBLY__
33*10465441SEvalZero #define _ATYPE_
34*10465441SEvalZero #define _ATYPE32_
35*10465441SEvalZero #define _ATYPE64_
36*10465441SEvalZero #define _CONST64_(x)	x
37*10465441SEvalZero #else
38*10465441SEvalZero #define _ATYPE_		__PTRDIFF_TYPE__
39*10465441SEvalZero #define _ATYPE32_	int
40*10465441SEvalZero #define _ATYPE64_	__s64
41*10465441SEvalZero #ifdef CONFIG_64BIT
42*10465441SEvalZero #define _CONST64_(x)	x ## L
43*10465441SEvalZero #else
44*10465441SEvalZero #define _CONST64_(x)	x ## LL
45*10465441SEvalZero #endif
46*10465441SEvalZero #endif
47*10465441SEvalZero 
48*10465441SEvalZero /*
49*10465441SEvalZero  *  32-bit MIPS address spaces
50*10465441SEvalZero  */
51*10465441SEvalZero #ifdef __ASSEMBLY__
52*10465441SEvalZero #define _ACAST32_
53*10465441SEvalZero #define _ACAST64_
54*10465441SEvalZero #else
55*10465441SEvalZero #define _ACAST32_		(_ATYPE_)(_ATYPE32_)	/* widen if necessary */
56*10465441SEvalZero #define _ACAST64_		(_ATYPE64_)		/* do _not_ narrow */
57*10465441SEvalZero #endif
58*10465441SEvalZero 
59*10465441SEvalZero /*
60*10465441SEvalZero  * Returns the kernel segment base of a given address
61*10465441SEvalZero  */
62*10465441SEvalZero #define KSEGX(a)		((_ACAST32_ (a)) & 0xe0000000)
63*10465441SEvalZero 
64*10465441SEvalZero /*
65*10465441SEvalZero  * Returns the physical address of a CKSEGx / XKPHYS address
66*10465441SEvalZero  */
67*10465441SEvalZero #define CPHYSADDR(a)		((_ACAST32_(a)) & 0x1fffffff)
68*10465441SEvalZero #define XPHYSADDR(a)		((_ACAST64_(a)) &			\
69*10465441SEvalZero 				 _CONST64_(0x000000ffffffffff))
70*10465441SEvalZero 
71*10465441SEvalZero #ifdef CONFIG_64BIT
72*10465441SEvalZero 
73*10465441SEvalZero /*
74*10465441SEvalZero  * Memory segments (64bit kernel mode addresses)
75*10465441SEvalZero  * The compatibility segments use the full 64-bit sign extended value.  Note
76*10465441SEvalZero  * the R8000 doesn't have them so don't reference these in generic MIPS code.
77*10465441SEvalZero  */
78*10465441SEvalZero #define XKUSEG			_CONST64_(0x0000000000000000)
79*10465441SEvalZero #define XKSSEG			_CONST64_(0x4000000000000000)
80*10465441SEvalZero #define XKPHYS			_CONST64_(0x8000000000000000)
81*10465441SEvalZero #define XKSEG			_CONST64_(0xc000000000000000)
82*10465441SEvalZero #define CKSEG0			_CONST64_(0xffffffff80000000)
83*10465441SEvalZero #define CKSEG1			_CONST64_(0xffffffffa0000000)
84*10465441SEvalZero #define CKSSEG			_CONST64_(0xffffffffc0000000)
85*10465441SEvalZero #define CKSEG3			_CONST64_(0xffffffffe0000000)
86*10465441SEvalZero 
87*10465441SEvalZero #define CKSEG0ADDR(a)		(CPHYSADDR(a) | CKSEG0)
88*10465441SEvalZero #define CKSEG1ADDR(a)		(CPHYSADDR(a) | CKSEG1)
89*10465441SEvalZero #define CKSEG2ADDR(a)		(CPHYSADDR(a) | CKSEG2)
90*10465441SEvalZero #define CKSEG3ADDR(a)		(CPHYSADDR(a) | CKSEG3)
91*10465441SEvalZero 
92*10465441SEvalZero #else
93*10465441SEvalZero 
94*10465441SEvalZero #define CKSEG0ADDR(a)		(CPHYSADDR(a) | KSEG0BASE)
95*10465441SEvalZero #define CKSEG1ADDR(a)		(CPHYSADDR(a) | KSEG1BASE)
96*10465441SEvalZero #define CKSEG2ADDR(a)		(CPHYSADDR(a) | KSEG2BASE)
97*10465441SEvalZero #define CKSEG3ADDR(a)		(CPHYSADDR(a) | KSEG3BASE)
98*10465441SEvalZero 
99*10465441SEvalZero /*
100*10465441SEvalZero  * Map an address to a certain kernel segment
101*10465441SEvalZero  */
102*10465441SEvalZero #define KSEG0ADDR(a)		(CPHYSADDR(a) | KSEG0BASE)
103*10465441SEvalZero #define KSEG1ADDR(a)		(CPHYSADDR(a) | KSEG1BASE)
104*10465441SEvalZero #define KSEG2ADDR(a)		(CPHYSADDR(a) | KSEG2BASE)
105*10465441SEvalZero #define KSEG3ADDR(a)		(CPHYSADDR(a) | KSEG3BASE)
106*10465441SEvalZero 
107*10465441SEvalZero /*
108*10465441SEvalZero  * Memory segments (32bit kernel mode addresses)
109*10465441SEvalZero  * These are the traditional names used in the 32-bit universe.
110*10465441SEvalZero  */
111*10465441SEvalZero //#define KUSEGBASE			0x00000000
112*10465441SEvalZero //#define KSEG0BASE			0x80000000
113*10465441SEvalZero //#define KSEG1BASE			0xa0000000
114*10465441SEvalZero //#define KSEG2BASE			0xc0000000
115*10465441SEvalZero //#define KSEG3BASE			0xe0000000
116*10465441SEvalZero 
117*10465441SEvalZero #define CKUSEG			0x00000000
118*10465441SEvalZero #define CKSEG0			0x80000000
119*10465441SEvalZero #define CKSEG1			0xa0000000
120*10465441SEvalZero #define CKSEG2			0xc0000000
121*10465441SEvalZero #define CKSEG3			0xe0000000
122*10465441SEvalZero 
123*10465441SEvalZero #endif
124*10465441SEvalZero 
125*10465441SEvalZero /*
126*10465441SEvalZero  * Cache modes for XKPHYS address conversion macros
127*10465441SEvalZero  */
128*10465441SEvalZero #define K_CALG_COH_EXCL1_NOL2	0
129*10465441SEvalZero #define K_CALG_COH_SHRL1_NOL2	1
130*10465441SEvalZero #define K_CALG_UNCACHED		2
131*10465441SEvalZero #define K_CALG_NONCOHERENT	3
132*10465441SEvalZero #define K_CALG_COH_EXCL		4
133*10465441SEvalZero #define K_CALG_COH_SHAREABLE	5
134*10465441SEvalZero #define K_CALG_NOTUSED		6
135*10465441SEvalZero #define K_CALG_UNCACHED_ACCEL	7
136*10465441SEvalZero 
137*10465441SEvalZero /*
138*10465441SEvalZero  * 64-bit address conversions
139*10465441SEvalZero  */
140*10465441SEvalZero #define PHYS_TO_XKSEG_UNCACHED(p)	PHYS_TO_XKPHYS(K_CALG_UNCACHED, (p))
141*10465441SEvalZero #define PHYS_TO_XKSEG_CACHED(p)		PHYS_TO_XKPHYS(K_CALG_COH_SHAREABLE, (p))
142*10465441SEvalZero #define XKPHYS_TO_PHYS(p)		((p) & TO_PHYS_MASK)
143*10465441SEvalZero #define PHYS_TO_XKPHYS(cm, a)		(_CONST64_(0x8000000000000000) | \
144*10465441SEvalZero 					 (_CONST64_(cm) << 59) | (a))
145*10465441SEvalZero 
146*10465441SEvalZero /*
147*10465441SEvalZero  * Returns the uncached address of a sdram address
148*10465441SEvalZero  */
149*10465441SEvalZero #ifndef __ASSEMBLY__
150*10465441SEvalZero #if defined(CONFIG_SOC_AU1X00) || defined(CONFIG_TB0229)
151*10465441SEvalZero /* We use a 36 bit physical address map here and
152*10465441SEvalZero    cannot access physical memory directly from core */
153*10465441SEvalZero #define UNCACHED_SDRAM(a) (((unsigned long)(a)) | 0x20000000)
154*10465441SEvalZero #else	/* !CONFIG_SOC_AU1X00 */
155*10465441SEvalZero #define UNCACHED_SDRAM(a) CKSEG1ADDR(a)
156*10465441SEvalZero #endif	/* CONFIG_SOC_AU1X00 */
157*10465441SEvalZero #endif	/* __ASSEMBLY__ */
158*10465441SEvalZero 
159*10465441SEvalZero /*
160*10465441SEvalZero  * The ultimate limited of the 64-bit MIPS architecture:  2 bits for selecting
161*10465441SEvalZero  * the region, 3 bits for the CCA mode.  This leaves 59 bits of which the
162*10465441SEvalZero  * R8000 implements most with its 48-bit physical address space.
163*10465441SEvalZero  */
164*10465441SEvalZero #define TO_PHYS_MASK	_CONST64_(0x07ffffffffffffff)	/* 2^^59 - 1 */
165*10465441SEvalZero 
166*10465441SEvalZero #ifndef CONFIG_CPU_R8000
167*10465441SEvalZero 
168*10465441SEvalZero /*
169*10465441SEvalZero  * The R8000 doesn't have the 32-bit compat spaces so we don't define them
170*10465441SEvalZero  * in order to catch bugs in the source code.
171*10465441SEvalZero  */
172*10465441SEvalZero 
173*10465441SEvalZero #define COMPAT_K1BASE32		_CONST64_(0xffffffffa0000000)
174*10465441SEvalZero #define PHYS_TO_COMPATK1(x)	((x) | COMPAT_K1BASE32) /* 32-bit compat k1 */
175*10465441SEvalZero 
176*10465441SEvalZero #endif
177*10465441SEvalZero 
178*10465441SEvalZero #define KDM_TO_PHYS(x)		(_ACAST64_ (x) & TO_PHYS_MASK)
179*10465441SEvalZero #define PHYS_TO_K0(x)		(_ACAST64_ (x) | CAC_BASE)
180*10465441SEvalZero 
181*10465441SEvalZero 
182*10465441SEvalZero #ifndef __ASSEMBLY__
183*10465441SEvalZero /*
184*10465441SEvalZero  * Change virtual addresses to physical addresses and vv.
185*10465441SEvalZero  * These are trivial on the 1:1 Linux/MIPS mapping
186*10465441SEvalZero  */
virt_to_phys(volatile void * address)187*10465441SEvalZero static inline phys_addr_t virt_to_phys(volatile void * address)
188*10465441SEvalZero {
189*10465441SEvalZero #ifndef CONFIG_64BIT
190*10465441SEvalZero 	return CPHYSADDR(address);
191*10465441SEvalZero #else
192*10465441SEvalZero 	return XPHYSADDR(address);
193*10465441SEvalZero #endif
194*10465441SEvalZero }
195*10465441SEvalZero 
phys_to_virt(unsigned long address)196*10465441SEvalZero static inline void * phys_to_virt(unsigned long address)
197*10465441SEvalZero {
198*10465441SEvalZero #ifndef CONFIG_64BIT
199*10465441SEvalZero 	return (void *)KSEG0ADDR(address);
200*10465441SEvalZero #else
201*10465441SEvalZero 	return (void *)CKSEG0ADDR(address);
202*10465441SEvalZero #endif
203*10465441SEvalZero }
204*10465441SEvalZero #endif
205*10465441SEvalZero 
206*10465441SEvalZero 
207*10465441SEvalZero #endif /* _MIPS_ADDRSPACE_H_ */
208