xref: /nrf52832-nimble/rt-thread/libcpu/mips/common/asm.h (revision 104654410c56c573564690304ae786df310c91fc)
1*10465441SEvalZero /*
2*10465441SEvalZero  * This file is subject to the terms and conditions of the GNU General Public
3*10465441SEvalZero  * License.  See the file "COPYING" in the main directory of this archive
4*10465441SEvalZero  * for more details.
5*10465441SEvalZero  *
6*10465441SEvalZero  * Copyright (C) 1995, 1996, 1997, 1999, 2001 by Ralf Baechle
7*10465441SEvalZero  * Copyright (C) 1999 by Silicon Graphics, Inc.
8*10465441SEvalZero  * Copyright (C) 2001 MIPS Technologies, Inc.
9*10465441SEvalZero  * Copyright (C) 2002  Maciej W. Rozycki
10*10465441SEvalZero  *
11*10465441SEvalZero  * Some useful macros for MIPS assembler code
12*10465441SEvalZero  *
13*10465441SEvalZero  * Some of the routines below contain useless nops that will be optimized
14*10465441SEvalZero  * away by gas in -O mode. These nops are however required to fill delay
15*10465441SEvalZero  * slots in noreorder mode.
16*10465441SEvalZero  */
17*10465441SEvalZero #ifndef __ASM_H__
18*10465441SEvalZero #define __ASM_H__
19*10465441SEvalZero 
20*10465441SEvalZero /*
21*10465441SEvalZero  * LEAF - declare leaf routine
22*10465441SEvalZero  */
23*10465441SEvalZero #define	LEAF(symbol)                        \
24*10465441SEvalZero 		.globl	symbol;                     \
25*10465441SEvalZero 		.align	2;                          \
26*10465441SEvalZero 		.type	symbol,@function;           \
27*10465441SEvalZero 		.ent	symbol,0;                   \
28*10465441SEvalZero symbol:		.frame	sp,0,ra
29*10465441SEvalZero 
30*10465441SEvalZero /*
31*10465441SEvalZero  * NESTED - declare nested routine entry point
32*10465441SEvalZero  */
33*10465441SEvalZero #define	NESTED(symbol, framesize, rpc)      \
34*10465441SEvalZero 		.globl	symbol;                     \
35*10465441SEvalZero 		.align	2;                          \
36*10465441SEvalZero 		.type	symbol,@function;           \
37*10465441SEvalZero 		.ent	symbol,0;                   \
38*10465441SEvalZero symbol:		.frame	sp, framesize, rpc
39*10465441SEvalZero 
40*10465441SEvalZero /*
41*10465441SEvalZero  * END - mark end of function
42*10465441SEvalZero  */
43*10465441SEvalZero #define	END(function)                       \
44*10465441SEvalZero 		.end	function;		        	\
45*10465441SEvalZero 		.size	function,.-function
46*10465441SEvalZero 
47*10465441SEvalZero /*
48*10465441SEvalZero  * EXPORT - export definition of symbol
49*10465441SEvalZero  */
50*10465441SEvalZero #define EXPORT(symbol)						\
51*10465441SEvalZero 		.globl	symbol;                     \
52*10465441SEvalZero symbol:
53*10465441SEvalZero 
54*10465441SEvalZero /*
55*10465441SEvalZero  * FEXPORT - export definition of a function symbol
56*10465441SEvalZero  */
57*10465441SEvalZero #define FEXPORT(symbol)						\
58*10465441SEvalZero 		.globl	symbol;						\
59*10465441SEvalZero 		.type	symbol,@function;			\
60*10465441SEvalZero symbol:
61*10465441SEvalZero 
62*10465441SEvalZero /*
63*10465441SEvalZero  * Global data declaration with size.
64*10465441SEvalZero  */
65*10465441SEvalZero #define EXPORTS(name,sz) 		\
66*10465441SEvalZero   	.globl name; 				\
67*10465441SEvalZero   	.type name,@object; 		\
68*10465441SEvalZero   	.size name,sz; 				\
69*10465441SEvalZero name:
70*10465441SEvalZero 
71*10465441SEvalZero /*
72*10465441SEvalZero  * Weak data declaration with size.
73*10465441SEvalZero  */
74*10465441SEvalZero #define WEXPORT(name,sz) 		\
75*10465441SEvalZero   	.weakext name; 				\
76*10465441SEvalZero   	.type name,@object; 		\
77*10465441SEvalZero   	.size name,sz; 				\
78*10465441SEvalZero name:
79*10465441SEvalZero 
80*10465441SEvalZero /*
81*10465441SEvalZero  * Global data reference with size.
82*10465441SEvalZero  */
83*10465441SEvalZero #define	IMPORT(name, size) 		\
84*10465441SEvalZero 	.extern	name,size
85*10465441SEvalZero 
86*10465441SEvalZero /*
87*10465441SEvalZero  * Global zeroed data.
88*10465441SEvalZero  */
89*10465441SEvalZero #define BSS(name,size) 			\
90*10465441SEvalZero   	.type name,@object; 		\
91*10465441SEvalZero 	.comm	name,size
92*10465441SEvalZero 
93*10465441SEvalZero /*
94*10465441SEvalZero  * Local zeroed data.
95*10465441SEvalZero  */
96*10465441SEvalZero #define LBSS(name,size) 		\
97*10465441SEvalZero   	.lcomm	name,size
98*10465441SEvalZero 
99*10465441SEvalZero 
100*10465441SEvalZero /*
101*10465441SEvalZero  * ABS - export absolute symbol
102*10465441SEvalZero  */
103*10465441SEvalZero #define	ABS(symbol,value)       \
104*10465441SEvalZero 		.globl	symbol;         \
105*10465441SEvalZero symbol		=	value
106*10465441SEvalZero 
107*10465441SEvalZero 
108*10465441SEvalZero #define	TEXT(msg)               \
109*10465441SEvalZero 		.pushsection .data;		\
110*10465441SEvalZero 8:		.asciiz	msg;            \
111*10465441SEvalZero 		.popsection;
112*10465441SEvalZero 
113*10465441SEvalZero 
114*10465441SEvalZero #define ENTRY(name) 			\
115*10465441SEvalZero   .globl name;					\
116*10465441SEvalZero   .align 2;						\
117*10465441SEvalZero   .ent name,0;					\
118*10465441SEvalZero   name##:
119*10465441SEvalZero 
120*10465441SEvalZero /*
121*10465441SEvalZero  * Macros to handle different pointer/register sizes for 32/64-bit code
122*10465441SEvalZero  */
123*10465441SEvalZero 
124*10465441SEvalZero /*
125*10465441SEvalZero  * Size of a register
126*10465441SEvalZero  */
127*10465441SEvalZero #define SZREG	4
128*10465441SEvalZero 
129*10465441SEvalZero 
130*10465441SEvalZero /*
131*10465441SEvalZero  * Use the following macros in assemblercode to load/store registers,
132*10465441SEvalZero  * pointers etc.
133*10465441SEvalZero  */
134*10465441SEvalZero #define REG_S		sw
135*10465441SEvalZero #define REG_L		lw
136*10465441SEvalZero #define REG_SUBU	subu
137*10465441SEvalZero #define REG_ADDU	addu
138*10465441SEvalZero 
139*10465441SEvalZero 
140*10465441SEvalZero /*
141*10465441SEvalZero  * How to add/sub/load/store/shift C int variables.
142*10465441SEvalZero  */
143*10465441SEvalZero #define INT_ADD		add
144*10465441SEvalZero #define INT_ADDU	addu
145*10465441SEvalZero #define INT_ADDI	addi
146*10465441SEvalZero #define INT_ADDIU	addiu
147*10465441SEvalZero #define INT_SUB		sub
148*10465441SEvalZero #define INT_SUBU	subu
149*10465441SEvalZero #define INT_L		lw
150*10465441SEvalZero #define INT_S		sw
151*10465441SEvalZero #define INT_SLL		sll
152*10465441SEvalZero #define INT_SLLV	sllv
153*10465441SEvalZero #define INT_SRL		srl
154*10465441SEvalZero #define INT_SRLV	srlv
155*10465441SEvalZero #define INT_SRA		sra
156*10465441SEvalZero #define INT_SRAV	srav
157*10465441SEvalZero 
158*10465441SEvalZero 
159*10465441SEvalZero 
160*10465441SEvalZero /*
161*10465441SEvalZero  * How to add/sub/load/store/shift C long variables.
162*10465441SEvalZero  */
163*10465441SEvalZero #define LONG_ADD	add
164*10465441SEvalZero #define LONG_ADDU	addu
165*10465441SEvalZero #define LONG_ADDI	addi
166*10465441SEvalZero #define LONG_ADDIU	addiu
167*10465441SEvalZero #define LONG_SUB	sub
168*10465441SEvalZero #define LONG_SUBU	subu
169*10465441SEvalZero #define LONG_L		lw
170*10465441SEvalZero #define LONG_S		sw
171*10465441SEvalZero #define LONG_SLL	sll
172*10465441SEvalZero #define LONG_SLLV	sllv
173*10465441SEvalZero #define LONG_SRL	srl
174*10465441SEvalZero #define LONG_SRLV	srlv
175*10465441SEvalZero #define LONG_SRA	sra
176*10465441SEvalZero #define LONG_SRAV	srav
177*10465441SEvalZero 
178*10465441SEvalZero #define LONG		.word
179*10465441SEvalZero #define LONGSIZE	4
180*10465441SEvalZero #define LONGMASK	3
181*10465441SEvalZero #define LONGLOG		2
182*10465441SEvalZero 
183*10465441SEvalZero 
184*10465441SEvalZero 
185*10465441SEvalZero /*
186*10465441SEvalZero  * How to add/sub/load/store/shift pointers.
187*10465441SEvalZero  */
188*10465441SEvalZero #define PTR_ADD		add
189*10465441SEvalZero #define PTR_ADDU	addu
190*10465441SEvalZero #define PTR_ADDI	addi
191*10465441SEvalZero #define PTR_ADDIU	addiu
192*10465441SEvalZero #define PTR_SUB		sub
193*10465441SEvalZero #define PTR_SUBU	subu
194*10465441SEvalZero #define PTR_L		lw
195*10465441SEvalZero #define PTR_S		sw
196*10465441SEvalZero #define PTR_LA		la
197*10465441SEvalZero #define PTR_SLL		sll
198*10465441SEvalZero #define PTR_SLLV	sllv
199*10465441SEvalZero #define PTR_SRL		srl
200*10465441SEvalZero #define PTR_SRLV	srlv
201*10465441SEvalZero #define PTR_SRA		sra
202*10465441SEvalZero #define PTR_SRAV	srav
203*10465441SEvalZero 
204*10465441SEvalZero #define PTR_SCALESHIFT	2
205*10465441SEvalZero 
206*10465441SEvalZero #define PTR			.word
207*10465441SEvalZero #define PTRSIZE		4
208*10465441SEvalZero #define PTRLOG		2
209*10465441SEvalZero 
210*10465441SEvalZero 
211*10465441SEvalZero /*
212*10465441SEvalZero  * Some cp0 registers were extended to 64bit for MIPS III.
213*10465441SEvalZero  */
214*10465441SEvalZero #define MFC0		mfc0
215*10465441SEvalZero #define MTC0		mtc0
216*10465441SEvalZero 
217*10465441SEvalZero 
218*10465441SEvalZero #define SSNOP		sll zero, zero, 1
219*10465441SEvalZero 
220*10465441SEvalZero #endif /* end of __ASM_H__ */
221