1*10465441SEvalZero/* 2*10465441SEvalZero * File : context.asm 3*10465441SEvalZero * This file is part of RT-Thread RTOS 4*10465441SEvalZero * COPYRIGHT (C) 2009, RT-Thread Development Team 5*10465441SEvalZero * 6*10465441SEvalZero * The license and distribution terms for this file may be 7*10465441SEvalZero * found in the file LICENSE in this distribution or at 8*10465441SEvalZero * http://www.rt-thread.org/license/LICENSE 9*10465441SEvalZero * 10*10465441SEvalZero * Change Logs: 11*10465441SEvalZero * Date Author Notes 12*10465441SEvalZero * 2010-04-09 fify the first version 13*10465441SEvalZero * 2010-04-19 fify rewrite rt_hw_interrupt_disable/enable fuction 14*10465441SEvalZero * 2010-04-20 fify move peripheral ISR to bsp/interrupts.s34 15*10465441SEvalZero * 16*10465441SEvalZero * For : Renesas M16C 17*10465441SEvalZero * Toolchain : IAR's EW for M16C v3.401 18*10465441SEvalZero */ 19*10465441SEvalZero 20*10465441SEvalZero RSEG CSTACK 21*10465441SEvalZero 22*10465441SEvalZero RSEG ISTACK 23*10465441SEvalZero 24*10465441SEvalZero RSEG CODE(1) 25*10465441SEvalZero 26*10465441SEvalZero EXTERN rt_interrupt_from_thread 27*10465441SEvalZero EXTERN rt_interrupt_to_thread 28*10465441SEvalZero 29*10465441SEvalZero PUBLIC rt_hw_interrupt_disable 30*10465441SEvalZero PUBLIC rt_hw_interrupt_enable 31*10465441SEvalZero PUBLIC rt_hw_context_switch_to 32*10465441SEvalZero PUBLIC os_context_switch 33*10465441SEvalZero 34*10465441SEvalZerort_hw_interrupt_disable: 35*10465441SEvalZero STC FLG, R0 ;fify 20100419 36*10465441SEvalZero FCLR I 37*10465441SEvalZero RTS 38*10465441SEvalZero 39*10465441SEvalZerort_hw_interrupt_enable: 40*10465441SEvalZero LDC R0, FLG ;fify 20100419 41*10465441SEvalZero RTS 42*10465441SEvalZero 43*10465441SEvalZero .EVEN 44*10465441SEvalZeroos_context_switch: 45*10465441SEvalZero PUSHM R0,R1,R2,R3,A0,A1,SB,FB 46*10465441SEvalZero 47*10465441SEvalZero MOV.W rt_interrupt_from_thread, A0 48*10465441SEvalZero STC ISP, [A0] 49*10465441SEvalZero MOV.W rt_interrupt_to_thread, A0 50*10465441SEvalZero LDC [A0], ISP 51*10465441SEvalZero 52*10465441SEvalZero POPM R0,R1,R2,R3,A0,A1,SB,FB ; Restore registers from the new task's stack 53*10465441SEvalZero REIT ; Return from interrup 54*10465441SEvalZero 55*10465441SEvalZero/* 56*10465441SEvalZero * void rt_hw_context_switch_to(rt_uint32 to); 57*10465441SEvalZero * r0 --> to 58*10465441SEvalZero * this fucntion is used to perform the first thread switch 59*10465441SEvalZero */ 60*10465441SEvalZerort_hw_context_switch_to: 61*10465441SEvalZero MOV.W R0, A0 62*10465441SEvalZero LDC [A0], ISP 63*10465441SEvalZero POPM R0,R1,R2,R3,A0,A1,SB,FB 64*10465441SEvalZero REIT 65*10465441SEvalZero 66*10465441SEvalZero END 67