xref: /nrf52832-nimble/rt-thread/libcpu/ia32/hdisr_gcc.S (revision 104654410c56c573564690304ae786df310c91fc)
1*10465441SEvalZero/*
2*10465441SEvalZero * File      : hdisr_gcc.S
3*10465441SEvalZero * This file is part of RT-Thread RTOS
4*10465441SEvalZero * COPYRIGHT (C) 2006, RT-Thread Development Team
5*10465441SEvalZero *
6*10465441SEvalZero * The license and distribution terms for this file may be
7*10465441SEvalZero * found in the file LICENSE in this distribution or at
8*10465441SEvalZero * http://www.rt-thread.org/license/LICENSE
9*10465441SEvalZero *
10*10465441SEvalZero * Change Logs:
11*10465441SEvalZero * Date           Author       Notes
12*10465441SEvalZero * 2006-09-15     QiuYi        The first version
13*10465441SEvalZero */
14*10465441SEvalZero
15*10465441SEvalZero/**
16*10465441SEvalZero * @addtogroup I386
17*10465441SEvalZero */
18*10465441SEvalZero/*@{*/
19*10465441SEvalZero
20*10465441SEvalZero#define ENTRY(proc)\
21*10465441SEvalZero	.align 2;\
22*10465441SEvalZero	.globl proc;\
23*10465441SEvalZero	.type proc,@function;\
24*10465441SEvalZero	proc:
25*10465441SEvalZero#define HDINTERRUPTFNC(name,num) \
26*10465441SEvalZero	ENTRY(name)\
27*10465441SEvalZero	pushl $(num);\
28*10465441SEvalZero	jmp _hdinterrupts;\
29*10465441SEvalZero	.data;\
30*10465441SEvalZero	.long name;\
31*10465441SEvalZero	.text
32*10465441SEvalZero
33*10465441SEvalZero.globl hdinterrupt_func
34*10465441SEvalZero	.data
35*10465441SEvalZero	.align 4
36*10465441SEvalZero	.type hdinterrupt_func,@object
37*10465441SEvalZero	hdinterrupt_func :
38*10465441SEvalZero.text
39*10465441SEvalZero
40*10465441SEvalZero/* the external device interrupts */
41*10465441SEvalZeroHDINTERRUPTFNC(irq0, 0)
42*10465441SEvalZeroHDINTERRUPTFNC(irq1, 1)
43*10465441SEvalZeroHDINTERRUPTFNC(irq2, 2)
44*10465441SEvalZeroHDINTERRUPTFNC(irq3, 3)
45*10465441SEvalZeroHDINTERRUPTFNC(irq4, 4)
46*10465441SEvalZeroHDINTERRUPTFNC(irq5, 5)
47*10465441SEvalZeroHDINTERRUPTFNC(irq6, 6)
48*10465441SEvalZeroHDINTERRUPTFNC(irq7, 7)
49*10465441SEvalZeroHDINTERRUPTFNC(irq8, 8)
50*10465441SEvalZeroHDINTERRUPTFNC(irq9, 9)
51*10465441SEvalZeroHDINTERRUPTFNC(irq10, 10)
52*10465441SEvalZeroHDINTERRUPTFNC(irq11, 11)
53*10465441SEvalZeroHDINTERRUPTFNC(irq12, 12)
54*10465441SEvalZeroHDINTERRUPTFNC(irq13, 13)
55*10465441SEvalZeroHDINTERRUPTFNC(irq14, 14)
56*10465441SEvalZeroHDINTERRUPTFNC(irq15, 15)
57*10465441SEvalZero
58*10465441SEvalZero.p2align 4,0x90
59*10465441SEvalZero.globl _hdinterrupts
60*10465441SEvalZero.type _hdinterrupts,@function
61*10465441SEvalZero.globl rt_interrupt_enter
62*10465441SEvalZero.globl rt_interrupt_leave
63*10465441SEvalZero.globl rt_hw_isr
64*10465441SEvalZero.globl rt_thread_switch_interrupt_flag
65*10465441SEvalZero.globl rt_interrupt_from_thread
66*10465441SEvalZero.globl rt_interrupt_to_thread
67*10465441SEvalZero
68*10465441SEvalZero_hdinterrupts:
69*10465441SEvalZero	push %ds
70*10465441SEvalZero	push %es
71*10465441SEvalZero	pushal
72*10465441SEvalZero	movw $0x10, %ax
73*10465441SEvalZero	movw %ax, %ds
74*10465441SEvalZero	movw %ax, %es
75*10465441SEvalZero	pushl %esp
76*10465441SEvalZero
77*10465441SEvalZero	call rt_interrupt_enter
78*10465441SEvalZero
79*10465441SEvalZero	movl %esp, %eax	      /* copy esp to eax */
80*10465441SEvalZero	addl $0x2c, %eax      /* move to vector address */
81*10465441SEvalZero	movl (%eax), %eax     /* vector(eax) = *eax */
82*10465441SEvalZero
83*10465441SEvalZero	pushl %eax            /* push argument : int vector */
84*10465441SEvalZero	call rt_hw_isr
85*10465441SEvalZero	add $4, %esp          /* restore argument */
86*10465441SEvalZero
87*10465441SEvalZero	call rt_interrupt_leave
88*10465441SEvalZero
89*10465441SEvalZero	/* if rt_thread_switch_interrupt_flag set, jump to _interrupt_thread_switch and don't return */
90*10465441SEvalZero	movl $rt_thread_switch_interrupt_flag, %eax
91*10465441SEvalZero	movl (%eax), %ebx
92*10465441SEvalZero	cmp $0x1, %ebx
93*10465441SEvalZero	jz _interrupt_thread_switch
94*10465441SEvalZero
95*10465441SEvalZero	popl %esp
96*10465441SEvalZero	popal
97*10465441SEvalZero	pop %es
98*10465441SEvalZero	pop %ds
99*10465441SEvalZero	add $4,%esp
100*10465441SEvalZero	iret
101*10465441SEvalZero
102*10465441SEvalZero_interrupt_thread_switch:
103*10465441SEvalZero	popl %esp
104*10465441SEvalZero
105*10465441SEvalZero	movl $0x0, %ebx
106*10465441SEvalZero	movl %ebx, (%eax)
107*10465441SEvalZero
108*10465441SEvalZero	movl $rt_interrupt_from_thread, %eax
109*10465441SEvalZero	movl (%eax), %ebx
110*10465441SEvalZero	movl %esp, (%ebx)
111*10465441SEvalZero
112*10465441SEvalZero	movl $rt_interrupt_to_thread, %ecx
113*10465441SEvalZero	movl (%ecx), %edx
114*10465441SEvalZero	movl (%edx), %esp
115*10465441SEvalZero
116*10465441SEvalZero	popal
117*10465441SEvalZero	pop %es
118*10465441SEvalZero	pop %ds
119*10465441SEvalZero	add $4,%esp
120*10465441SEvalZero	iret
121*10465441SEvalZero
122*10465441SEvalZero/*@}*/
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