xref: /nrf52832-nimble/rt-thread/libcpu/arm/zynq7000/armv7.h (revision 104654410c56c573564690304ae786df310c91fc)
1*10465441SEvalZero #ifndef __ARMV7_H__
2*10465441SEvalZero #define __ARMV7_H__
3*10465441SEvalZero /*
4*10465441SEvalZero  * COPYRIGHT (C) 2013-2014, Shanghai Real-Thread Technology Co., Ltd
5*10465441SEvalZero  *
6*10465441SEvalZero  *  All rights reserved.
7*10465441SEvalZero  *
8*10465441SEvalZero  *  This program is free software; you can redistribute it and/or modify
9*10465441SEvalZero  *  it under the terms of the GNU General Public License as published by
10*10465441SEvalZero  *  the Free Software Foundation; either version 2 of the License, or
11*10465441SEvalZero  *  (at your option) any later version.
12*10465441SEvalZero  *
13*10465441SEvalZero  *  This program is distributed in the hope that it will be useful,
14*10465441SEvalZero  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
15*10465441SEvalZero  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16*10465441SEvalZero  *  GNU General Public License for more details.
17*10465441SEvalZero  *
18*10465441SEvalZero  *  You should have received a copy of the GNU General Public License along
19*10465441SEvalZero  *  with this program; if not, write to the Free Software Foundation, Inc.,
20*10465441SEvalZero  *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
21*10465441SEvalZero  */
22*10465441SEvalZero 
23*10465441SEvalZero /* the exception stack without VFP registers */
24*10465441SEvalZero struct rt_hw_exp_stack
25*10465441SEvalZero {
26*10465441SEvalZero 	unsigned long r0;
27*10465441SEvalZero 	unsigned long r1;
28*10465441SEvalZero 	unsigned long r2;
29*10465441SEvalZero 	unsigned long r3;
30*10465441SEvalZero 	unsigned long r4;
31*10465441SEvalZero 	unsigned long r5;
32*10465441SEvalZero 	unsigned long r6;
33*10465441SEvalZero 	unsigned long r7;
34*10465441SEvalZero 	unsigned long r8;
35*10465441SEvalZero 	unsigned long r9;
36*10465441SEvalZero 	unsigned long r10;
37*10465441SEvalZero 	unsigned long fp;
38*10465441SEvalZero 	unsigned long ip;
39*10465441SEvalZero 	unsigned long sp;
40*10465441SEvalZero 	unsigned long lr;
41*10465441SEvalZero 	unsigned long pc;
42*10465441SEvalZero 	unsigned long cpsr;
43*10465441SEvalZero };
44*10465441SEvalZero 
45*10465441SEvalZero #define USERMODE    0x10
46*10465441SEvalZero #define FIQMODE     0x11
47*10465441SEvalZero #define IRQMODE     0x12
48*10465441SEvalZero #define SVCMODE     0x13
49*10465441SEvalZero #define MONITORMODE 0x16
50*10465441SEvalZero #define ABORTMODE   0x17
51*10465441SEvalZero #define HYPMODE     0x1b
52*10465441SEvalZero #define UNDEFMODE   0x1b
53*10465441SEvalZero #define MODEMASK    0x1f
54*10465441SEvalZero #define NOINT       0xc0
55*10465441SEvalZero 
56*10465441SEvalZero #define T_Bit       (1<<5)
57*10465441SEvalZero #define F_Bit       (1<<6)
58*10465441SEvalZero #define I_Bit       (1<<7)
59*10465441SEvalZero #define A_Bit       (1<<8)
60*10465441SEvalZero #define E_Bit       (1<<9)
61*10465441SEvalZero #define J_Bit       (1<<24)
62*10465441SEvalZero 
63*10465441SEvalZero void rt_hw_mmu_init(void);
64*10465441SEvalZero 
65*10465441SEvalZero #endif
66