xref: /nrf52832-nimble/rt-thread/libcpu/arm/sep4020/interrupt.c (revision 104654410c56c573564690304ae786df310c91fc)
1*10465441SEvalZero /*
2*10465441SEvalZero  * Copyright (c) 2006-2018, RT-Thread Development Team
3*10465441SEvalZero  *
4*10465441SEvalZero  * SPDX-License-Identifier: Apache-2.0
5*10465441SEvalZero  *
6*10465441SEvalZero  * Change Logs:
7*10465441SEvalZero  * Date           Author       Notes
8*10465441SEvalZero  * 2006-03-13     Bernard      first version
9*10465441SEvalZero  * 2013-03-29     aozima       Modify the interrupt interface implementations.
10*10465441SEvalZero  */
11*10465441SEvalZero 
12*10465441SEvalZero #include <rtthread.h>
13*10465441SEvalZero #include <rthw.h>
14*10465441SEvalZero #include <sep4020.h>
15*10465441SEvalZero 
16*10465441SEvalZero #define MAX_HANDLERS	32
17*10465441SEvalZero 
18*10465441SEvalZero extern rt_uint32_t rt_interrupt_nest;
19*10465441SEvalZero 
20*10465441SEvalZero /* exception and interrupt handler table */
21*10465441SEvalZero struct rt_irq_desc isr_table[MAX_HANDLERS];
22*10465441SEvalZero rt_uint32_t rt_interrupt_from_thread, rt_interrupt_to_thread;
23*10465441SEvalZero rt_uint32_t rt_thread_switch_interrupt_flag;
24*10465441SEvalZero 
25*10465441SEvalZero /**
26*10465441SEvalZero  * @addtogroup S3C24X0
27*10465441SEvalZero  */
28*10465441SEvalZero /*@{*/
29*10465441SEvalZero 
rt_hw_interrupt_handle(int vector,void * param)30*10465441SEvalZero static void rt_hw_interrupt_handle(int vector, void *param)
31*10465441SEvalZero {
32*10465441SEvalZero 	rt_kprintf("Unhandled interrupt %d occured!!!\n", vector);
33*10465441SEvalZero }
34*10465441SEvalZero 
35*10465441SEvalZero /**
36*10465441SEvalZero  * This function will initialize hardware interrupt
37*10465441SEvalZero  */
rt_hw_interrupt_init(void)38*10465441SEvalZero void rt_hw_interrupt_init(void)
39*10465441SEvalZero {
40*10465441SEvalZero     register rt_uint32_t idx;
41*10465441SEvalZero 
42*10465441SEvalZero     /*Make sure all intc registers in proper state*/
43*10465441SEvalZero 
44*10465441SEvalZero     /*mask all the irq*/
45*10465441SEvalZero     *(RP)(INTC_IMR) = 0xFFFFFFFF;
46*10465441SEvalZero 
47*10465441SEvalZero     /*enable all the irq*/
48*10465441SEvalZero     *(RP)(INTC_IER)	= 0XFFFFFFFF;
49*10465441SEvalZero 
50*10465441SEvalZero     /*Dont use any forced irq*/
51*10465441SEvalZero     *(RP)(INTC_IFR) = 0x0;
52*10465441SEvalZero 
53*10465441SEvalZero     /*Disable all the fiq*/
54*10465441SEvalZero     *(RP)(INTC_FIER) = 0x0;
55*10465441SEvalZero 
56*10465441SEvalZero     /*Mask all the fiq*/
57*10465441SEvalZero     *(RP)(INTC_FIMR) = 0x0F;
58*10465441SEvalZero 
59*10465441SEvalZero     /*Dont use forced fiq*/
60*10465441SEvalZero     *(RP)(INTC_FIFR) = 0x0;
61*10465441SEvalZero 
62*10465441SEvalZero     /*Intrrupt priority register*/
63*10465441SEvalZero     *(RP)(INTC_IPLR) = 0x0;
64*10465441SEvalZero 
65*10465441SEvalZero     /* init exceptions table */
66*10465441SEvalZero     rt_memset(isr_table, 0x00, sizeof(isr_table));
67*10465441SEvalZero     for(idx=0; idx < MAX_HANDLERS; idx++)
68*10465441SEvalZero     {
69*10465441SEvalZero         isr_table[idx].handler = rt_hw_interrupt_handle;
70*10465441SEvalZero     }
71*10465441SEvalZero 
72*10465441SEvalZero     /* init interrupt nest, and context in thread sp */
73*10465441SEvalZero     rt_interrupt_nest = 0;
74*10465441SEvalZero     rt_interrupt_from_thread = 0;
75*10465441SEvalZero     rt_interrupt_to_thread = 0;
76*10465441SEvalZero     rt_thread_switch_interrupt_flag = 0;
77*10465441SEvalZero }
78*10465441SEvalZero 
79*10465441SEvalZero /**
80*10465441SEvalZero  * This function will mask a interrupt.
81*10465441SEvalZero  * @param vector the interrupt number
82*10465441SEvalZero  */
rt_hw_interrupt_mask(int vector)83*10465441SEvalZero void rt_hw_interrupt_mask(int vector)
84*10465441SEvalZero {
85*10465441SEvalZero 	*(RP)(INTC_IMR) |= 1 << vector;
86*10465441SEvalZero }
87*10465441SEvalZero 
88*10465441SEvalZero /**
89*10465441SEvalZero  * This function will un-mask a interrupt.
90*10465441SEvalZero  * @param vector the interrupt number
91*10465441SEvalZero  */
rt_hw_interrupt_umask(int vector)92*10465441SEvalZero void rt_hw_interrupt_umask(int vector)
93*10465441SEvalZero {
94*10465441SEvalZero 	if(vector == 16)
95*10465441SEvalZero 	{
96*10465441SEvalZero 		rt_kprintf("Interrupt vec %d is not used!\n", vector);
97*10465441SEvalZero 	}
98*10465441SEvalZero 	else
99*10465441SEvalZero 		*(RP)(INTC_IMR) &= ~(1 << vector);
100*10465441SEvalZero }
101*10465441SEvalZero 
102*10465441SEvalZero 
103*10465441SEvalZero /**
104*10465441SEvalZero  * This function will install a interrupt service routine to a interrupt.
105*10465441SEvalZero  * @param vector the interrupt number
106*10465441SEvalZero  * @param new_handler the interrupt service routine to be installed
107*10465441SEvalZero  * @param old_handler the old interrupt service routine
108*10465441SEvalZero  */
rt_hw_interrupt_install(int vector,rt_isr_handler_t handler,void * param,const char * name)109*10465441SEvalZero rt_isr_handler_t rt_hw_interrupt_install(int vector, rt_isr_handler_t handler,
110*10465441SEvalZero                                         void *param, const char *name)
111*10465441SEvalZero {
112*10465441SEvalZero     rt_isr_handler_t old_handler = RT_NULL;
113*10465441SEvalZero 
114*10465441SEvalZero     if(vector < MAX_HANDLERS)
115*10465441SEvalZero     {
116*10465441SEvalZero         old_handler = isr_table[vector].handler;
117*10465441SEvalZero 
118*10465441SEvalZero         if (handler != RT_NULL)
119*10465441SEvalZero         {
120*10465441SEvalZero #ifdef RT_USING_INTERRUPT_INFO
121*10465441SEvalZero 		    rt_strncpy(isr_table[vector].name, name, RT_NAME_MAX);
122*10465441SEvalZero #endif /* RT_USING_INTERRUPT_INFO */
123*10465441SEvalZero             isr_table[vector].handler = handler;
124*10465441SEvalZero             isr_table[vector].param = param;
125*10465441SEvalZero         }
126*10465441SEvalZero     }
127*10465441SEvalZero 
128*10465441SEvalZero     return old_handler;
129*10465441SEvalZero }
130*10465441SEvalZero 
131*10465441SEvalZero /*@}*/
132