xref: /nrf52832-nimble/rt-thread/libcpu/arm/realview-a8-vmm/gic.h (revision 104654410c56c573564690304ae786df310c91fc)
1*10465441SEvalZero /*
2*10465441SEvalZero  * Copyright (c) 2006-2018, RT-Thread Development Team
3*10465441SEvalZero  *
4*10465441SEvalZero  * SPDX-License-Identifier: Apache-2.0
5*10465441SEvalZero  *
6*10465441SEvalZero  * Change Logs:
7*10465441SEvalZero  * Date           Author       Notes
8*10465441SEvalZero  * 2013-07-20     Bernard      first version
9*10465441SEvalZero  */
10*10465441SEvalZero 
11*10465441SEvalZero #ifndef __GIC_H__
12*10465441SEvalZero #define __GIC_H__
13*10465441SEvalZero 
14*10465441SEvalZero int arm_gic_dist_init(rt_uint32_t index, rt_uint32_t dist_base, int irq_start);
15*10465441SEvalZero int arm_gic_cpu_init(rt_uint32_t index, rt_uint32_t cpu_base);
16*10465441SEvalZero 
17*10465441SEvalZero void arm_gic_mask(rt_uint32_t index, int irq);
18*10465441SEvalZero void arm_gic_umask(rt_uint32_t index, int irq);
19*10465441SEvalZero void arm_gic_set_cpu(rt_uint32_t index, int irq, unsigned int cpumask);
20*10465441SEvalZero void arm_gic_set_group(rt_uint32_t index, int vector, int group);
21*10465441SEvalZero 
22*10465441SEvalZero int arm_gic_get_active_irq(rt_uint32_t index);
23*10465441SEvalZero void arm_gic_ack(rt_uint32_t index, int irq);
24*10465441SEvalZero 
25*10465441SEvalZero void arm_gic_trigger(rt_uint32_t index, int target_cpu, int irq);
26*10465441SEvalZero void arm_gic_clear_sgi(rt_uint32_t index, int target_cpu, int irq);
27*10465441SEvalZero 
28*10465441SEvalZero void arm_gic_dump_type(rt_uint32_t index);
29*10465441SEvalZero 
30*10465441SEvalZero #endif
31*10465441SEvalZero 
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