1*10465441SEvalZero /*
2*10465441SEvalZero * Copyright (c) 2006-2018, RT-Thread Development Team
3*10465441SEvalZero *
4*10465441SEvalZero * SPDX-License-Identifier: Apache-2.0
5*10465441SEvalZero *
6*10465441SEvalZero * Change Logs:
7*10465441SEvalZero * Date Author Notes
8*10465441SEvalZero * 2008-12-11 XuXinming first version
9*10465441SEvalZero * 2013-03-29 aozima Modify the interrupt interface implementations.
10*10465441SEvalZero */
11*10465441SEvalZero
12*10465441SEvalZero #include <rtthread.h>
13*10465441SEvalZero #include <rthw.h>
14*10465441SEvalZero #include "LPC24xx.h"
15*10465441SEvalZero
16*10465441SEvalZero #define MAX_HANDLERS 32
17*10465441SEvalZero
18*10465441SEvalZero /* exception and interrupt handler table */
19*10465441SEvalZero struct rt_irq_desc irq_desc[MAX_HANDLERS];
20*10465441SEvalZero
21*10465441SEvalZero extern rt_uint32_t rt_interrupt_nest;
22*10465441SEvalZero
23*10465441SEvalZero /* exception and interrupt handler table */
24*10465441SEvalZero rt_uint32_t rt_interrupt_from_thread, rt_interrupt_to_thread;
25*10465441SEvalZero rt_uint32_t rt_thread_switch_interrupt_flag;
26*10465441SEvalZero
27*10465441SEvalZero /**
28*10465441SEvalZero * @addtogroup LPC2478
29*10465441SEvalZero */
30*10465441SEvalZero /*@{*/
rt_hw_interrupt_handler(int vector,void * param)31*10465441SEvalZero void rt_hw_interrupt_handler(int vector, void *param)
32*10465441SEvalZero {
33*10465441SEvalZero rt_kprintf("Unhandled interrupt %d occured!!!\n", vector);
34*10465441SEvalZero }
35*10465441SEvalZero
rt_hw_interrupt_init(void)36*10465441SEvalZero void rt_hw_interrupt_init(void)
37*10465441SEvalZero {
38*10465441SEvalZero register int i;
39*10465441SEvalZero
40*10465441SEvalZero rt_uint32_t *vect_addr, *vect_cntl;
41*10465441SEvalZero
42*10465441SEvalZero /* initialize VIC*/
43*10465441SEvalZero VICIntEnClr = 0xffffffff;
44*10465441SEvalZero VICVectAddr = 0;
45*10465441SEvalZero VICIntSelect = 0;
46*10465441SEvalZero
47*10465441SEvalZero /* init exceptions table */
48*10465441SEvalZero rt_memset(irq_desc, 0x00, sizeof(irq_desc));
49*10465441SEvalZero for(i=0; i < MAX_HANDLERS; i++)
50*10465441SEvalZero {
51*10465441SEvalZero irq_desc[i].handler = rt_hw_interrupt_handler;
52*10465441SEvalZero
53*10465441SEvalZero vect_addr = (rt_uint32_t *)(VIC_BASE_ADDR + 0x100 + i*4);
54*10465441SEvalZero vect_cntl = (rt_uint32_t *)(VIC_BASE_ADDR + 0x200 + i*4);
55*10465441SEvalZero *vect_addr = (rt_uint32_t)&irq_desc[i];
56*10465441SEvalZero *vect_cntl = 0xF;
57*10465441SEvalZero }
58*10465441SEvalZero
59*10465441SEvalZero /* init interrupt nest, and context in thread sp */
60*10465441SEvalZero rt_interrupt_nest = 0;
61*10465441SEvalZero rt_interrupt_from_thread = 0;
62*10465441SEvalZero rt_interrupt_to_thread = 0;
63*10465441SEvalZero rt_thread_switch_interrupt_flag = 0;
64*10465441SEvalZero }
65*10465441SEvalZero
rt_hw_interrupt_mask(int vector)66*10465441SEvalZero void rt_hw_interrupt_mask(int vector)
67*10465441SEvalZero {
68*10465441SEvalZero VICIntEnClr = (1 << vector);
69*10465441SEvalZero }
70*10465441SEvalZero
rt_hw_interrupt_umask(int vector)71*10465441SEvalZero void rt_hw_interrupt_umask(int vector)
72*10465441SEvalZero {
73*10465441SEvalZero VICIntEnable = (1 << vector);
74*10465441SEvalZero }
75*10465441SEvalZero
76*10465441SEvalZero /**
77*10465441SEvalZero * This function will install a interrupt service routine to a interrupt.
78*10465441SEvalZero * @param vector the interrupt number
79*10465441SEvalZero * @param handler the interrupt service routine to be installed
80*10465441SEvalZero * @param param the parameter for interrupt service routine
81*10465441SEvalZero * @name unused.
82*10465441SEvalZero *
83*10465441SEvalZero * @return the old handler
84*10465441SEvalZero */
rt_hw_interrupt_install(int vector,rt_isr_handler_t handler,void * param,const char * name)85*10465441SEvalZero rt_isr_handler_t rt_hw_interrupt_install(int vector, rt_isr_handler_t handler,
86*10465441SEvalZero void *param, const char *name)
87*10465441SEvalZero {
88*10465441SEvalZero rt_isr_handler_t old_handler = RT_NULL;
89*10465441SEvalZero
90*10465441SEvalZero if(vector >= 0 && vector < MAX_HANDLERS)
91*10465441SEvalZero {
92*10465441SEvalZero old_handler = irq_desc[vector].handler;
93*10465441SEvalZero if (handler != RT_NULL)
94*10465441SEvalZero {
95*10465441SEvalZero irq_desc[vector].handler = handler;
96*10465441SEvalZero irq_desc[vector].param = param;
97*10465441SEvalZero }
98*10465441SEvalZero }
99*10465441SEvalZero
100*10465441SEvalZero return old_handler;
101*10465441SEvalZero }
102*10465441SEvalZero
103*10465441SEvalZero /*@}*/
104