1*10465441SEvalZero /* 2*10465441SEvalZero * Copyright (c) 2006-2018, RT-Thread Development Team 3*10465441SEvalZero * 4*10465441SEvalZero * SPDX-License-Identifier: Apache-2.0 5*10465441SEvalZero * 6*10465441SEvalZero * Change Logs: 7*10465441SEvalZero * Date Author Notes 8*10465441SEvalZero */ 9*10465441SEvalZero #ifndef __ARMV7_H__ 10*10465441SEvalZero #define __ARMV7_H__ 11*10465441SEvalZero 12*10465441SEvalZero #ifndef VFP_DATA_NR 13*10465441SEvalZero #define VFP_DATA_NR 32 14*10465441SEvalZero #endif 15*10465441SEvalZero 16*10465441SEvalZero /* the exception stack without VFP registers */ 17*10465441SEvalZero struct rt_hw_exp_stack 18*10465441SEvalZero { 19*10465441SEvalZero unsigned long r0; 20*10465441SEvalZero unsigned long r1; 21*10465441SEvalZero unsigned long r2; 22*10465441SEvalZero unsigned long r3; 23*10465441SEvalZero unsigned long r4; 24*10465441SEvalZero unsigned long r5; 25*10465441SEvalZero unsigned long r6; 26*10465441SEvalZero unsigned long r7; 27*10465441SEvalZero unsigned long r8; 28*10465441SEvalZero unsigned long r9; 29*10465441SEvalZero unsigned long r10; 30*10465441SEvalZero unsigned long fp; 31*10465441SEvalZero unsigned long ip; 32*10465441SEvalZero unsigned long sp; 33*10465441SEvalZero unsigned long lr; 34*10465441SEvalZero unsigned long pc; 35*10465441SEvalZero unsigned long cpsr; 36*10465441SEvalZero }; 37*10465441SEvalZero 38*10465441SEvalZero #define USERMODE 0x10 39*10465441SEvalZero #define FIQMODE 0x11 40*10465441SEvalZero #define IRQMODE 0x12 41*10465441SEvalZero #define SVCMODE 0x13 42*10465441SEvalZero #define MONITORMODE 0x16 43*10465441SEvalZero #define ABORTMODE 0x17 44*10465441SEvalZero #define HYPMODE 0x1b 45*10465441SEvalZero #define UNDEFMODE 0x1b 46*10465441SEvalZero #define MODEMASK 0x1f 47*10465441SEvalZero #define NOINT 0xc0 48*10465441SEvalZero 49*10465441SEvalZero #define T_Bit (1<<5) 50*10465441SEvalZero #define F_Bit (1<<6) 51*10465441SEvalZero #define I_Bit (1<<7) 52*10465441SEvalZero #define A_Bit (1<<8) 53*10465441SEvalZero #define E_Bit (1<<9) 54*10465441SEvalZero #define J_Bit (1<<24) 55*10465441SEvalZero 56*10465441SEvalZero #endif 57