1*10465441SEvalZero/* 2*10465441SEvalZero * Copyright (c) 2006-2018, RT-Thread Development Team 3*10465441SEvalZero * 4*10465441SEvalZero * SPDX-License-Identifier: Apache-2.0 5*10465441SEvalZero * 6*10465441SEvalZero * Change Logs: 7*10465441SEvalZero * Date Author Notes 8*10465441SEvalZero * 2011-08-14 weety copy from mini2440 9*10465441SEvalZero * 2015-04-15 ArdaFu convert from context_gcc.s 10*10465441SEvalZero */ 11*10465441SEvalZero 12*10465441SEvalZero#define NOINT 0xc0 13*10465441SEvalZero 14*10465441SEvalZero SECTION .text:CODE(6) 15*10465441SEvalZero/* 16*10465441SEvalZero * rt_base_t rt_hw_interrupt_disable(); 17*10465441SEvalZero */ 18*10465441SEvalZero PUBLIC rt_hw_interrupt_disable 19*10465441SEvalZerort_hw_interrupt_disable: 20*10465441SEvalZero MRS R0, CPSR 21*10465441SEvalZero ORR R1, R0, #NOINT 22*10465441SEvalZero MSR CPSR_C, R1 23*10465441SEvalZero MOV PC, LR 24*10465441SEvalZero 25*10465441SEvalZero/* 26*10465441SEvalZero * void rt_hw_interrupt_enable(rt_base_t level); 27*10465441SEvalZero */ 28*10465441SEvalZero PUBLIC rt_hw_interrupt_enable 29*10465441SEvalZerort_hw_interrupt_enable: 30*10465441SEvalZero MSR CPSR_CXSF, R0 31*10465441SEvalZero MOV PC, LR 32*10465441SEvalZero 33*10465441SEvalZero/* 34*10465441SEvalZero * void rt_hw_context_switch(rt_uint32 from, rt_uint32 to); 35*10465441SEvalZero * r0 --> from 36*10465441SEvalZero * r1 --> to 37*10465441SEvalZero */ 38*10465441SEvalZero PUBLIC rt_hw_context_switch 39*10465441SEvalZerort_hw_context_switch: 40*10465441SEvalZero STMFD SP!, {LR} ; push pc (lr should be pushed in place of PC) 41*10465441SEvalZero STMFD SP!, {R0-R12, LR} ; push lr & register file 42*10465441SEvalZero MRS R4, CPSR 43*10465441SEvalZero STMFD SP!, {R4} ; push cpsr 44*10465441SEvalZero STR SP, [R0] ; store sp in preempted tasks TCB 45*10465441SEvalZero LDR SP, [R1] ; get new task stack pointer 46*10465441SEvalZero LDMFD SP!, {R4} ; pop new task spsr 47*10465441SEvalZero MSR SPSR_cxsf, R4 48*10465441SEvalZero LDMFD SP!, {R0-R12, LR, PC}^ ; pop new task r0-r12, lr & pc 49*10465441SEvalZero 50*10465441SEvalZero/* 51*10465441SEvalZero * void rt_hw_context_switch_to(rt_uint32 to); 52*10465441SEvalZero * r0 --> to 53*10465441SEvalZero */ 54*10465441SEvalZero PUBLIC rt_hw_context_switch_to 55*10465441SEvalZerort_hw_context_switch_to: 56*10465441SEvalZero LDR SP, [R0] ; get new task stack pointer 57*10465441SEvalZero LDMFD SP!, {R4} ; pop new task spsr 58*10465441SEvalZero MSR SPSR_cxsf, R4 59*10465441SEvalZero LDMFD SP!, {R0-R12, LR, PC}^ ; pop new task r0-r12, lr & pc 60*10465441SEvalZero 61*10465441SEvalZero/* 62*10465441SEvalZero * void rt_hw_context_switch_interrupt(rt_uint32 from, rt_uint32 to); 63*10465441SEvalZero */ 64*10465441SEvalZero IMPORT rt_thread_switch_interrupt_flag 65*10465441SEvalZero IMPORT rt_interrupt_from_thread 66*10465441SEvalZero IMPORT rt_interrupt_to_thread 67*10465441SEvalZero PUBLIC rt_hw_context_switch_interrupt 68*10465441SEvalZerort_hw_context_switch_interrupt: 69*10465441SEvalZero LDR R2, =rt_thread_switch_interrupt_flag 70*10465441SEvalZero LDR R3, [R2] 71*10465441SEvalZero CMP R3, #1 72*10465441SEvalZero BEQ _reswitch 73*10465441SEvalZero MOV R3, #1 ; set flag to 1 74*10465441SEvalZero STR R3, [R2] 75*10465441SEvalZero LDR R2, =rt_interrupt_from_thread ; set rt_interrupt_from_thread 76*10465441SEvalZero STR R0, [R2] 77*10465441SEvalZero_reswitch: 78*10465441SEvalZero LDR R2, =rt_interrupt_to_thread ; set rt_interrupt_to_thread 79*10465441SEvalZero STR R1, [R2] 80*10465441SEvalZero MOV PC, LR 81*10465441SEvalZero END 82*10465441SEvalZero 83