xref: /nrf52832-nimble/rt-thread/include/rthw.h (revision 104654410c56c573564690304ae786df310c91fc)
1*10465441SEvalZero /*
2*10465441SEvalZero  * Copyright (c) 2006-2018, RT-Thread Development Team
3*10465441SEvalZero  *
4*10465441SEvalZero  * SPDX-License-Identifier: Apache-2.0
5*10465441SEvalZero  *
6*10465441SEvalZero  * Change Logs:
7*10465441SEvalZero  * Date           Author       Notes
8*10465441SEvalZero  * 2006-03-18     Bernard      the first version
9*10465441SEvalZero  * 2006-04-25     Bernard      add rt_hw_context_switch_interrupt declaration
10*10465441SEvalZero  * 2006-09-24     Bernard      add rt_hw_context_switch_to declaration
11*10465441SEvalZero  * 2012-12-29     Bernard      add rt_hw_exception_install declaration
12*10465441SEvalZero  * 2017-10-17     Hichard      add some micros
13*10465441SEvalZero  * 2018-11-17     Jesven       add rt_hw_spinlock_t
14*10465441SEvalZero  *                             add smp support
15*10465441SEvalZero  */
16*10465441SEvalZero 
17*10465441SEvalZero #ifndef __RT_HW_H__
18*10465441SEvalZero #define __RT_HW_H__
19*10465441SEvalZero 
20*10465441SEvalZero #include <rtthread.h>
21*10465441SEvalZero 
22*10465441SEvalZero #ifdef __cplusplus
23*10465441SEvalZero extern "C" {
24*10465441SEvalZero #endif
25*10465441SEvalZero 
26*10465441SEvalZero /*
27*10465441SEvalZero  * Some macros define
28*10465441SEvalZero  */
29*10465441SEvalZero #ifndef HWREG32
30*10465441SEvalZero #define HWREG32(x)          (*((volatile rt_uint32_t *)(x)))
31*10465441SEvalZero #endif
32*10465441SEvalZero #ifndef HWREG16
33*10465441SEvalZero #define HWREG16(x)          (*((volatile rt_uint16_t *)(x)))
34*10465441SEvalZero #endif
35*10465441SEvalZero #ifndef HWREG8
36*10465441SEvalZero #define HWREG8(x)           (*((volatile rt_uint8_t *)(x)))
37*10465441SEvalZero #endif
38*10465441SEvalZero 
39*10465441SEvalZero #ifndef RT_CPU_CACHE_LINE_SZ
40*10465441SEvalZero #define RT_CPU_CACHE_LINE_SZ	32
41*10465441SEvalZero #endif
42*10465441SEvalZero 
43*10465441SEvalZero enum RT_HW_CACHE_OPS
44*10465441SEvalZero {
45*10465441SEvalZero     RT_HW_CACHE_FLUSH      = 0x01,
46*10465441SEvalZero     RT_HW_CACHE_INVALIDATE = 0x02,
47*10465441SEvalZero };
48*10465441SEvalZero 
49*10465441SEvalZero /*
50*10465441SEvalZero  * CPU interfaces
51*10465441SEvalZero  */
52*10465441SEvalZero void rt_hw_cpu_icache_enable(void);
53*10465441SEvalZero void rt_hw_cpu_icache_disable(void);
54*10465441SEvalZero rt_base_t rt_hw_cpu_icache_status(void);
55*10465441SEvalZero void rt_hw_cpu_icache_ops(int ops, void* addr, int size);
56*10465441SEvalZero 
57*10465441SEvalZero void rt_hw_cpu_dcache_enable(void);
58*10465441SEvalZero void rt_hw_cpu_dcache_disable(void);
59*10465441SEvalZero rt_base_t rt_hw_cpu_dcache_status(void);
60*10465441SEvalZero void rt_hw_cpu_dcache_ops(int ops, void* addr, int size);
61*10465441SEvalZero 
62*10465441SEvalZero void rt_hw_cpu_reset(void);
63*10465441SEvalZero void rt_hw_cpu_shutdown(void);
64*10465441SEvalZero 
65*10465441SEvalZero rt_uint8_t *rt_hw_stack_init(void       *entry,
66*10465441SEvalZero                              void       *parameter,
67*10465441SEvalZero                              rt_uint8_t *stack_addr,
68*10465441SEvalZero                              void       *exit);
69*10465441SEvalZero 
70*10465441SEvalZero /*
71*10465441SEvalZero  * Interrupt handler definition
72*10465441SEvalZero  */
73*10465441SEvalZero typedef void (*rt_isr_handler_t)(int vector, void *param);
74*10465441SEvalZero 
75*10465441SEvalZero struct rt_irq_desc
76*10465441SEvalZero {
77*10465441SEvalZero     rt_isr_handler_t handler;
78*10465441SEvalZero     void            *param;
79*10465441SEvalZero 
80*10465441SEvalZero #ifdef RT_USING_INTERRUPT_INFO
81*10465441SEvalZero     char             name[RT_NAME_MAX];
82*10465441SEvalZero     rt_uint32_t      counter;
83*10465441SEvalZero #endif
84*10465441SEvalZero };
85*10465441SEvalZero 
86*10465441SEvalZero /*
87*10465441SEvalZero  * Interrupt interfaces
88*10465441SEvalZero  */
89*10465441SEvalZero void rt_hw_interrupt_init(void);
90*10465441SEvalZero void rt_hw_interrupt_mask(int vector);
91*10465441SEvalZero void rt_hw_interrupt_umask(int vector);
92*10465441SEvalZero rt_isr_handler_t rt_hw_interrupt_install(int              vector,
93*10465441SEvalZero                                          rt_isr_handler_t handler,
94*10465441SEvalZero                                          void            *param,
95*10465441SEvalZero                                          const char      *name);
96*10465441SEvalZero 
97*10465441SEvalZero #ifdef RT_USING_SMP
98*10465441SEvalZero rt_base_t rt_hw_local_irq_disable();
99*10465441SEvalZero void rt_hw_local_irq_enable(rt_base_t level);
100*10465441SEvalZero 
101*10465441SEvalZero #define rt_hw_interrupt_disable rt_cpus_lock
102*10465441SEvalZero #define rt_hw_interrupt_enable rt_cpus_unlock
103*10465441SEvalZero 
104*10465441SEvalZero #else
105*10465441SEvalZero rt_base_t rt_hw_interrupt_disable(void);
106*10465441SEvalZero void rt_hw_interrupt_enable(rt_base_t level);
107*10465441SEvalZero #endif /*RT_USING_SMP*/
108*10465441SEvalZero 
109*10465441SEvalZero /*
110*10465441SEvalZero  * Context interfaces
111*10465441SEvalZero  */
112*10465441SEvalZero #ifdef RT_USING_SMP
113*10465441SEvalZero void rt_hw_context_switch(rt_ubase_t from, rt_ubase_t to, struct rt_thread *to_thread);
114*10465441SEvalZero void rt_hw_context_switch_to(rt_ubase_t to, struct rt_thread *to_thread);
115*10465441SEvalZero void rt_hw_context_switch_interrupt(void *context, rt_ubase_t from, rt_ubase_t to, struct rt_thread *to_thread);
116*10465441SEvalZero #else
117*10465441SEvalZero void rt_hw_context_switch(rt_ubase_t from, rt_ubase_t to);
118*10465441SEvalZero void rt_hw_context_switch_to(rt_ubase_t to);
119*10465441SEvalZero void rt_hw_context_switch_interrupt(rt_ubase_t from, rt_ubase_t to);
120*10465441SEvalZero #endif /*RT_USING_SMP*/
121*10465441SEvalZero 
122*10465441SEvalZero void rt_hw_console_output(const char *str);
123*10465441SEvalZero 
124*10465441SEvalZero void rt_hw_backtrace(rt_uint32_t *fp, rt_ubase_t thread_entry);
125*10465441SEvalZero void rt_hw_show_memory(rt_uint32_t addr, rt_size_t size);
126*10465441SEvalZero 
127*10465441SEvalZero /*
128*10465441SEvalZero  * Exception interfaces
129*10465441SEvalZero  */
130*10465441SEvalZero void rt_hw_exception_install(rt_err_t (*exception_handle)(void *context));
131*10465441SEvalZero 
132*10465441SEvalZero /*
133*10465441SEvalZero  * delay interfaces
134*10465441SEvalZero  */
135*10465441SEvalZero void rt_hw_us_delay(rt_uint32_t us);
136*10465441SEvalZero 
137*10465441SEvalZero #ifdef RT_USING_SMP
138*10465441SEvalZero typedef union {
139*10465441SEvalZero     unsigned long slock;
140*10465441SEvalZero     struct __arch_tickets {
141*10465441SEvalZero         unsigned short owner;
142*10465441SEvalZero         unsigned short next;
143*10465441SEvalZero     } tickets;
144*10465441SEvalZero } rt_hw_spinlock_t;
145*10465441SEvalZero 
146*10465441SEvalZero void rt_hw_spin_lock(rt_hw_spinlock_t *lock);
147*10465441SEvalZero void rt_hw_spin_unlock(rt_hw_spinlock_t *lock);
148*10465441SEvalZero 
149*10465441SEvalZero int rt_hw_cpu_id(void);
150*10465441SEvalZero 
151*10465441SEvalZero extern rt_hw_spinlock_t _cpus_lock;
152*10465441SEvalZero extern rt_hw_spinlock_t _rt_critical_lock;
153*10465441SEvalZero 
154*10465441SEvalZero #define __RT_HW_SPIN_LOCK_INITIALIZER(lockname) {0}
155*10465441SEvalZero 
156*10465441SEvalZero #define __RT_HW_SPIN_LOCK_UNLOCKED(lockname) \
157*10465441SEvalZero  (struct rt_hw_spinlock ) __RT_HW_SPIN_LOCK_INITIALIZER(lockname)
158*10465441SEvalZero 
159*10465441SEvalZero #define RT_DEFINE_SPINLOCK(x)  struct rt_hw_spinlock x = __RT_HW_SPIN_LOCK_UNLOCKED(x)
160*10465441SEvalZero 
161*10465441SEvalZero /**
162*10465441SEvalZero  *  ipi function
163*10465441SEvalZero  */
164*10465441SEvalZero void rt_hw_ipi_send(int ipi_vector, unsigned int cpu_mask);
165*10465441SEvalZero 
166*10465441SEvalZero /**
167*10465441SEvalZero  * boot secondary cpu
168*10465441SEvalZero  */
169*10465441SEvalZero void rt_hw_secondary_cpu_up(void);
170*10465441SEvalZero 
171*10465441SEvalZero /**
172*10465441SEvalZero  * secondary cpu idle function
173*10465441SEvalZero  */
174*10465441SEvalZero void rt_hw_secondary_cpu_idle_exec(void);
175*10465441SEvalZero 
176*10465441SEvalZero #endif
177*10465441SEvalZero 
178*10465441SEvalZero #ifdef __cplusplus
179*10465441SEvalZero }
180*10465441SEvalZero #endif
181*10465441SEvalZero 
182*10465441SEvalZero #endif
183