1*10465441SEvalZero /*
2*10465441SEvalZero * FreeModbus Libary: A portable Modbus implementation for Modbus ASCII/RTU.
3*10465441SEvalZero * Copyright (C) 2013 Armink <[email protected]>
4*10465441SEvalZero * All rights reserved.
5*10465441SEvalZero *
6*10465441SEvalZero * Redistribution and use in source and binary forms, with or without
7*10465441SEvalZero * modification, are permitted provided that the following conditions
8*10465441SEvalZero * are met:
9*10465441SEvalZero * 1. Redistributions of source code must retain the above copyright
10*10465441SEvalZero * notice, this list of conditions and the following disclaimer.
11*10465441SEvalZero * 2. Redistributions in binary form must reproduce the above copyright
12*10465441SEvalZero * notice, this list of conditions and the following disclaimer in the
13*10465441SEvalZero * documentation and/or other materials provided with the distribution.
14*10465441SEvalZero * 3. The name of the author may not be used to endorse or promote products
15*10465441SEvalZero * derived from this software without specific prior written permission.
16*10465441SEvalZero *
17*10465441SEvalZero * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18*10465441SEvalZero * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19*10465441SEvalZero * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20*10465441SEvalZero * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21*10465441SEvalZero * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22*10465441SEvalZero * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23*10465441SEvalZero * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24*10465441SEvalZero * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25*10465441SEvalZero * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26*10465441SEvalZero * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27*10465441SEvalZero *
28*10465441SEvalZero * File: $Id: mbfuncholding_m.c,v 1.60 2013/09/02 14:13:40 Armink Add Master Functions Exp $
29*10465441SEvalZero */
30*10465441SEvalZero
31*10465441SEvalZero /* ----------------------- System includes ----------------------------------*/
32*10465441SEvalZero #include "stdlib.h"
33*10465441SEvalZero #include "string.h"
34*10465441SEvalZero
35*10465441SEvalZero /* ----------------------- Platform includes --------------------------------*/
36*10465441SEvalZero #include "port.h"
37*10465441SEvalZero
38*10465441SEvalZero /* ----------------------- Modbus includes ----------------------------------*/
39*10465441SEvalZero #include "mb.h"
40*10465441SEvalZero #include "mb_m.h"
41*10465441SEvalZero #include "mbframe.h"
42*10465441SEvalZero #include "mbproto.h"
43*10465441SEvalZero #include "mbconfig.h"
44*10465441SEvalZero
45*10465441SEvalZero /* ----------------------- Defines ------------------------------------------*/
46*10465441SEvalZero #define MB_PDU_REQ_READ_ADDR_OFF ( MB_PDU_DATA_OFF + 0 )
47*10465441SEvalZero #define MB_PDU_REQ_READ_REGCNT_OFF ( MB_PDU_DATA_OFF + 2 )
48*10465441SEvalZero #define MB_PDU_REQ_READ_SIZE ( 4 )
49*10465441SEvalZero #define MB_PDU_FUNC_READ_REGCNT_MAX ( 0x007D )
50*10465441SEvalZero #define MB_PDU_FUNC_READ_BYTECNT_OFF ( MB_PDU_DATA_OFF + 0 )
51*10465441SEvalZero #define MB_PDU_FUNC_READ_VALUES_OFF ( MB_PDU_DATA_OFF + 1 )
52*10465441SEvalZero #define MB_PDU_FUNC_READ_SIZE_MIN ( 1 )
53*10465441SEvalZero
54*10465441SEvalZero #define MB_PDU_REQ_WRITE_ADDR_OFF ( MB_PDU_DATA_OFF + 0)
55*10465441SEvalZero #define MB_PDU_REQ_WRITE_VALUE_OFF ( MB_PDU_DATA_OFF + 2 )
56*10465441SEvalZero #define MB_PDU_REQ_WRITE_SIZE ( 4 )
57*10465441SEvalZero #define MB_PDU_FUNC_WRITE_ADDR_OFF ( MB_PDU_DATA_OFF + 0)
58*10465441SEvalZero #define MB_PDU_FUNC_WRITE_VALUE_OFF ( MB_PDU_DATA_OFF + 2 )
59*10465441SEvalZero #define MB_PDU_FUNC_WRITE_SIZE ( 4 )
60*10465441SEvalZero
61*10465441SEvalZero #define MB_PDU_REQ_WRITE_MUL_ADDR_OFF ( MB_PDU_DATA_OFF + 0 )
62*10465441SEvalZero #define MB_PDU_REQ_WRITE_MUL_REGCNT_OFF ( MB_PDU_DATA_OFF + 2 )
63*10465441SEvalZero #define MB_PDU_REQ_WRITE_MUL_BYTECNT_OFF ( MB_PDU_DATA_OFF + 4 )
64*10465441SEvalZero #define MB_PDU_REQ_WRITE_MUL_VALUES_OFF ( MB_PDU_DATA_OFF + 5 )
65*10465441SEvalZero #define MB_PDU_REQ_WRITE_MUL_SIZE_MIN ( 5 )
66*10465441SEvalZero #define MB_PDU_REQ_WRITE_MUL_REGCNT_MAX ( 0x0078 )
67*10465441SEvalZero #define MB_PDU_FUNC_WRITE_MUL_ADDR_OFF ( MB_PDU_DATA_OFF + 0 )
68*10465441SEvalZero #define MB_PDU_FUNC_WRITE_MUL_REGCNT_OFF ( MB_PDU_DATA_OFF + 2 )
69*10465441SEvalZero #define MB_PDU_FUNC_WRITE_MUL_SIZE ( 4 )
70*10465441SEvalZero
71*10465441SEvalZero #define MB_PDU_REQ_READWRITE_READ_ADDR_OFF ( MB_PDU_DATA_OFF + 0 )
72*10465441SEvalZero #define MB_PDU_REQ_READWRITE_READ_REGCNT_OFF ( MB_PDU_DATA_OFF + 2 )
73*10465441SEvalZero #define MB_PDU_REQ_READWRITE_WRITE_ADDR_OFF ( MB_PDU_DATA_OFF + 4 )
74*10465441SEvalZero #define MB_PDU_REQ_READWRITE_WRITE_REGCNT_OFF ( MB_PDU_DATA_OFF + 6 )
75*10465441SEvalZero #define MB_PDU_REQ_READWRITE_WRITE_BYTECNT_OFF ( MB_PDU_DATA_OFF + 8 )
76*10465441SEvalZero #define MB_PDU_REQ_READWRITE_WRITE_VALUES_OFF ( MB_PDU_DATA_OFF + 9 )
77*10465441SEvalZero #define MB_PDU_REQ_READWRITE_SIZE_MIN ( 9 )
78*10465441SEvalZero #define MB_PDU_FUNC_READWRITE_READ_BYTECNT_OFF ( MB_PDU_DATA_OFF + 0 )
79*10465441SEvalZero #define MB_PDU_FUNC_READWRITE_READ_VALUES_OFF ( MB_PDU_DATA_OFF + 1 )
80*10465441SEvalZero #define MB_PDU_FUNC_READWRITE_SIZE_MIN ( 1 )
81*10465441SEvalZero
82*10465441SEvalZero /* ----------------------- Static functions ---------------------------------*/
83*10465441SEvalZero eMBException prveMBError2Exception( eMBErrorCode eErrorCode );
84*10465441SEvalZero
85*10465441SEvalZero /* ----------------------- Start implementation -----------------------------*/
86*10465441SEvalZero #if MB_MASTER_RTU_ENABLED > 0 || MB_MASTER_ASCII_ENABLED > 0
87*10465441SEvalZero #if MB_FUNC_WRITE_HOLDING_ENABLED > 0
88*10465441SEvalZero
89*10465441SEvalZero /**
90*10465441SEvalZero * This function will request write holding register.
91*10465441SEvalZero *
92*10465441SEvalZero * @param ucSndAddr salve address
93*10465441SEvalZero * @param usRegAddr register start address
94*10465441SEvalZero * @param usRegData register data to be written
95*10465441SEvalZero * @param lTimeOut timeout (-1 will waiting forever)
96*10465441SEvalZero *
97*10465441SEvalZero * @return error code
98*10465441SEvalZero */
99*10465441SEvalZero eMBMasterReqErrCode
eMBMasterReqWriteHoldingRegister(UCHAR ucSndAddr,USHORT usRegAddr,USHORT usRegData,LONG lTimeOut)100*10465441SEvalZero eMBMasterReqWriteHoldingRegister( UCHAR ucSndAddr, USHORT usRegAddr, USHORT usRegData, LONG lTimeOut )
101*10465441SEvalZero {
102*10465441SEvalZero UCHAR *ucMBFrame;
103*10465441SEvalZero eMBMasterReqErrCode eErrStatus = MB_MRE_NO_ERR;
104*10465441SEvalZero
105*10465441SEvalZero if ( ucSndAddr > MB_MASTER_TOTAL_SLAVE_NUM ) eErrStatus = MB_MRE_ILL_ARG;
106*10465441SEvalZero else if ( xMBMasterRunResTake( lTimeOut ) == FALSE ) eErrStatus = MB_MRE_MASTER_BUSY;
107*10465441SEvalZero else
108*10465441SEvalZero {
109*10465441SEvalZero vMBMasterGetPDUSndBuf(&ucMBFrame);
110*10465441SEvalZero vMBMasterSetDestAddress(ucSndAddr);
111*10465441SEvalZero ucMBFrame[MB_PDU_FUNC_OFF] = MB_FUNC_WRITE_REGISTER;
112*10465441SEvalZero ucMBFrame[MB_PDU_REQ_WRITE_ADDR_OFF] = usRegAddr >> 8;
113*10465441SEvalZero ucMBFrame[MB_PDU_REQ_WRITE_ADDR_OFF + 1] = usRegAddr;
114*10465441SEvalZero ucMBFrame[MB_PDU_REQ_WRITE_VALUE_OFF] = usRegData >> 8;
115*10465441SEvalZero ucMBFrame[MB_PDU_REQ_WRITE_VALUE_OFF + 1] = usRegData ;
116*10465441SEvalZero vMBMasterSetPDUSndLength( MB_PDU_SIZE_MIN + MB_PDU_REQ_WRITE_SIZE );
117*10465441SEvalZero ( void ) xMBMasterPortEventPost( EV_MASTER_FRAME_SENT );
118*10465441SEvalZero eErrStatus = eMBMasterWaitRequestFinish( );
119*10465441SEvalZero }
120*10465441SEvalZero return eErrStatus;
121*10465441SEvalZero }
122*10465441SEvalZero
123*10465441SEvalZero eMBException
eMBMasterFuncWriteHoldingRegister(UCHAR * pucFrame,USHORT * usLen)124*10465441SEvalZero eMBMasterFuncWriteHoldingRegister( UCHAR * pucFrame, USHORT * usLen )
125*10465441SEvalZero {
126*10465441SEvalZero USHORT usRegAddress;
127*10465441SEvalZero eMBException eStatus = MB_EX_NONE;
128*10465441SEvalZero eMBErrorCode eRegStatus;
129*10465441SEvalZero
130*10465441SEvalZero if( *usLen == ( MB_PDU_SIZE_MIN + MB_PDU_FUNC_WRITE_SIZE ) )
131*10465441SEvalZero {
132*10465441SEvalZero usRegAddress = ( USHORT )( pucFrame[MB_PDU_FUNC_WRITE_ADDR_OFF] << 8 );
133*10465441SEvalZero usRegAddress |= ( USHORT )( pucFrame[MB_PDU_FUNC_WRITE_ADDR_OFF + 1] );
134*10465441SEvalZero usRegAddress++;
135*10465441SEvalZero
136*10465441SEvalZero /* Make callback to update the value. */
137*10465441SEvalZero eRegStatus = eMBMasterRegHoldingCB( &pucFrame[MB_PDU_FUNC_WRITE_VALUE_OFF],
138*10465441SEvalZero usRegAddress, 1, MB_REG_WRITE );
139*10465441SEvalZero
140*10465441SEvalZero /* If an error occured convert it into a Modbus exception. */
141*10465441SEvalZero if( eRegStatus != MB_ENOERR )
142*10465441SEvalZero {
143*10465441SEvalZero eStatus = prveMBError2Exception( eRegStatus );
144*10465441SEvalZero }
145*10465441SEvalZero }
146*10465441SEvalZero else
147*10465441SEvalZero {
148*10465441SEvalZero /* Can't be a valid request because the length is incorrect. */
149*10465441SEvalZero eStatus = MB_EX_ILLEGAL_DATA_VALUE;
150*10465441SEvalZero }
151*10465441SEvalZero return eStatus;
152*10465441SEvalZero }
153*10465441SEvalZero #endif
154*10465441SEvalZero
155*10465441SEvalZero #if MB_FUNC_WRITE_MULTIPLE_HOLDING_ENABLED > 0
156*10465441SEvalZero
157*10465441SEvalZero /**
158*10465441SEvalZero * This function will request write multiple holding register.
159*10465441SEvalZero *
160*10465441SEvalZero * @param ucSndAddr salve address
161*10465441SEvalZero * @param usRegAddr register start address
162*10465441SEvalZero * @param usNRegs register total number
163*10465441SEvalZero * @param pusDataBuffer data to be written
164*10465441SEvalZero * @param lTimeOut timeout (-1 will waiting forever)
165*10465441SEvalZero *
166*10465441SEvalZero * @return error code
167*10465441SEvalZero */
168*10465441SEvalZero eMBMasterReqErrCode
eMBMasterReqWriteMultipleHoldingRegister(UCHAR ucSndAddr,USHORT usRegAddr,USHORT usNRegs,USHORT * pusDataBuffer,LONG lTimeOut)169*10465441SEvalZero eMBMasterReqWriteMultipleHoldingRegister( UCHAR ucSndAddr,
170*10465441SEvalZero USHORT usRegAddr, USHORT usNRegs, USHORT * pusDataBuffer, LONG lTimeOut )
171*10465441SEvalZero {
172*10465441SEvalZero UCHAR *ucMBFrame;
173*10465441SEvalZero USHORT usRegIndex = 0;
174*10465441SEvalZero eMBMasterReqErrCode eErrStatus = MB_MRE_NO_ERR;
175*10465441SEvalZero
176*10465441SEvalZero if ( ucSndAddr > MB_MASTER_TOTAL_SLAVE_NUM ) eErrStatus = MB_MRE_ILL_ARG;
177*10465441SEvalZero else if ( xMBMasterRunResTake( lTimeOut ) == FALSE ) eErrStatus = MB_MRE_MASTER_BUSY;
178*10465441SEvalZero else
179*10465441SEvalZero {
180*10465441SEvalZero vMBMasterGetPDUSndBuf(&ucMBFrame);
181*10465441SEvalZero vMBMasterSetDestAddress(ucSndAddr);
182*10465441SEvalZero ucMBFrame[MB_PDU_FUNC_OFF] = MB_FUNC_WRITE_MULTIPLE_REGISTERS;
183*10465441SEvalZero ucMBFrame[MB_PDU_REQ_WRITE_MUL_ADDR_OFF] = usRegAddr >> 8;
184*10465441SEvalZero ucMBFrame[MB_PDU_REQ_WRITE_MUL_ADDR_OFF + 1] = usRegAddr;
185*10465441SEvalZero ucMBFrame[MB_PDU_REQ_WRITE_MUL_REGCNT_OFF] = usNRegs >> 8;
186*10465441SEvalZero ucMBFrame[MB_PDU_REQ_WRITE_MUL_REGCNT_OFF + 1] = usNRegs ;
187*10465441SEvalZero ucMBFrame[MB_PDU_REQ_WRITE_MUL_BYTECNT_OFF] = usNRegs * 2;
188*10465441SEvalZero ucMBFrame += MB_PDU_REQ_WRITE_MUL_VALUES_OFF;
189*10465441SEvalZero while( usNRegs > usRegIndex)
190*10465441SEvalZero {
191*10465441SEvalZero *ucMBFrame++ = pusDataBuffer[usRegIndex] >> 8;
192*10465441SEvalZero *ucMBFrame++ = pusDataBuffer[usRegIndex++] ;
193*10465441SEvalZero }
194*10465441SEvalZero vMBMasterSetPDUSndLength( MB_PDU_SIZE_MIN + MB_PDU_REQ_WRITE_MUL_SIZE_MIN + 2*usNRegs );
195*10465441SEvalZero ( void ) xMBMasterPortEventPost( EV_MASTER_FRAME_SENT );
196*10465441SEvalZero eErrStatus = eMBMasterWaitRequestFinish( );
197*10465441SEvalZero }
198*10465441SEvalZero return eErrStatus;
199*10465441SEvalZero }
200*10465441SEvalZero
201*10465441SEvalZero eMBException
eMBMasterFuncWriteMultipleHoldingRegister(UCHAR * pucFrame,USHORT * usLen)202*10465441SEvalZero eMBMasterFuncWriteMultipleHoldingRegister( UCHAR * pucFrame, USHORT * usLen )
203*10465441SEvalZero {
204*10465441SEvalZero UCHAR *ucMBFrame;
205*10465441SEvalZero USHORT usRegAddress;
206*10465441SEvalZero USHORT usRegCount;
207*10465441SEvalZero UCHAR ucRegByteCount;
208*10465441SEvalZero
209*10465441SEvalZero eMBException eStatus = MB_EX_NONE;
210*10465441SEvalZero eMBErrorCode eRegStatus;
211*10465441SEvalZero
212*10465441SEvalZero /* If this request is broadcast, the *usLen is not need check. */
213*10465441SEvalZero if( ( *usLen == MB_PDU_SIZE_MIN + MB_PDU_FUNC_WRITE_MUL_SIZE ) || xMBMasterRequestIsBroadcast() )
214*10465441SEvalZero {
215*10465441SEvalZero vMBMasterGetPDUSndBuf(&ucMBFrame);
216*10465441SEvalZero usRegAddress = ( USHORT )( ucMBFrame[MB_PDU_REQ_WRITE_MUL_ADDR_OFF] << 8 );
217*10465441SEvalZero usRegAddress |= ( USHORT )( ucMBFrame[MB_PDU_REQ_WRITE_MUL_ADDR_OFF + 1] );
218*10465441SEvalZero usRegAddress++;
219*10465441SEvalZero
220*10465441SEvalZero usRegCount = ( USHORT )( ucMBFrame[MB_PDU_REQ_WRITE_MUL_REGCNT_OFF] << 8 );
221*10465441SEvalZero usRegCount |= ( USHORT )( ucMBFrame[MB_PDU_REQ_WRITE_MUL_REGCNT_OFF + 1] );
222*10465441SEvalZero
223*10465441SEvalZero ucRegByteCount = ucMBFrame[MB_PDU_REQ_WRITE_MUL_BYTECNT_OFF];
224*10465441SEvalZero
225*10465441SEvalZero if( ucRegByteCount == 2 * usRegCount )
226*10465441SEvalZero {
227*10465441SEvalZero /* Make callback to update the register values. */
228*10465441SEvalZero eRegStatus =
229*10465441SEvalZero eMBMasterRegHoldingCB( &ucMBFrame[MB_PDU_REQ_WRITE_MUL_VALUES_OFF],
230*10465441SEvalZero usRegAddress, usRegCount, MB_REG_WRITE );
231*10465441SEvalZero
232*10465441SEvalZero /* If an error occured convert it into a Modbus exception. */
233*10465441SEvalZero if( eRegStatus != MB_ENOERR )
234*10465441SEvalZero {
235*10465441SEvalZero eStatus = prveMBError2Exception( eRegStatus );
236*10465441SEvalZero }
237*10465441SEvalZero }
238*10465441SEvalZero else
239*10465441SEvalZero {
240*10465441SEvalZero eStatus = MB_EX_ILLEGAL_DATA_VALUE;
241*10465441SEvalZero }
242*10465441SEvalZero }
243*10465441SEvalZero else
244*10465441SEvalZero {
245*10465441SEvalZero /* Can't be a valid request because the length is incorrect. */
246*10465441SEvalZero eStatus = MB_EX_ILLEGAL_DATA_VALUE;
247*10465441SEvalZero }
248*10465441SEvalZero return eStatus;
249*10465441SEvalZero }
250*10465441SEvalZero #endif
251*10465441SEvalZero
252*10465441SEvalZero #if MB_FUNC_READ_HOLDING_ENABLED > 0
253*10465441SEvalZero
254*10465441SEvalZero /**
255*10465441SEvalZero * This function will request read holding register.
256*10465441SEvalZero *
257*10465441SEvalZero * @param ucSndAddr salve address
258*10465441SEvalZero * @param usRegAddr register start address
259*10465441SEvalZero * @param usNRegs register total number
260*10465441SEvalZero * @param lTimeOut timeout (-1 will waiting forever)
261*10465441SEvalZero *
262*10465441SEvalZero * @return error code
263*10465441SEvalZero */
264*10465441SEvalZero eMBMasterReqErrCode
eMBMasterReqReadHoldingRegister(UCHAR ucSndAddr,USHORT usRegAddr,USHORT usNRegs,LONG lTimeOut)265*10465441SEvalZero eMBMasterReqReadHoldingRegister( UCHAR ucSndAddr, USHORT usRegAddr, USHORT usNRegs, LONG lTimeOut )
266*10465441SEvalZero {
267*10465441SEvalZero UCHAR *ucMBFrame;
268*10465441SEvalZero eMBMasterReqErrCode eErrStatus = MB_MRE_NO_ERR;
269*10465441SEvalZero
270*10465441SEvalZero if ( ucSndAddr > MB_MASTER_TOTAL_SLAVE_NUM ) eErrStatus = MB_MRE_ILL_ARG;
271*10465441SEvalZero else if ( xMBMasterRunResTake( lTimeOut ) == FALSE ) eErrStatus = MB_MRE_MASTER_BUSY;
272*10465441SEvalZero else
273*10465441SEvalZero {
274*10465441SEvalZero vMBMasterGetPDUSndBuf(&ucMBFrame);
275*10465441SEvalZero vMBMasterSetDestAddress(ucSndAddr);
276*10465441SEvalZero ucMBFrame[MB_PDU_FUNC_OFF] = MB_FUNC_READ_HOLDING_REGISTER;
277*10465441SEvalZero ucMBFrame[MB_PDU_REQ_READ_ADDR_OFF] = usRegAddr >> 8;
278*10465441SEvalZero ucMBFrame[MB_PDU_REQ_READ_ADDR_OFF + 1] = usRegAddr;
279*10465441SEvalZero ucMBFrame[MB_PDU_REQ_READ_REGCNT_OFF] = usNRegs >> 8;
280*10465441SEvalZero ucMBFrame[MB_PDU_REQ_READ_REGCNT_OFF + 1] = usNRegs;
281*10465441SEvalZero vMBMasterSetPDUSndLength( MB_PDU_SIZE_MIN + MB_PDU_REQ_READ_SIZE );
282*10465441SEvalZero ( void ) xMBMasterPortEventPost( EV_MASTER_FRAME_SENT );
283*10465441SEvalZero eErrStatus = eMBMasterWaitRequestFinish( );
284*10465441SEvalZero }
285*10465441SEvalZero return eErrStatus;
286*10465441SEvalZero }
287*10465441SEvalZero
288*10465441SEvalZero eMBException
eMBMasterFuncReadHoldingRegister(UCHAR * pucFrame,USHORT * usLen)289*10465441SEvalZero eMBMasterFuncReadHoldingRegister( UCHAR * pucFrame, USHORT * usLen )
290*10465441SEvalZero {
291*10465441SEvalZero UCHAR *ucMBFrame;
292*10465441SEvalZero USHORT usRegAddress;
293*10465441SEvalZero USHORT usRegCount;
294*10465441SEvalZero
295*10465441SEvalZero eMBException eStatus = MB_EX_NONE;
296*10465441SEvalZero eMBErrorCode eRegStatus;
297*10465441SEvalZero
298*10465441SEvalZero /* If this request is broadcast, and it's read mode. This request don't need execute. */
299*10465441SEvalZero if ( xMBMasterRequestIsBroadcast() )
300*10465441SEvalZero {
301*10465441SEvalZero eStatus = MB_EX_NONE;
302*10465441SEvalZero }
303*10465441SEvalZero else if( *usLen >= MB_PDU_SIZE_MIN + MB_PDU_FUNC_READ_SIZE_MIN )
304*10465441SEvalZero {
305*10465441SEvalZero vMBMasterGetPDUSndBuf(&ucMBFrame);
306*10465441SEvalZero usRegAddress = ( USHORT )( ucMBFrame[MB_PDU_REQ_READ_ADDR_OFF] << 8 );
307*10465441SEvalZero usRegAddress |= ( USHORT )( ucMBFrame[MB_PDU_REQ_READ_ADDR_OFF + 1] );
308*10465441SEvalZero usRegAddress++;
309*10465441SEvalZero
310*10465441SEvalZero usRegCount = ( USHORT )( ucMBFrame[MB_PDU_REQ_READ_REGCNT_OFF] << 8 );
311*10465441SEvalZero usRegCount |= ( USHORT )( ucMBFrame[MB_PDU_REQ_READ_REGCNT_OFF + 1] );
312*10465441SEvalZero
313*10465441SEvalZero /* Check if the number of registers to read is valid. If not
314*10465441SEvalZero * return Modbus illegal data value exception.
315*10465441SEvalZero */
316*10465441SEvalZero if( ( usRegCount >= 1 ) && ( 2 * usRegCount == pucFrame[MB_PDU_FUNC_READ_BYTECNT_OFF] ) )
317*10465441SEvalZero {
318*10465441SEvalZero /* Make callback to fill the buffer. */
319*10465441SEvalZero eRegStatus = eMBMasterRegHoldingCB( &pucFrame[MB_PDU_FUNC_READ_VALUES_OFF], usRegAddress, usRegCount, MB_REG_READ );
320*10465441SEvalZero /* If an error occured convert it into a Modbus exception. */
321*10465441SEvalZero if( eRegStatus != MB_ENOERR )
322*10465441SEvalZero {
323*10465441SEvalZero eStatus = prveMBError2Exception( eRegStatus );
324*10465441SEvalZero }
325*10465441SEvalZero }
326*10465441SEvalZero else
327*10465441SEvalZero {
328*10465441SEvalZero eStatus = MB_EX_ILLEGAL_DATA_VALUE;
329*10465441SEvalZero }
330*10465441SEvalZero }
331*10465441SEvalZero else
332*10465441SEvalZero {
333*10465441SEvalZero /* Can't be a valid request because the length is incorrect. */
334*10465441SEvalZero eStatus = MB_EX_ILLEGAL_DATA_VALUE;
335*10465441SEvalZero }
336*10465441SEvalZero return eStatus;
337*10465441SEvalZero }
338*10465441SEvalZero
339*10465441SEvalZero #endif
340*10465441SEvalZero
341*10465441SEvalZero #if MB_FUNC_READWRITE_HOLDING_ENABLED > 0
342*10465441SEvalZero
343*10465441SEvalZero /**
344*10465441SEvalZero * This function will request read and write holding register.
345*10465441SEvalZero *
346*10465441SEvalZero * @param ucSndAddr salve address
347*10465441SEvalZero * @param usReadRegAddr read register start address
348*10465441SEvalZero * @param usNReadRegs read register total number
349*10465441SEvalZero * @param pusDataBuffer data to be written
350*10465441SEvalZero * @param usWriteRegAddr write register start address
351*10465441SEvalZero * @param usNWriteRegs write register total number
352*10465441SEvalZero * @param lTimeOut timeout (-1 will waiting forever)
353*10465441SEvalZero *
354*10465441SEvalZero * @return error code
355*10465441SEvalZero */
356*10465441SEvalZero eMBMasterReqErrCode
eMBMasterReqReadWriteMultipleHoldingRegister(UCHAR ucSndAddr,USHORT usReadRegAddr,USHORT usNReadRegs,USHORT * pusDataBuffer,USHORT usWriteRegAddr,USHORT usNWriteRegs,LONG lTimeOut)357*10465441SEvalZero eMBMasterReqReadWriteMultipleHoldingRegister( UCHAR ucSndAddr,
358*10465441SEvalZero USHORT usReadRegAddr, USHORT usNReadRegs, USHORT * pusDataBuffer,
359*10465441SEvalZero USHORT usWriteRegAddr, USHORT usNWriteRegs, LONG lTimeOut )
360*10465441SEvalZero {
361*10465441SEvalZero UCHAR *ucMBFrame;
362*10465441SEvalZero USHORT usRegIndex = 0;
363*10465441SEvalZero eMBMasterReqErrCode eErrStatus = MB_MRE_NO_ERR;
364*10465441SEvalZero
365*10465441SEvalZero if ( ucSndAddr > MB_MASTER_TOTAL_SLAVE_NUM ) eErrStatus = MB_MRE_ILL_ARG;
366*10465441SEvalZero else if ( xMBMasterRunResTake( lTimeOut ) == FALSE ) eErrStatus = MB_MRE_MASTER_BUSY;
367*10465441SEvalZero else
368*10465441SEvalZero {
369*10465441SEvalZero vMBMasterGetPDUSndBuf(&ucMBFrame);
370*10465441SEvalZero vMBMasterSetDestAddress(ucSndAddr);
371*10465441SEvalZero ucMBFrame[MB_PDU_FUNC_OFF] = MB_FUNC_READWRITE_MULTIPLE_REGISTERS;
372*10465441SEvalZero ucMBFrame[MB_PDU_REQ_READWRITE_READ_ADDR_OFF] = usReadRegAddr >> 8;
373*10465441SEvalZero ucMBFrame[MB_PDU_REQ_READWRITE_READ_ADDR_OFF + 1] = usReadRegAddr;
374*10465441SEvalZero ucMBFrame[MB_PDU_REQ_READWRITE_READ_REGCNT_OFF] = usNReadRegs >> 8;
375*10465441SEvalZero ucMBFrame[MB_PDU_REQ_READWRITE_READ_REGCNT_OFF + 1] = usNReadRegs ;
376*10465441SEvalZero ucMBFrame[MB_PDU_REQ_READWRITE_WRITE_ADDR_OFF] = usWriteRegAddr >> 8;
377*10465441SEvalZero ucMBFrame[MB_PDU_REQ_READWRITE_WRITE_ADDR_OFF + 1] = usWriteRegAddr;
378*10465441SEvalZero ucMBFrame[MB_PDU_REQ_READWRITE_WRITE_REGCNT_OFF] = usNWriteRegs >> 8;
379*10465441SEvalZero ucMBFrame[MB_PDU_REQ_READWRITE_WRITE_REGCNT_OFF + 1] = usNWriteRegs ;
380*10465441SEvalZero ucMBFrame[MB_PDU_REQ_READWRITE_WRITE_BYTECNT_OFF] = usNWriteRegs * 2;
381*10465441SEvalZero ucMBFrame += MB_PDU_REQ_READWRITE_WRITE_VALUES_OFF;
382*10465441SEvalZero while( usNWriteRegs > usRegIndex)
383*10465441SEvalZero {
384*10465441SEvalZero *ucMBFrame++ = pusDataBuffer[usRegIndex] >> 8;
385*10465441SEvalZero *ucMBFrame++ = pusDataBuffer[usRegIndex++] ;
386*10465441SEvalZero }
387*10465441SEvalZero vMBMasterSetPDUSndLength( MB_PDU_SIZE_MIN + MB_PDU_REQ_READWRITE_SIZE_MIN + 2*usNWriteRegs );
388*10465441SEvalZero ( void ) xMBMasterPortEventPost( EV_MASTER_FRAME_SENT );
389*10465441SEvalZero eErrStatus = eMBMasterWaitRequestFinish( );
390*10465441SEvalZero }
391*10465441SEvalZero return eErrStatus;
392*10465441SEvalZero }
393*10465441SEvalZero
394*10465441SEvalZero eMBException
eMBMasterFuncReadWriteMultipleHoldingRegister(UCHAR * pucFrame,USHORT * usLen)395*10465441SEvalZero eMBMasterFuncReadWriteMultipleHoldingRegister( UCHAR * pucFrame, USHORT * usLen )
396*10465441SEvalZero {
397*10465441SEvalZero USHORT usRegReadAddress;
398*10465441SEvalZero USHORT usRegReadCount;
399*10465441SEvalZero USHORT usRegWriteAddress;
400*10465441SEvalZero USHORT usRegWriteCount;
401*10465441SEvalZero UCHAR *ucMBFrame;
402*10465441SEvalZero
403*10465441SEvalZero eMBException eStatus = MB_EX_NONE;
404*10465441SEvalZero eMBErrorCode eRegStatus;
405*10465441SEvalZero
406*10465441SEvalZero /* If this request is broadcast, and it's read mode. This request don't need execute. */
407*10465441SEvalZero if ( xMBMasterRequestIsBroadcast() )
408*10465441SEvalZero {
409*10465441SEvalZero eStatus = MB_EX_NONE;
410*10465441SEvalZero }
411*10465441SEvalZero else if( *usLen >= MB_PDU_SIZE_MIN + MB_PDU_FUNC_READWRITE_SIZE_MIN )
412*10465441SEvalZero {
413*10465441SEvalZero vMBMasterGetPDUSndBuf(&ucMBFrame);
414*10465441SEvalZero usRegReadAddress = ( USHORT )( ucMBFrame[MB_PDU_REQ_READWRITE_READ_ADDR_OFF] << 8U );
415*10465441SEvalZero usRegReadAddress |= ( USHORT )( ucMBFrame[MB_PDU_REQ_READWRITE_READ_ADDR_OFF + 1] );
416*10465441SEvalZero usRegReadAddress++;
417*10465441SEvalZero
418*10465441SEvalZero usRegReadCount = ( USHORT )( ucMBFrame[MB_PDU_REQ_READWRITE_READ_REGCNT_OFF] << 8U );
419*10465441SEvalZero usRegReadCount |= ( USHORT )( ucMBFrame[MB_PDU_REQ_READWRITE_READ_REGCNT_OFF + 1] );
420*10465441SEvalZero
421*10465441SEvalZero usRegWriteAddress = ( USHORT )( ucMBFrame[MB_PDU_REQ_READWRITE_WRITE_ADDR_OFF] << 8U );
422*10465441SEvalZero usRegWriteAddress |= ( USHORT )( ucMBFrame[MB_PDU_REQ_READWRITE_WRITE_ADDR_OFF + 1] );
423*10465441SEvalZero usRegWriteAddress++;
424*10465441SEvalZero
425*10465441SEvalZero usRegWriteCount = ( USHORT )( ucMBFrame[MB_PDU_REQ_READWRITE_WRITE_REGCNT_OFF] << 8U );
426*10465441SEvalZero usRegWriteCount |= ( USHORT )( ucMBFrame[MB_PDU_REQ_READWRITE_WRITE_REGCNT_OFF + 1] );
427*10465441SEvalZero
428*10465441SEvalZero if( ( 2 * usRegReadCount ) == pucFrame[MB_PDU_FUNC_READWRITE_READ_BYTECNT_OFF] )
429*10465441SEvalZero {
430*10465441SEvalZero /* Make callback to update the register values. */
431*10465441SEvalZero eRegStatus = eMBMasterRegHoldingCB( &ucMBFrame[MB_PDU_REQ_READWRITE_WRITE_VALUES_OFF],
432*10465441SEvalZero usRegWriteAddress, usRegWriteCount, MB_REG_WRITE );
433*10465441SEvalZero
434*10465441SEvalZero if( eRegStatus == MB_ENOERR )
435*10465441SEvalZero {
436*10465441SEvalZero /* Make the read callback. */
437*10465441SEvalZero eRegStatus = eMBMasterRegHoldingCB(&pucFrame[MB_PDU_FUNC_READWRITE_READ_VALUES_OFF],
438*10465441SEvalZero usRegReadAddress, usRegReadCount, MB_REG_READ);
439*10465441SEvalZero }
440*10465441SEvalZero if( eRegStatus != MB_ENOERR )
441*10465441SEvalZero {
442*10465441SEvalZero eStatus = prveMBError2Exception( eRegStatus );
443*10465441SEvalZero }
444*10465441SEvalZero }
445*10465441SEvalZero else
446*10465441SEvalZero {
447*10465441SEvalZero eStatus = MB_EX_ILLEGAL_DATA_VALUE;
448*10465441SEvalZero }
449*10465441SEvalZero }
450*10465441SEvalZero return eStatus;
451*10465441SEvalZero }
452*10465441SEvalZero
453*10465441SEvalZero #endif
454*10465441SEvalZero #endif
455*10465441SEvalZero
456