xref: /nrf52832-nimble/rt-thread/components/drivers/misc/rt_drv_pwm.c (revision 104654410c56c573564690304ae786df310c91fc)
1*10465441SEvalZero /*
2*10465441SEvalZero  * Copyright (c) 2006-2018, RT-Thread Development Team
3*10465441SEvalZero  *
4*10465441SEvalZero  * SPDX-License-Identifier: Apache-2.0
5*10465441SEvalZero  *
6*10465441SEvalZero  * Change Logs:
7*10465441SEvalZero  * Date           Author       Notes
8*10465441SEvalZero  * 2018-05-07     aozima       the first version
9*10465441SEvalZero  */
10*10465441SEvalZero 
11*10465441SEvalZero #include <string.h>
12*10465441SEvalZero 
13*10465441SEvalZero #include <drivers/rt_drv_pwm.h>
14*10465441SEvalZero 
_pwm_control(rt_device_t dev,int cmd,void * args)15*10465441SEvalZero static rt_err_t _pwm_control(rt_device_t dev, int cmd, void *args)
16*10465441SEvalZero {
17*10465441SEvalZero     rt_err_t result = RT_EOK;
18*10465441SEvalZero     struct rt_device_pwm *pwm = (struct rt_device_pwm *)dev;
19*10465441SEvalZero 
20*10465441SEvalZero     if (pwm->ops->control)
21*10465441SEvalZero     {
22*10465441SEvalZero         result = pwm->ops->control(pwm, cmd, args);
23*10465441SEvalZero     }
24*10465441SEvalZero 
25*10465441SEvalZero     return result;
26*10465441SEvalZero }
27*10465441SEvalZero 
28*10465441SEvalZero 
29*10465441SEvalZero /*
30*10465441SEvalZero pos: channel
31*10465441SEvalZero void *buffer: rt_uint32_t pulse[size]
32*10465441SEvalZero size : number of pulse, only set to sizeof(rt_uint32_t).
33*10465441SEvalZero */
_pwm_read(rt_device_t dev,rt_off_t pos,void * buffer,rt_size_t size)34*10465441SEvalZero static rt_size_t _pwm_read(rt_device_t dev, rt_off_t pos, void *buffer, rt_size_t size)
35*10465441SEvalZero {
36*10465441SEvalZero     rt_err_t result = RT_EOK;
37*10465441SEvalZero     struct rt_device_pwm *pwm = (struct rt_device_pwm *)dev;
38*10465441SEvalZero     rt_uint32_t *pulse = (rt_uint32_t *)buffer;
39*10465441SEvalZero     struct rt_pwm_configuration configuration = {0};
40*10465441SEvalZero 
41*10465441SEvalZero     configuration.channel = pos;
42*10465441SEvalZero 
43*10465441SEvalZero     if (pwm->ops->control)
44*10465441SEvalZero     {
45*10465441SEvalZero         result = pwm->ops->control(pwm, PWM_CMD_GET,  &configuration);
46*10465441SEvalZero         if (result != RT_EOK)
47*10465441SEvalZero         {
48*10465441SEvalZero             return 0;
49*10465441SEvalZero         }
50*10465441SEvalZero 
51*10465441SEvalZero         *pulse = configuration.pulse;
52*10465441SEvalZero     }
53*10465441SEvalZero 
54*10465441SEvalZero     return size;
55*10465441SEvalZero }
56*10465441SEvalZero 
57*10465441SEvalZero /*
58*10465441SEvalZero pos: channel
59*10465441SEvalZero void *buffer: rt_uint32_t pulse[size]
60*10465441SEvalZero size : number of pulse, only set to sizeof(rt_uint32_t).
61*10465441SEvalZero */
_pwm_write(rt_device_t dev,rt_off_t pos,const void * buffer,rt_size_t size)62*10465441SEvalZero static rt_size_t _pwm_write(rt_device_t dev, rt_off_t pos, const void *buffer, rt_size_t size)
63*10465441SEvalZero {
64*10465441SEvalZero     rt_err_t result = RT_EOK;
65*10465441SEvalZero     struct rt_device_pwm *pwm = (struct rt_device_pwm *)dev;
66*10465441SEvalZero     rt_uint32_t *pulse = (rt_uint32_t *)buffer;
67*10465441SEvalZero     struct rt_pwm_configuration configuration = {0};
68*10465441SEvalZero 
69*10465441SEvalZero     configuration.channel = pos;
70*10465441SEvalZero 
71*10465441SEvalZero     if (pwm->ops->control)
72*10465441SEvalZero     {
73*10465441SEvalZero         result = pwm->ops->control(pwm, PWM_CMD_GET, &configuration);
74*10465441SEvalZero         if (result != RT_EOK)
75*10465441SEvalZero         {
76*10465441SEvalZero             return 0;
77*10465441SEvalZero         }
78*10465441SEvalZero 
79*10465441SEvalZero         configuration.pulse = *pulse;
80*10465441SEvalZero 
81*10465441SEvalZero         result = pwm->ops->control(pwm, PWM_CMD_SET, &configuration);
82*10465441SEvalZero         if (result != RT_EOK)
83*10465441SEvalZero         {
84*10465441SEvalZero             return 0;
85*10465441SEvalZero         }
86*10465441SEvalZero     }
87*10465441SEvalZero 
88*10465441SEvalZero     return size;
89*10465441SEvalZero }
90*10465441SEvalZero 
91*10465441SEvalZero #ifdef RT_USING_DEVICE_OPS
92*10465441SEvalZero static const struct rt_device_ops pwm_device_ops =
93*10465441SEvalZero {
94*10465441SEvalZero     RT_NULL,
95*10465441SEvalZero     RT_NULL,
96*10465441SEvalZero     RT_NULL,
97*10465441SEvalZero     _pwm_read,
98*10465441SEvalZero     _pwm_write,
99*10465441SEvalZero     _pwm_control
100*10465441SEvalZero };
101*10465441SEvalZero #endif /* RT_USING_DEVICE_OPS */
102*10465441SEvalZero 
rt_device_pwm_register(struct rt_device_pwm * device,const char * name,const struct rt_pwm_ops * ops,const void * user_data)103*10465441SEvalZero rt_err_t rt_device_pwm_register(struct rt_device_pwm *device, const char *name, const struct rt_pwm_ops *ops, const void *user_data)
104*10465441SEvalZero {
105*10465441SEvalZero     rt_err_t result = RT_EOK;
106*10465441SEvalZero 
107*10465441SEvalZero     memset(device, 0, sizeof(struct rt_device_pwm));
108*10465441SEvalZero 
109*10465441SEvalZero #ifdef RT_USING_DEVICE_OPS
110*10465441SEvalZero     device->parent.ops = &pwm_device_ops;
111*10465441SEvalZero #else
112*10465441SEvalZero     device->parent.init = RT_NULL;
113*10465441SEvalZero     device->parent.open = RT_NULL;
114*10465441SEvalZero     device->parent.close = RT_NULL;
115*10465441SEvalZero     device->parent.read  = _pwm_read;
116*10465441SEvalZero     device->parent.write = _pwm_write;
117*10465441SEvalZero     device->parent.control = _pwm_control;
118*10465441SEvalZero #endif /* RT_USING_DEVICE_OPS */
119*10465441SEvalZero 
120*10465441SEvalZero     device->parent.type         = RT_Device_Class_Miscellaneous;
121*10465441SEvalZero     device->ops                 = ops;
122*10465441SEvalZero     device->parent.user_data    = (void *)user_data;
123*10465441SEvalZero 
124*10465441SEvalZero     result = rt_device_register(&device->parent, name, RT_DEVICE_FLAG_RDWR);
125*10465441SEvalZero 
126*10465441SEvalZero     return result;
127*10465441SEvalZero }
128*10465441SEvalZero 
rt_pwm_enable(struct rt_device_pwm * device,int channel)129*10465441SEvalZero rt_err_t rt_pwm_enable(struct rt_device_pwm *device, int channel)
130*10465441SEvalZero {
131*10465441SEvalZero     rt_err_t result = RT_EOK;
132*10465441SEvalZero     struct rt_pwm_configuration configuration = {0};
133*10465441SEvalZero 
134*10465441SEvalZero     if (!device)
135*10465441SEvalZero     {
136*10465441SEvalZero         return -RT_EIO;
137*10465441SEvalZero     }
138*10465441SEvalZero 
139*10465441SEvalZero     configuration.channel = channel;
140*10465441SEvalZero     result = rt_device_control(&device->parent, PWM_CMD_ENABLE, &configuration);
141*10465441SEvalZero 
142*10465441SEvalZero     return result;
143*10465441SEvalZero }
144*10465441SEvalZero 
rt_pwm_disable(struct rt_device_pwm * device,int channel)145*10465441SEvalZero rt_err_t rt_pwm_disable(struct rt_device_pwm *device, int channel)
146*10465441SEvalZero {
147*10465441SEvalZero     rt_err_t result = RT_EOK;
148*10465441SEvalZero     struct rt_pwm_configuration configuration = {0};
149*10465441SEvalZero 
150*10465441SEvalZero     if (!device)
151*10465441SEvalZero     {
152*10465441SEvalZero         return -RT_EIO;
153*10465441SEvalZero     }
154*10465441SEvalZero 
155*10465441SEvalZero     configuration.channel = channel;
156*10465441SEvalZero     result = rt_device_control(&device->parent, PWM_CMD_DISABLE, &configuration);
157*10465441SEvalZero 
158*10465441SEvalZero     return result;
159*10465441SEvalZero }
160*10465441SEvalZero 
rt_pwm_set(struct rt_device_pwm * device,int channel,rt_uint32_t period,rt_uint32_t pulse)161*10465441SEvalZero rt_err_t rt_pwm_set(struct rt_device_pwm *device, int channel, rt_uint32_t period, rt_uint32_t pulse)
162*10465441SEvalZero {
163*10465441SEvalZero     rt_err_t result = RT_EOK;
164*10465441SEvalZero     struct rt_pwm_configuration configuration = {0};
165*10465441SEvalZero 
166*10465441SEvalZero     if (!device)
167*10465441SEvalZero     {
168*10465441SEvalZero         return -RT_EIO;
169*10465441SEvalZero     }
170*10465441SEvalZero 
171*10465441SEvalZero     configuration.channel = channel;
172*10465441SEvalZero     configuration.period = period;
173*10465441SEvalZero     configuration.pulse = pulse;
174*10465441SEvalZero     result = rt_device_control(&device->parent, PWM_CMD_SET, &configuration);
175*10465441SEvalZero 
176*10465441SEvalZero     return result;
177*10465441SEvalZero }
178*10465441SEvalZero 
179*10465441SEvalZero #ifdef RT_USING_FINSH
180*10465441SEvalZero #include <finsh.h>
181*10465441SEvalZero 
182*10465441SEvalZero FINSH_FUNCTION_EXPORT_ALIAS(rt_pwm_enable, pwm_enable, enable pwm by channel.);
183*10465441SEvalZero FINSH_FUNCTION_EXPORT_ALIAS(rt_pwm_set, pwm_set, set pwm.);
184*10465441SEvalZero 
185*10465441SEvalZero #ifdef FINSH_USING_MSH
pwm_enable(int argc,char ** argv)186*10465441SEvalZero static int pwm_enable(int argc, char **argv)
187*10465441SEvalZero {
188*10465441SEvalZero     int result = 0;
189*10465441SEvalZero     struct rt_device_pwm *device = RT_NULL;
190*10465441SEvalZero 
191*10465441SEvalZero     if (argc != 3)
192*10465441SEvalZero     {
193*10465441SEvalZero         rt_kprintf("Usage: pwm_enable pwm1 1\n");
194*10465441SEvalZero         result = -RT_ERROR;
195*10465441SEvalZero         goto _exit;
196*10465441SEvalZero     }
197*10465441SEvalZero 
198*10465441SEvalZero     device = (struct rt_device_pwm *)rt_device_find(argv[1]);
199*10465441SEvalZero     if (!device)
200*10465441SEvalZero     {
201*10465441SEvalZero         result = -RT_EIO;
202*10465441SEvalZero         goto _exit;
203*10465441SEvalZero     }
204*10465441SEvalZero 
205*10465441SEvalZero     result = rt_pwm_enable(device, atoi(argv[2]));
206*10465441SEvalZero 
207*10465441SEvalZero _exit:
208*10465441SEvalZero     return result;
209*10465441SEvalZero }
210*10465441SEvalZero MSH_CMD_EXPORT(pwm_enable, pwm_enable pwm1 1);
211*10465441SEvalZero 
pwm_disable(int argc,char ** argv)212*10465441SEvalZero static int pwm_disable(int argc, char **argv)
213*10465441SEvalZero {
214*10465441SEvalZero     int result = 0;
215*10465441SEvalZero     struct rt_device_pwm *device = RT_NULL;
216*10465441SEvalZero 
217*10465441SEvalZero     if (argc != 3)
218*10465441SEvalZero     {
219*10465441SEvalZero         rt_kprintf("Usage: pwm_enable pwm1 1\n");
220*10465441SEvalZero         result = -RT_ERROR;
221*10465441SEvalZero         goto _exit;
222*10465441SEvalZero     }
223*10465441SEvalZero 
224*10465441SEvalZero     device = (struct rt_device_pwm *)rt_device_find(argv[1]);
225*10465441SEvalZero     if (!device)
226*10465441SEvalZero     {
227*10465441SEvalZero         result = -RT_EIO;
228*10465441SEvalZero         goto _exit;
229*10465441SEvalZero     }
230*10465441SEvalZero 
231*10465441SEvalZero     result = rt_pwm_disable(device, atoi(argv[2]));
232*10465441SEvalZero 
233*10465441SEvalZero _exit:
234*10465441SEvalZero     return result;
235*10465441SEvalZero }
236*10465441SEvalZero MSH_CMD_EXPORT(pwm_disable, pwm_disable pwm1 1);
237*10465441SEvalZero 
pwm_set(int argc,char ** argv)238*10465441SEvalZero static int pwm_set(int argc, char **argv)
239*10465441SEvalZero {
240*10465441SEvalZero     int result = 0;
241*10465441SEvalZero     struct rt_device_pwm *device = RT_NULL;
242*10465441SEvalZero 
243*10465441SEvalZero     if (argc != 5)
244*10465441SEvalZero     {
245*10465441SEvalZero         rt_kprintf("Usage: pwm_set pwm1 1 100 50\n");
246*10465441SEvalZero         result = -RT_ERROR;
247*10465441SEvalZero         goto _exit;
248*10465441SEvalZero     }
249*10465441SEvalZero 
250*10465441SEvalZero     device = (struct rt_device_pwm *)rt_device_find(argv[1]);
251*10465441SEvalZero     if (!device)
252*10465441SEvalZero     {
253*10465441SEvalZero         result = -RT_EIO;
254*10465441SEvalZero         goto _exit;
255*10465441SEvalZero     }
256*10465441SEvalZero 
257*10465441SEvalZero     result = rt_pwm_set(device, atoi(argv[2]), atoi(argv[3]), atoi(argv[4]));
258*10465441SEvalZero 
259*10465441SEvalZero _exit:
260*10465441SEvalZero     return result;
261*10465441SEvalZero }
262*10465441SEvalZero MSH_CMD_EXPORT(pwm_set, pwm_set 1 100 50);
263*10465441SEvalZero 
264*10465441SEvalZero #endif /* FINSH_USING_MSH */
265*10465441SEvalZero #endif /* RT_USING_FINSH */
266