1 /*
2 * Copyright (c) 2006-2018, RT-Thread Development Team
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 *
6 * Change Logs:
7 * Date Author Notes
8 * 2012-04-25 weety first version
9 */
10
11 #include <rtdevice.h>
12
13 #ifdef RT_I2C_BIT_DEBUG
14 #define bit_dbg(fmt, ...) rt_kprintf(fmt, ##__VA_ARGS__)
15 #else
16 #define bit_dbg(fmt, ...)
17 #endif
18
19 #define SET_SDA(ops, val) ops->set_sda(ops->data, val)
20 #define SET_SCL(ops, val) ops->set_scl(ops->data, val)
21 #define GET_SDA(ops) ops->get_sda(ops->data)
22 #define GET_SCL(ops) ops->get_scl(ops->data)
23
i2c_delay(struct rt_i2c_bit_ops * ops)24 rt_inline void i2c_delay(struct rt_i2c_bit_ops *ops)
25 {
26 ops->udelay((ops->delay_us + 1) >> 1);
27 }
28
i2c_delay2(struct rt_i2c_bit_ops * ops)29 rt_inline void i2c_delay2(struct rt_i2c_bit_ops *ops)
30 {
31 ops->udelay(ops->delay_us);
32 }
33
34 #define SDA_L(ops) SET_SDA(ops, 0)
35 #define SDA_H(ops) SET_SDA(ops, 1)
36 #define SCL_L(ops) SET_SCL(ops, 0)
37
38 /**
39 * release scl line, and wait scl line to high.
40 */
SCL_H(struct rt_i2c_bit_ops * ops)41 static rt_err_t SCL_H(struct rt_i2c_bit_ops *ops)
42 {
43 rt_tick_t start;
44
45 SET_SCL(ops, 1);
46
47 if (!ops->get_scl)
48 goto done;
49
50 start = rt_tick_get();
51 while (!GET_SCL(ops))
52 {
53 if ((rt_tick_get() - start) > ops->timeout)
54 return -RT_ETIMEOUT;
55 rt_thread_delay((ops->timeout + 1) >> 1);
56 }
57 #ifdef RT_I2C_BIT_DEBUG
58 if (rt_tick_get() != start)
59 {
60 bit_dbg("wait %ld tick for SCL line to go high\n",
61 rt_tick_get() - start);
62 }
63 #endif
64
65 done:
66 i2c_delay(ops);
67
68 return RT_EOK;
69 }
70
i2c_start(struct rt_i2c_bit_ops * ops)71 static void i2c_start(struct rt_i2c_bit_ops *ops)
72 {
73 #ifdef RT_I2C_BIT_DEBUG
74 if (ops->get_scl && !GET_SCL(ops))
75 {
76 bit_dbg("I2C bus error, SCL line low\n");
77 }
78 if (ops->get_sda && !GET_SDA(ops))
79 {
80 bit_dbg("I2C bus error, SDA line low\n");
81 }
82 #endif
83 SDA_L(ops);
84 i2c_delay(ops);
85 SCL_L(ops);
86 }
87
i2c_restart(struct rt_i2c_bit_ops * ops)88 static void i2c_restart(struct rt_i2c_bit_ops *ops)
89 {
90 SDA_H(ops);
91 SCL_H(ops);
92 i2c_delay(ops);
93 SDA_L(ops);
94 i2c_delay(ops);
95 SCL_L(ops);
96 }
97
i2c_stop(struct rt_i2c_bit_ops * ops)98 static void i2c_stop(struct rt_i2c_bit_ops *ops)
99 {
100 SDA_L(ops);
101 i2c_delay(ops);
102 SCL_H(ops);
103 i2c_delay(ops);
104 SDA_H(ops);
105 i2c_delay2(ops);
106 }
107
i2c_waitack(struct rt_i2c_bit_ops * ops)108 rt_inline rt_bool_t i2c_waitack(struct rt_i2c_bit_ops *ops)
109 {
110 rt_bool_t ack;
111
112 SDA_H(ops);
113 i2c_delay(ops);
114
115 if (SCL_H(ops) < 0)
116 {
117 bit_dbg("wait ack timeout\n");
118
119 return -RT_ETIMEOUT;
120 }
121
122 ack = !GET_SDA(ops); /* ACK : SDA pin is pulled low */
123 bit_dbg("%s\n", ack ? "ACK" : "NACK");
124
125 SCL_L(ops);
126
127 return ack;
128 }
129
i2c_writeb(struct rt_i2c_bus_device * bus,rt_uint8_t data)130 static rt_int32_t i2c_writeb(struct rt_i2c_bus_device *bus, rt_uint8_t data)
131 {
132 rt_int32_t i;
133 rt_uint8_t bit;
134
135 struct rt_i2c_bit_ops *ops = bus->priv;
136
137 for (i = 7; i >= 0; i--)
138 {
139 SCL_L(ops);
140 bit = (data >> i) & 1;
141 SET_SDA(ops, bit);
142 i2c_delay(ops);
143 if (SCL_H(ops) < 0)
144 {
145 bit_dbg("i2c_writeb: 0x%02x, "
146 "wait scl pin high timeout at bit %d\n",
147 data, i);
148
149 return -RT_ETIMEOUT;
150 }
151 }
152 SCL_L(ops);
153 i2c_delay(ops);
154
155 return i2c_waitack(ops);
156 }
157
i2c_readb(struct rt_i2c_bus_device * bus)158 static rt_int32_t i2c_readb(struct rt_i2c_bus_device *bus)
159 {
160 rt_uint8_t i;
161 rt_uint8_t data = 0;
162 struct rt_i2c_bit_ops *ops = bus->priv;
163
164 SDA_H(ops);
165 i2c_delay(ops);
166 for (i = 0; i < 8; i++)
167 {
168 data <<= 1;
169
170 if (SCL_H(ops) < 0)
171 {
172 bit_dbg("i2c_readb: wait scl pin high "
173 "timeout at bit %d\n", 7 - i);
174
175 return -RT_ETIMEOUT;
176 }
177
178 if (GET_SDA(ops))
179 data |= 1;
180 SCL_L(ops);
181 i2c_delay2(ops);
182 }
183
184 return data;
185 }
186
i2c_send_bytes(struct rt_i2c_bus_device * bus,struct rt_i2c_msg * msg)187 static rt_size_t i2c_send_bytes(struct rt_i2c_bus_device *bus,
188 struct rt_i2c_msg *msg)
189 {
190 rt_int32_t ret;
191 rt_size_t bytes = 0;
192 const rt_uint8_t *ptr = msg->buf;
193 rt_int32_t count = msg->len;
194 rt_uint16_t ignore_nack = msg->flags & RT_I2C_IGNORE_NACK;
195
196 while (count > 0)
197 {
198 ret = i2c_writeb(bus, *ptr);
199
200 if ((ret > 0) || (ignore_nack && (ret == 0)))
201 {
202 count --;
203 ptr ++;
204 bytes ++;
205 }
206 else if (ret == 0)
207 {
208 i2c_dbg("send bytes: NACK.\n");
209
210 return 0;
211 }
212 else
213 {
214 i2c_dbg("send bytes: error %d\n", ret);
215
216 return ret;
217 }
218 }
219
220 return bytes;
221 }
222
i2c_send_ack_or_nack(struct rt_i2c_bus_device * bus,int ack)223 static rt_err_t i2c_send_ack_or_nack(struct rt_i2c_bus_device *bus, int ack)
224 {
225 struct rt_i2c_bit_ops *ops = bus->priv;
226
227 if (ack)
228 SET_SDA(ops, 0);
229 i2c_delay(ops);
230 if (SCL_H(ops) < 0)
231 {
232 bit_dbg("ACK or NACK timeout\n");
233
234 return -RT_ETIMEOUT;
235 }
236 SCL_L(ops);
237
238 return RT_EOK;
239 }
240
i2c_recv_bytes(struct rt_i2c_bus_device * bus,struct rt_i2c_msg * msg)241 static rt_size_t i2c_recv_bytes(struct rt_i2c_bus_device *bus,
242 struct rt_i2c_msg *msg)
243 {
244 rt_int32_t val;
245 rt_int32_t bytes = 0; /* actual bytes */
246 rt_uint8_t *ptr = msg->buf;
247 rt_int32_t count = msg->len;
248 const rt_uint32_t flags = msg->flags;
249
250 while (count > 0)
251 {
252 val = i2c_readb(bus);
253 if (val >= 0)
254 {
255 *ptr = val;
256 bytes ++;
257 }
258 else
259 {
260 break;
261 }
262
263 ptr ++;
264 count --;
265
266 bit_dbg("recieve bytes: 0x%02x, %s\n",
267 val, (flags & RT_I2C_NO_READ_ACK) ?
268 "(No ACK/NACK)" : (count ? "ACK" : "NACK"));
269
270 if (!(flags & RT_I2C_NO_READ_ACK))
271 {
272 val = i2c_send_ack_or_nack(bus, count);
273 if (val < 0)
274 return val;
275 }
276 }
277
278 return bytes;
279 }
280
i2c_send_address(struct rt_i2c_bus_device * bus,rt_uint8_t addr,rt_int32_t retries)281 static rt_int32_t i2c_send_address(struct rt_i2c_bus_device *bus,
282 rt_uint8_t addr,
283 rt_int32_t retries)
284 {
285 struct rt_i2c_bit_ops *ops = bus->priv;
286 rt_int32_t i;
287 rt_err_t ret = 0;
288
289 for (i = 0; i <= retries; i++)
290 {
291 ret = i2c_writeb(bus, addr);
292 if (ret == 1 || i == retries)
293 break;
294 bit_dbg("send stop condition\n");
295 i2c_stop(ops);
296 i2c_delay2(ops);
297 bit_dbg("send start condition\n");
298 i2c_start(ops);
299 }
300
301 return ret;
302 }
303
i2c_bit_send_address(struct rt_i2c_bus_device * bus,struct rt_i2c_msg * msg)304 static rt_err_t i2c_bit_send_address(struct rt_i2c_bus_device *bus,
305 struct rt_i2c_msg *msg)
306 {
307 rt_uint16_t flags = msg->flags;
308 rt_uint16_t ignore_nack = msg->flags & RT_I2C_IGNORE_NACK;
309 struct rt_i2c_bit_ops *ops = bus->priv;
310
311 rt_uint8_t addr1, addr2;
312 rt_int32_t retries;
313 rt_err_t ret;
314
315 retries = ignore_nack ? 0 : bus->retries;
316
317 if (flags & RT_I2C_ADDR_10BIT)
318 {
319 addr1 = 0xf0 | ((msg->addr >> 7) & 0x06);
320 addr2 = msg->addr & 0xff;
321
322 bit_dbg("addr1: %d, addr2: %d\n", addr1, addr2);
323
324 ret = i2c_send_address(bus, addr1, retries);
325 if ((ret != 1) && !ignore_nack)
326 {
327 bit_dbg("NACK: sending first addr\n");
328
329 return -RT_EIO;
330 }
331
332 ret = i2c_writeb(bus, addr2);
333 if ((ret != 1) && !ignore_nack)
334 {
335 bit_dbg("NACK: sending second addr\n");
336
337 return -RT_EIO;
338 }
339 if (flags & RT_I2C_RD)
340 {
341 bit_dbg("send repeated start condition\n");
342 i2c_restart(ops);
343 addr1 |= 0x01;
344 ret = i2c_send_address(bus, addr1, retries);
345 if ((ret != 1) && !ignore_nack)
346 {
347 bit_dbg("NACK: sending repeated addr\n");
348
349 return -RT_EIO;
350 }
351 }
352 }
353 else
354 {
355 /* 7-bit addr */
356 addr1 = msg->addr << 1;
357 if (flags & RT_I2C_RD)
358 addr1 |= 1;
359 ret = i2c_send_address(bus, addr1, retries);
360 if ((ret != 1) && !ignore_nack)
361 return -RT_EIO;
362 }
363
364 return RT_EOK;
365 }
366
i2c_bit_xfer(struct rt_i2c_bus_device * bus,struct rt_i2c_msg msgs[],rt_uint32_t num)367 static rt_size_t i2c_bit_xfer(struct rt_i2c_bus_device *bus,
368 struct rt_i2c_msg msgs[],
369 rt_uint32_t num)
370 {
371 struct rt_i2c_msg *msg;
372 struct rt_i2c_bit_ops *ops = bus->priv;
373 rt_int32_t i, ret;
374 rt_uint16_t ignore_nack;
375
376 bit_dbg("send start condition\n");
377 i2c_start(ops);
378 for (i = 0; i < num; i++)
379 {
380 msg = &msgs[i];
381 ignore_nack = msg->flags & RT_I2C_IGNORE_NACK;
382 if (!(msg->flags & RT_I2C_NO_START))
383 {
384 if (i)
385 {
386 i2c_restart(ops);
387 }
388 ret = i2c_bit_send_address(bus, msg);
389 if ((ret != RT_EOK) && !ignore_nack)
390 {
391 bit_dbg("receive NACK from device addr 0x%02x msg %d\n",
392 msgs[i].addr, i);
393 goto out;
394 }
395 }
396 if (msg->flags & RT_I2C_RD)
397 {
398 ret = i2c_recv_bytes(bus, msg);
399 if (ret >= 1)
400 bit_dbg("read %d byte%s\n", ret, ret == 1 ? "" : "s");
401 if (ret < msg->len)
402 {
403 if (ret >= 0)
404 ret = -RT_EIO;
405 goto out;
406 }
407 }
408 else
409 {
410 ret = i2c_send_bytes(bus, msg);
411 if (ret >= 1)
412 bit_dbg("write %d byte%s\n", ret, ret == 1 ? "" : "s");
413 if (ret < msg->len)
414 {
415 if (ret >= 0)
416 ret = -RT_ERROR;
417 goto out;
418 }
419 }
420 }
421 ret = i;
422
423 out:
424 bit_dbg("send stop condition\n");
425 i2c_stop(ops);
426
427 return ret;
428 }
429
430 static const struct rt_i2c_bus_device_ops i2c_bit_bus_ops =
431 {
432 i2c_bit_xfer,
433 RT_NULL,
434 RT_NULL
435 };
436
rt_i2c_bit_add_bus(struct rt_i2c_bus_device * bus,const char * bus_name)437 rt_err_t rt_i2c_bit_add_bus(struct rt_i2c_bus_device *bus,
438 const char *bus_name)
439 {
440 bus->ops = &i2c_bit_bus_ops;
441
442 return rt_i2c_bus_device_register(bus, bus_name);
443 }
444