1*042d53a7SEvalZero /* 2*042d53a7SEvalZero * Licensed to the Apache Software Foundation (ASF) under one 3*042d53a7SEvalZero * or more contributor license agreements. See the NOTICE file 4*042d53a7SEvalZero * distributed with this work for additional information 5*042d53a7SEvalZero * regarding copyright ownership. The ASF licenses this file 6*042d53a7SEvalZero * to you under the Apache License, Version 2.0 (the 7*042d53a7SEvalZero * "License"); you may not use this file except in compliance 8*042d53a7SEvalZero * with the License. You may obtain a copy of the License at 9*042d53a7SEvalZero * 10*042d53a7SEvalZero * http://www.apache.org/licenses/LICENSE-2.0 11*042d53a7SEvalZero * 12*042d53a7SEvalZero * Unless required by applicable law or agreed to in writing, 13*042d53a7SEvalZero * software distributed under the License is distributed on an 14*042d53a7SEvalZero * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY 15*042d53a7SEvalZero * KIND, either express or implied. See the License for the 16*042d53a7SEvalZero * specific language governing permissions and limitations 17*042d53a7SEvalZero * under the License. 18*042d53a7SEvalZero */ 19*042d53a7SEvalZero 20*042d53a7SEvalZero /** 21*042d53a7SEvalZero * This file was generated by Apache Newt version: 1.4.0-dev 22*042d53a7SEvalZero */ 23*042d53a7SEvalZero 24*042d53a7SEvalZero #ifndef H_MYNEWT_SYSCFG_ 25*042d53a7SEvalZero #define H_MYNEWT_SYSCFG_ 26*042d53a7SEvalZero 27*042d53a7SEvalZero /** 28*042d53a7SEvalZero * This macro exists to ensure code includes this header when needed. If code 29*042d53a7SEvalZero * checks the existence of a setting directly via ifdef without including this 30*042d53a7SEvalZero * header, the setting macro will silently evaluate to 0. In contrast, an 31*042d53a7SEvalZero * attempt to use these macros without including this header will result in a 32*042d53a7SEvalZero * compiler error. 33*042d53a7SEvalZero */ 34*042d53a7SEvalZero #define MYNEWT_VAL(x) MYNEWT_VAL_ ## x 35*042d53a7SEvalZero 36*042d53a7SEvalZero 37*042d53a7SEvalZero 38*042d53a7SEvalZero /*** compiler/arm-none-eabi-m4 */ 39*042d53a7SEvalZero #ifndef MYNEWT_VAL_HARDFLOAT 40*042d53a7SEvalZero #define MYNEWT_VAL_HARDFLOAT (0) 41*042d53a7SEvalZero #endif 42*042d53a7SEvalZero 43*042d53a7SEvalZero /*** hw/bsp/nrf52840pdk */ 44*042d53a7SEvalZero #ifndef MYNEWT_VAL_BSP_NRF52840 45*042d53a7SEvalZero #define MYNEWT_VAL_BSP_NRF52840 (1) 46*042d53a7SEvalZero #endif 47*042d53a7SEvalZero 48*042d53a7SEvalZero #ifndef MYNEWT_VAL_I2C_0_FREQ_KHZ 49*042d53a7SEvalZero #define MYNEWT_VAL_I2C_0_FREQ_KHZ (100) 50*042d53a7SEvalZero #endif 51*042d53a7SEvalZero 52*042d53a7SEvalZero #ifndef MYNEWT_VAL_I2C_0_PIN_SCL 53*042d53a7SEvalZero #define MYNEWT_VAL_I2C_0_PIN_SCL (27) 54*042d53a7SEvalZero #endif 55*042d53a7SEvalZero 56*042d53a7SEvalZero #ifndef MYNEWT_VAL_I2C_0_PIN_SDA 57*042d53a7SEvalZero #define MYNEWT_VAL_I2C_0_PIN_SDA (26) 58*042d53a7SEvalZero #endif 59*042d53a7SEvalZero 60*042d53a7SEvalZero #ifndef MYNEWT_VAL_PWM_3 61*042d53a7SEvalZero #define MYNEWT_VAL_PWM_3 (0) 62*042d53a7SEvalZero #endif 63*042d53a7SEvalZero 64*042d53a7SEvalZero #ifndef MYNEWT_VAL_SPI_0_MASTER_PIN_MISO 65*042d53a7SEvalZero #define MYNEWT_VAL_SPI_0_MASTER_PIN_MISO (47) 66*042d53a7SEvalZero #endif 67*042d53a7SEvalZero 68*042d53a7SEvalZero #ifndef MYNEWT_VAL_SPI_0_MASTER_PIN_MOSI 69*042d53a7SEvalZero #define MYNEWT_VAL_SPI_0_MASTER_PIN_MOSI (46) 70*042d53a7SEvalZero #endif 71*042d53a7SEvalZero 72*042d53a7SEvalZero #ifndef MYNEWT_VAL_SPI_0_MASTER_PIN_SCK 73*042d53a7SEvalZero #define MYNEWT_VAL_SPI_0_MASTER_PIN_SCK (45) 74*042d53a7SEvalZero #endif 75*042d53a7SEvalZero 76*042d53a7SEvalZero #ifndef MYNEWT_VAL_SPI_0_SLAVE_PIN_MISO 77*042d53a7SEvalZero #define MYNEWT_VAL_SPI_0_SLAVE_PIN_MISO (47) 78*042d53a7SEvalZero #endif 79*042d53a7SEvalZero 80*042d53a7SEvalZero #ifndef MYNEWT_VAL_SPI_0_SLAVE_PIN_MOSI 81*042d53a7SEvalZero #define MYNEWT_VAL_SPI_0_SLAVE_PIN_MOSI (46) 82*042d53a7SEvalZero #endif 83*042d53a7SEvalZero 84*042d53a7SEvalZero #ifndef MYNEWT_VAL_SPI_0_SLAVE_PIN_SCK 85*042d53a7SEvalZero #define MYNEWT_VAL_SPI_0_SLAVE_PIN_SCK (45) 86*042d53a7SEvalZero #endif 87*042d53a7SEvalZero 88*042d53a7SEvalZero #ifndef MYNEWT_VAL_SPI_0_SLAVE_PIN_SS 89*042d53a7SEvalZero #define MYNEWT_VAL_SPI_0_SLAVE_PIN_SS (44) 90*042d53a7SEvalZero #endif 91*042d53a7SEvalZero 92*042d53a7SEvalZero #ifndef MYNEWT_VAL_TIMER_0 93*042d53a7SEvalZero #define MYNEWT_VAL_TIMER_0 (0) 94*042d53a7SEvalZero #endif 95*042d53a7SEvalZero 96*042d53a7SEvalZero #ifndef MYNEWT_VAL_TIMER_1 97*042d53a7SEvalZero #define MYNEWT_VAL_TIMER_1 (0) 98*042d53a7SEvalZero #endif 99*042d53a7SEvalZero 100*042d53a7SEvalZero #ifndef MYNEWT_VAL_TIMER_2 101*042d53a7SEvalZero #define MYNEWT_VAL_TIMER_2 (0) 102*042d53a7SEvalZero #endif 103*042d53a7SEvalZero 104*042d53a7SEvalZero #ifndef MYNEWT_VAL_TIMER_3 105*042d53a7SEvalZero #define MYNEWT_VAL_TIMER_3 (0) 106*042d53a7SEvalZero #endif 107*042d53a7SEvalZero 108*042d53a7SEvalZero #ifndef MYNEWT_VAL_TIMER_4 109*042d53a7SEvalZero #define MYNEWT_VAL_TIMER_4 (0) 110*042d53a7SEvalZero #endif 111*042d53a7SEvalZero 112*042d53a7SEvalZero #ifndef MYNEWT_VAL_TIMER_5 113*042d53a7SEvalZero #define MYNEWT_VAL_TIMER_5 (1) 114*042d53a7SEvalZero #endif 115*042d53a7SEvalZero 116*042d53a7SEvalZero #ifndef MYNEWT_VAL_UART_0 117*042d53a7SEvalZero #define MYNEWT_VAL_UART_0 (1) 118*042d53a7SEvalZero #endif 119*042d53a7SEvalZero 120*042d53a7SEvalZero #ifndef MYNEWT_VAL_UART_0_PIN_CTS 121*042d53a7SEvalZero #define MYNEWT_VAL_UART_0_PIN_CTS (7) 122*042d53a7SEvalZero #endif 123*042d53a7SEvalZero 124*042d53a7SEvalZero #ifndef MYNEWT_VAL_UART_0_PIN_RTS 125*042d53a7SEvalZero #define MYNEWT_VAL_UART_0_PIN_RTS (5) 126*042d53a7SEvalZero #endif 127*042d53a7SEvalZero 128*042d53a7SEvalZero #ifndef MYNEWT_VAL_UART_0_PIN_RX 129*042d53a7SEvalZero #define MYNEWT_VAL_UART_0_PIN_RX (8) 130*042d53a7SEvalZero #endif 131*042d53a7SEvalZero 132*042d53a7SEvalZero #ifndef MYNEWT_VAL_UART_0_PIN_TX 133*042d53a7SEvalZero #define MYNEWT_VAL_UART_0_PIN_TX (6) 134*042d53a7SEvalZero #endif 135*042d53a7SEvalZero 136*042d53a7SEvalZero #ifndef MYNEWT_VAL_UART_1 137*042d53a7SEvalZero #define MYNEWT_VAL_UART_1 (0) 138*042d53a7SEvalZero #endif 139*042d53a7SEvalZero 140*042d53a7SEvalZero #ifndef MYNEWT_VAL_UART_1_PIN_CTS 141*042d53a7SEvalZero #define MYNEWT_VAL_UART_1_PIN_CTS (-1) 142*042d53a7SEvalZero #endif 143*042d53a7SEvalZero 144*042d53a7SEvalZero #ifndef MYNEWT_VAL_UART_1_PIN_RTS 145*042d53a7SEvalZero #define MYNEWT_VAL_UART_1_PIN_RTS (-1) 146*042d53a7SEvalZero #endif 147*042d53a7SEvalZero 148*042d53a7SEvalZero #ifndef MYNEWT_VAL_UART_1_PIN_RX 149*042d53a7SEvalZero #define MYNEWT_VAL_UART_1_PIN_RX (-1) 150*042d53a7SEvalZero #endif 151*042d53a7SEvalZero 152*042d53a7SEvalZero #ifndef MYNEWT_VAL_UART_1_PIN_TX 153*042d53a7SEvalZero #define MYNEWT_VAL_UART_1_PIN_TX (-1) 154*042d53a7SEvalZero #endif 155*042d53a7SEvalZero 156*042d53a7SEvalZero /*** hw/mcu/nordic/nrf52xxx */ 157*042d53a7SEvalZero #ifndef MYNEWT_VAL_ADC_0 158*042d53a7SEvalZero #define MYNEWT_VAL_ADC_0 (0) 159*042d53a7SEvalZero #endif 160*042d53a7SEvalZero 161*042d53a7SEvalZero #ifndef MYNEWT_VAL_ADC_0_REFMV_0 162*042d53a7SEvalZero #define MYNEWT_VAL_ADC_0_REFMV_0 (0) 163*042d53a7SEvalZero #endif 164*042d53a7SEvalZero 165*042d53a7SEvalZero #ifndef MYNEWT_VAL_I2C_0 166*042d53a7SEvalZero #define MYNEWT_VAL_I2C_0 (0) 167*042d53a7SEvalZero #endif 168*042d53a7SEvalZero 169*042d53a7SEvalZero #ifndef MYNEWT_VAL_I2C_1 170*042d53a7SEvalZero #define MYNEWT_VAL_I2C_1 (0) 171*042d53a7SEvalZero #endif 172*042d53a7SEvalZero 173*042d53a7SEvalZero /* Overridden by hw/bsp/nrf52840pdk (defined by hw/mcu/nordic/nrf52xxx) */ 174*042d53a7SEvalZero #ifndef MYNEWT_VAL_MCU_DCDC_ENABLED 175*042d53a7SEvalZero #define MYNEWT_VAL_MCU_DCDC_ENABLED (1) 176*042d53a7SEvalZero #endif 177*042d53a7SEvalZero 178*042d53a7SEvalZero #ifndef MYNEWT_VAL_MCU_FLASH_MIN_WRITE_SIZE 179*042d53a7SEvalZero #define MYNEWT_VAL_MCU_FLASH_MIN_WRITE_SIZE (1) 180*042d53a7SEvalZero #endif 181*042d53a7SEvalZero 182*042d53a7SEvalZero #ifndef MYNEWT_VAL_PWM_0 183*042d53a7SEvalZero #define MYNEWT_VAL_PWM_0 (0) 184*042d53a7SEvalZero #endif 185*042d53a7SEvalZero 186*042d53a7SEvalZero #ifndef MYNEWT_VAL_PWM_1 187*042d53a7SEvalZero #define MYNEWT_VAL_PWM_1 (0) 188*042d53a7SEvalZero #endif 189*042d53a7SEvalZero 190*042d53a7SEvalZero #ifndef MYNEWT_VAL_PWM_2 191*042d53a7SEvalZero #define MYNEWT_VAL_PWM_2 (0) 192*042d53a7SEvalZero #endif 193*042d53a7SEvalZero 194*042d53a7SEvalZero #ifndef MYNEWT_VAL_QSPI_ADDRMODE 195*042d53a7SEvalZero #define MYNEWT_VAL_QSPI_ADDRMODE (0) 196*042d53a7SEvalZero #endif 197*042d53a7SEvalZero 198*042d53a7SEvalZero #ifndef MYNEWT_VAL_QSPI_DPMCONFIG 199*042d53a7SEvalZero #define MYNEWT_VAL_QSPI_DPMCONFIG (0) 200*042d53a7SEvalZero #endif 201*042d53a7SEvalZero 202*042d53a7SEvalZero #ifndef MYNEWT_VAL_QSPI_ENABLE 203*042d53a7SEvalZero #define MYNEWT_VAL_QSPI_ENABLE (0) 204*042d53a7SEvalZero #endif 205*042d53a7SEvalZero 206*042d53a7SEvalZero /* Overridden by hw/bsp/nrf52840pdk (defined by hw/mcu/nordic/nrf52xxx) */ 207*042d53a7SEvalZero #ifndef MYNEWT_VAL_QSPI_FLASH_PAGE_SIZE 208*042d53a7SEvalZero #define MYNEWT_VAL_QSPI_FLASH_PAGE_SIZE (256) 209*042d53a7SEvalZero #endif 210*042d53a7SEvalZero 211*042d53a7SEvalZero /* Overridden by hw/bsp/nrf52840pdk (defined by hw/mcu/nordic/nrf52xxx) */ 212*042d53a7SEvalZero #ifndef MYNEWT_VAL_QSPI_FLASH_SECTOR_COUNT 213*042d53a7SEvalZero #define MYNEWT_VAL_QSPI_FLASH_SECTOR_COUNT (4096) 214*042d53a7SEvalZero #endif 215*042d53a7SEvalZero 216*042d53a7SEvalZero /* Overridden by hw/bsp/nrf52840pdk (defined by hw/mcu/nordic/nrf52xxx) */ 217*042d53a7SEvalZero #ifndef MYNEWT_VAL_QSPI_FLASH_SECTOR_SIZE 218*042d53a7SEvalZero #define MYNEWT_VAL_QSPI_FLASH_SECTOR_SIZE (4096) 219*042d53a7SEvalZero #endif 220*042d53a7SEvalZero 221*042d53a7SEvalZero /* Overridden by hw/bsp/nrf52840pdk (defined by hw/mcu/nordic/nrf52xxx) */ 222*042d53a7SEvalZero #ifndef MYNEWT_VAL_QSPI_PIN_CS 223*042d53a7SEvalZero #define MYNEWT_VAL_QSPI_PIN_CS (17) 224*042d53a7SEvalZero #endif 225*042d53a7SEvalZero 226*042d53a7SEvalZero /* Overridden by hw/bsp/nrf52840pdk (defined by hw/mcu/nordic/nrf52xxx) */ 227*042d53a7SEvalZero #ifndef MYNEWT_VAL_QSPI_PIN_DIO0 228*042d53a7SEvalZero #define MYNEWT_VAL_QSPI_PIN_DIO0 (20) 229*042d53a7SEvalZero #endif 230*042d53a7SEvalZero 231*042d53a7SEvalZero /* Overridden by hw/bsp/nrf52840pdk (defined by hw/mcu/nordic/nrf52xxx) */ 232*042d53a7SEvalZero #ifndef MYNEWT_VAL_QSPI_PIN_DIO1 233*042d53a7SEvalZero #define MYNEWT_VAL_QSPI_PIN_DIO1 (21) 234*042d53a7SEvalZero #endif 235*042d53a7SEvalZero 236*042d53a7SEvalZero /* Overridden by hw/bsp/nrf52840pdk (defined by hw/mcu/nordic/nrf52xxx) */ 237*042d53a7SEvalZero #ifndef MYNEWT_VAL_QSPI_PIN_DIO2 238*042d53a7SEvalZero #define MYNEWT_VAL_QSPI_PIN_DIO2 (22) 239*042d53a7SEvalZero #endif 240*042d53a7SEvalZero 241*042d53a7SEvalZero /* Overridden by hw/bsp/nrf52840pdk (defined by hw/mcu/nordic/nrf52xxx) */ 242*042d53a7SEvalZero #ifndef MYNEWT_VAL_QSPI_PIN_DIO3 243*042d53a7SEvalZero #define MYNEWT_VAL_QSPI_PIN_DIO3 (23) 244*042d53a7SEvalZero #endif 245*042d53a7SEvalZero 246*042d53a7SEvalZero /* Overridden by hw/bsp/nrf52840pdk (defined by hw/mcu/nordic/nrf52xxx) */ 247*042d53a7SEvalZero #ifndef MYNEWT_VAL_QSPI_PIN_SCK 248*042d53a7SEvalZero #define MYNEWT_VAL_QSPI_PIN_SCK (19) 249*042d53a7SEvalZero #endif 250*042d53a7SEvalZero 251*042d53a7SEvalZero #ifndef MYNEWT_VAL_QSPI_READOC 252*042d53a7SEvalZero #define MYNEWT_VAL_QSPI_READOC (0) 253*042d53a7SEvalZero #endif 254*042d53a7SEvalZero 255*042d53a7SEvalZero #ifndef MYNEWT_VAL_QSPI_SCK_DELAY 256*042d53a7SEvalZero #define MYNEWT_VAL_QSPI_SCK_DELAY (0) 257*042d53a7SEvalZero #endif 258*042d53a7SEvalZero 259*042d53a7SEvalZero #ifndef MYNEWT_VAL_QSPI_SCK_FREQ 260*042d53a7SEvalZero #define MYNEWT_VAL_QSPI_SCK_FREQ (0) 261*042d53a7SEvalZero #endif 262*042d53a7SEvalZero 263*042d53a7SEvalZero #ifndef MYNEWT_VAL_QSPI_SPI_MODE 264*042d53a7SEvalZero #define MYNEWT_VAL_QSPI_SPI_MODE (0) 265*042d53a7SEvalZero #endif 266*042d53a7SEvalZero 267*042d53a7SEvalZero #ifndef MYNEWT_VAL_QSPI_WRITEOC 268*042d53a7SEvalZero #define MYNEWT_VAL_QSPI_WRITEOC (0) 269*042d53a7SEvalZero #endif 270*042d53a7SEvalZero 271*042d53a7SEvalZero #ifndef MYNEWT_VAL_SOFT_PWM 272*042d53a7SEvalZero #define MYNEWT_VAL_SOFT_PWM (0) 273*042d53a7SEvalZero #endif 274*042d53a7SEvalZero 275*042d53a7SEvalZero #ifndef MYNEWT_VAL_SPI_0_MASTER 276*042d53a7SEvalZero #define MYNEWT_VAL_SPI_0_MASTER (0) 277*042d53a7SEvalZero #endif 278*042d53a7SEvalZero 279*042d53a7SEvalZero #ifndef MYNEWT_VAL_SPI_0_SLAVE 280*042d53a7SEvalZero #define MYNEWT_VAL_SPI_0_SLAVE (0) 281*042d53a7SEvalZero #endif 282*042d53a7SEvalZero 283*042d53a7SEvalZero #ifndef MYNEWT_VAL_SPI_1_MASTER 284*042d53a7SEvalZero #define MYNEWT_VAL_SPI_1_MASTER (0) 285*042d53a7SEvalZero #endif 286*042d53a7SEvalZero 287*042d53a7SEvalZero #ifndef MYNEWT_VAL_SPI_1_SLAVE 288*042d53a7SEvalZero #define MYNEWT_VAL_SPI_1_SLAVE (0) 289*042d53a7SEvalZero #endif 290*042d53a7SEvalZero 291*042d53a7SEvalZero #ifndef MYNEWT_VAL_SPI_2_MASTER 292*042d53a7SEvalZero #define MYNEWT_VAL_SPI_2_MASTER (0) 293*042d53a7SEvalZero #endif 294*042d53a7SEvalZero 295*042d53a7SEvalZero #ifndef MYNEWT_VAL_SPI_2_SLAVE 296*042d53a7SEvalZero #define MYNEWT_VAL_SPI_2_SLAVE (0) 297*042d53a7SEvalZero #endif 298*042d53a7SEvalZero 299*042d53a7SEvalZero /* Overridden by hw/bsp/nrf52840pdk (defined by hw/mcu/nordic/nrf52xxx) */ 300*042d53a7SEvalZero #ifndef MYNEWT_VAL_XTAL_32768 301*042d53a7SEvalZero #define MYNEWT_VAL_XTAL_32768 (1) 302*042d53a7SEvalZero #endif 303*042d53a7SEvalZero 304*042d53a7SEvalZero #ifndef MYNEWT_VAL_XTAL_32768_SYNTH 305*042d53a7SEvalZero #define MYNEWT_VAL_XTAL_32768_SYNTH (0) 306*042d53a7SEvalZero #endif 307*042d53a7SEvalZero 308*042d53a7SEvalZero #ifndef MYNEWT_VAL_XTAL_RC 309*042d53a7SEvalZero #define MYNEWT_VAL_XTAL_RC (0) 310*042d53a7SEvalZero #endif 311*042d53a7SEvalZero 312*042d53a7SEvalZero /*** kernel/os */ 313*042d53a7SEvalZero #ifndef MYNEWT_VAL_FLOAT_USER 314*042d53a7SEvalZero #define MYNEWT_VAL_FLOAT_USER (0) 315*042d53a7SEvalZero #endif 316*042d53a7SEvalZero 317*042d53a7SEvalZero #ifndef MYNEWT_VAL_MSYS_1_BLOCK_COUNT 318*042d53a7SEvalZero #define MYNEWT_VAL_MSYS_1_BLOCK_COUNT (12) 319*042d53a7SEvalZero #endif 320*042d53a7SEvalZero 321*042d53a7SEvalZero #ifndef MYNEWT_VAL_MSYS_1_BLOCK_SIZE 322*042d53a7SEvalZero #define MYNEWT_VAL_MSYS_1_BLOCK_SIZE (292) 323*042d53a7SEvalZero #endif 324*042d53a7SEvalZero 325*042d53a7SEvalZero #ifndef MYNEWT_VAL_MSYS_2_BLOCK_COUNT 326*042d53a7SEvalZero #define MYNEWT_VAL_MSYS_2_BLOCK_COUNT (0) 327*042d53a7SEvalZero #endif 328*042d53a7SEvalZero 329*042d53a7SEvalZero #ifndef MYNEWT_VAL_MSYS_2_BLOCK_SIZE 330*042d53a7SEvalZero #define MYNEWT_VAL_MSYS_2_BLOCK_SIZE (0) 331*042d53a7SEvalZero #endif 332*042d53a7SEvalZero 333*042d53a7SEvalZero #ifndef MYNEWT_VAL_OS_CLI 334*042d53a7SEvalZero #define MYNEWT_VAL_OS_CLI (0) 335*042d53a7SEvalZero #endif 336*042d53a7SEvalZero 337*042d53a7SEvalZero #ifndef MYNEWT_VAL_OS_COREDUMP 338*042d53a7SEvalZero #define MYNEWT_VAL_OS_COREDUMP (0) 339*042d53a7SEvalZero #endif 340*042d53a7SEvalZero 341*042d53a7SEvalZero /* Overridden by hw/bsp/nrf52840pdk (defined by kernel/os) */ 342*042d53a7SEvalZero #ifndef MYNEWT_VAL_OS_CPUTIME_FREQ 343*042d53a7SEvalZero #define MYNEWT_VAL_OS_CPUTIME_FREQ (32768) 344*042d53a7SEvalZero #endif 345*042d53a7SEvalZero 346*042d53a7SEvalZero /* Overridden by hw/bsp/nrf52840pdk (defined by kernel/os) */ 347*042d53a7SEvalZero #ifndef MYNEWT_VAL_OS_CPUTIME_TIMER_NUM 348*042d53a7SEvalZero #define MYNEWT_VAL_OS_CPUTIME_TIMER_NUM (5) 349*042d53a7SEvalZero #endif 350*042d53a7SEvalZero 351*042d53a7SEvalZero #ifndef MYNEWT_VAL_OS_CTX_SW_STACK_CHECK 352*042d53a7SEvalZero #define MYNEWT_VAL_OS_CTX_SW_STACK_CHECK (0) 353*042d53a7SEvalZero #endif 354*042d53a7SEvalZero 355*042d53a7SEvalZero #ifndef MYNEWT_VAL_OS_CTX_SW_STACK_GUARD 356*042d53a7SEvalZero #define MYNEWT_VAL_OS_CTX_SW_STACK_GUARD (4) 357*042d53a7SEvalZero #endif 358*042d53a7SEvalZero 359*042d53a7SEvalZero #ifndef MYNEWT_VAL_OS_MAIN_STACK_SIZE 360*042d53a7SEvalZero #define MYNEWT_VAL_OS_MAIN_STACK_SIZE (1024) 361*042d53a7SEvalZero #endif 362*042d53a7SEvalZero 363*042d53a7SEvalZero #ifndef MYNEWT_VAL_OS_MAIN_TASK_PRIO 364*042d53a7SEvalZero #define MYNEWT_VAL_OS_MAIN_TASK_PRIO (127) 365*042d53a7SEvalZero #endif 366*042d53a7SEvalZero 367*042d53a7SEvalZero #ifndef MYNEWT_VAL_OS_MEMPOOL_CHECK 368*042d53a7SEvalZero #define MYNEWT_VAL_OS_MEMPOOL_CHECK (0) 369*042d53a7SEvalZero #endif 370*042d53a7SEvalZero 371*042d53a7SEvalZero #ifndef MYNEWT_VAL_OS_MEMPOOL_POISON 372*042d53a7SEvalZero #define MYNEWT_VAL_OS_MEMPOOL_POISON (0) 373*042d53a7SEvalZero #endif 374*042d53a7SEvalZero 375*042d53a7SEvalZero #ifndef MYNEWT_VAL_OS_SCHEDULING 376*042d53a7SEvalZero #define MYNEWT_VAL_OS_SCHEDULING (1) 377*042d53a7SEvalZero #endif 378*042d53a7SEvalZero 379*042d53a7SEvalZero #ifndef MYNEWT_VAL_OS_SYSVIEW 380*042d53a7SEvalZero #define MYNEWT_VAL_OS_SYSVIEW (0) 381*042d53a7SEvalZero #endif 382*042d53a7SEvalZero 383*042d53a7SEvalZero #ifndef MYNEWT_VAL_SANITY_INTERVAL 384*042d53a7SEvalZero #define MYNEWT_VAL_SANITY_INTERVAL (15000) 385*042d53a7SEvalZero #endif 386*042d53a7SEvalZero 387*042d53a7SEvalZero #ifndef MYNEWT_VAL_WATCHDOG_INTERVAL 388*042d53a7SEvalZero #define MYNEWT_VAL_WATCHDOG_INTERVAL (30000) 389*042d53a7SEvalZero #endif 390*042d53a7SEvalZero 391*042d53a7SEvalZero /*** libc/baselibc */ 392*042d53a7SEvalZero #ifndef MYNEWT_VAL_BASELIBC_ASSERT_FILE_LINE 393*042d53a7SEvalZero #define MYNEWT_VAL_BASELIBC_ASSERT_FILE_LINE (0) 394*042d53a7SEvalZero #endif 395*042d53a7SEvalZero 396*042d53a7SEvalZero #ifndef MYNEWT_VAL_BASELIBC_PRESENT 397*042d53a7SEvalZero #define MYNEWT_VAL_BASELIBC_PRESENT (1) 398*042d53a7SEvalZero #endif 399*042d53a7SEvalZero 400*042d53a7SEvalZero /*** nimble */ 401*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_EXT_ADV 402*042d53a7SEvalZero #define MYNEWT_VAL_BLE_EXT_ADV (0) 403*042d53a7SEvalZero #endif 404*042d53a7SEvalZero 405*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_EXT_ADV_MAX_SIZE 406*042d53a7SEvalZero #define MYNEWT_VAL_BLE_EXT_ADV_MAX_SIZE (31) 407*042d53a7SEvalZero #endif 408*042d53a7SEvalZero 409*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_MAX_CONNECTIONS 410*042d53a7SEvalZero #define MYNEWT_VAL_BLE_MAX_CONNECTIONS (1) 411*042d53a7SEvalZero #endif 412*042d53a7SEvalZero 413*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_MULTI_ADV_INSTANCES 414*042d53a7SEvalZero #define MYNEWT_VAL_BLE_MULTI_ADV_INSTANCES (0) 415*042d53a7SEvalZero #endif 416*042d53a7SEvalZero 417*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_ROLE_BROADCASTER 418*042d53a7SEvalZero #define MYNEWT_VAL_BLE_ROLE_BROADCASTER (1) 419*042d53a7SEvalZero #endif 420*042d53a7SEvalZero 421*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_ROLE_CENTRAL 422*042d53a7SEvalZero #define MYNEWT_VAL_BLE_ROLE_CENTRAL (1) 423*042d53a7SEvalZero #endif 424*042d53a7SEvalZero 425*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_ROLE_OBSERVER 426*042d53a7SEvalZero #define MYNEWT_VAL_BLE_ROLE_OBSERVER (1) 427*042d53a7SEvalZero #endif 428*042d53a7SEvalZero 429*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_ROLE_PERIPHERAL 430*042d53a7SEvalZero #define MYNEWT_VAL_BLE_ROLE_PERIPHERAL (1) 431*042d53a7SEvalZero #endif 432*042d53a7SEvalZero 433*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_WHITELIST 434*042d53a7SEvalZero #define MYNEWT_VAL_BLE_WHITELIST (1) 435*042d53a7SEvalZero #endif 436*042d53a7SEvalZero 437*042d53a7SEvalZero /*** nimble/controller */ 438*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_DEVICE 439*042d53a7SEvalZero #define MYNEWT_VAL_BLE_DEVICE (1) 440*042d53a7SEvalZero #endif 441*042d53a7SEvalZero 442*042d53a7SEvalZero /* Overridden by nimble/controller (defined by nimble/controller) */ 443*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_HW_WHITELIST_ENABLE 444*042d53a7SEvalZero #define MYNEWT_VAL_BLE_HW_WHITELIST_ENABLE (0) 445*042d53a7SEvalZero #endif 446*042d53a7SEvalZero 447*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_LL_ADD_STRICT_SCHED_PERIODS 448*042d53a7SEvalZero #define MYNEWT_VAL_BLE_LL_ADD_STRICT_SCHED_PERIODS (0) 449*042d53a7SEvalZero #endif 450*042d53a7SEvalZero 451*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_LL_CFG_FEAT_CONN_PARAM_REQ 452*042d53a7SEvalZero #define MYNEWT_VAL_BLE_LL_CFG_FEAT_CONN_PARAM_REQ (1) 453*042d53a7SEvalZero #endif 454*042d53a7SEvalZero 455*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_LL_CFG_FEAT_DATA_LEN_EXT 456*042d53a7SEvalZero #define MYNEWT_VAL_BLE_LL_CFG_FEAT_DATA_LEN_EXT (1) 457*042d53a7SEvalZero #endif 458*042d53a7SEvalZero 459*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_LL_CFG_FEAT_EXT_SCAN_FILT 460*042d53a7SEvalZero #define MYNEWT_VAL_BLE_LL_CFG_FEAT_EXT_SCAN_FILT (0) 461*042d53a7SEvalZero #endif 462*042d53a7SEvalZero 463*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_LL_CFG_FEAT_LE_2M_PHY 464*042d53a7SEvalZero #define MYNEWT_VAL_BLE_LL_CFG_FEAT_LE_2M_PHY (0) 465*042d53a7SEvalZero #endif 466*042d53a7SEvalZero 467*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_LL_CFG_FEAT_LE_CODED_PHY 468*042d53a7SEvalZero #define MYNEWT_VAL_BLE_LL_CFG_FEAT_LE_CODED_PHY (0) 469*042d53a7SEvalZero #endif 470*042d53a7SEvalZero 471*042d53a7SEvalZero /* Overridden by nimble/controller (defined by nimble/controller) */ 472*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_LL_CFG_FEAT_LE_CSA2 473*042d53a7SEvalZero #define MYNEWT_VAL_BLE_LL_CFG_FEAT_LE_CSA2 (1) 474*042d53a7SEvalZero #endif 475*042d53a7SEvalZero 476*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_LL_CFG_FEAT_LE_ENCRYPTION 477*042d53a7SEvalZero #define MYNEWT_VAL_BLE_LL_CFG_FEAT_LE_ENCRYPTION (1) 478*042d53a7SEvalZero #endif 479*042d53a7SEvalZero 480*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_LL_CFG_FEAT_LE_PING 481*042d53a7SEvalZero #define MYNEWT_VAL_BLE_LL_CFG_FEAT_LE_PING (MYNEWT_VAL_BLE_LL_CFG_FEAT_LE_ENCRYPTION) 482*042d53a7SEvalZero #endif 483*042d53a7SEvalZero 484*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_LL_CFG_FEAT_LL_EXT_ADV 485*042d53a7SEvalZero #define MYNEWT_VAL_BLE_LL_CFG_FEAT_LL_EXT_ADV (MYNEWT_VAL_BLE_EXT_ADV) 486*042d53a7SEvalZero #endif 487*042d53a7SEvalZero 488*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_LL_CFG_FEAT_LL_PRIVACY 489*042d53a7SEvalZero #define MYNEWT_VAL_BLE_LL_CFG_FEAT_LL_PRIVACY (1) 490*042d53a7SEvalZero #endif 491*042d53a7SEvalZero 492*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_LL_CFG_FEAT_SLAVE_INIT_FEAT_XCHG 493*042d53a7SEvalZero #define MYNEWT_VAL_BLE_LL_CFG_FEAT_SLAVE_INIT_FEAT_XCHG (1) 494*042d53a7SEvalZero #endif 495*042d53a7SEvalZero 496*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_LL_CONN_INIT_MAX_TX_BYTES 497*042d53a7SEvalZero #define MYNEWT_VAL_BLE_LL_CONN_INIT_MAX_TX_BYTES (27) 498*042d53a7SEvalZero #endif 499*042d53a7SEvalZero 500*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_LL_CONN_INIT_MIN_WIN_OFFSET 501*042d53a7SEvalZero #define MYNEWT_VAL_BLE_LL_CONN_INIT_MIN_WIN_OFFSET (0) 502*042d53a7SEvalZero #endif 503*042d53a7SEvalZero 504*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_LL_CONN_INIT_SLOTS 505*042d53a7SEvalZero #define MYNEWT_VAL_BLE_LL_CONN_INIT_SLOTS (4) 506*042d53a7SEvalZero #endif 507*042d53a7SEvalZero 508*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_LL_DIRECT_TEST_MODE 509*042d53a7SEvalZero #define MYNEWT_VAL_BLE_LL_DIRECT_TEST_MODE (0) 510*042d53a7SEvalZero #endif 511*042d53a7SEvalZero 512*042d53a7SEvalZero /* Overridden by nimble/controller (defined by nimble/controller) */ 513*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_LL_EXT_ADV_AUX_PTR_CNT 514*042d53a7SEvalZero #define MYNEWT_VAL_BLE_LL_EXT_ADV_AUX_PTR_CNT (5) 515*042d53a7SEvalZero #endif 516*042d53a7SEvalZero 517*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_LL_MASTER_SCA 518*042d53a7SEvalZero #define MYNEWT_VAL_BLE_LL_MASTER_SCA (4) 519*042d53a7SEvalZero #endif 520*042d53a7SEvalZero 521*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_LL_MAX_PKT_SIZE 522*042d53a7SEvalZero #define MYNEWT_VAL_BLE_LL_MAX_PKT_SIZE (251) 523*042d53a7SEvalZero #endif 524*042d53a7SEvalZero 525*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_LL_MFRG_ID 526*042d53a7SEvalZero #define MYNEWT_VAL_BLE_LL_MFRG_ID (0xFFFF) 527*042d53a7SEvalZero #endif 528*042d53a7SEvalZero 529*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_LL_NUM_SCAN_DUP_ADVS 530*042d53a7SEvalZero #define MYNEWT_VAL_BLE_LL_NUM_SCAN_DUP_ADVS (8) 531*042d53a7SEvalZero #endif 532*042d53a7SEvalZero 533*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_LL_NUM_SCAN_RSP_ADVS 534*042d53a7SEvalZero #define MYNEWT_VAL_BLE_LL_NUM_SCAN_RSP_ADVS (8) 535*042d53a7SEvalZero #endif 536*042d53a7SEvalZero 537*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_LL_OUR_SCA 538*042d53a7SEvalZero #define MYNEWT_VAL_BLE_LL_OUR_SCA (60) 539*042d53a7SEvalZero #endif 540*042d53a7SEvalZero 541*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_LL_PRIO 542*042d53a7SEvalZero #define MYNEWT_VAL_BLE_LL_PRIO (0) 543*042d53a7SEvalZero #endif 544*042d53a7SEvalZero 545*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_LL_RESOLV_LIST_SIZE 546*042d53a7SEvalZero #define MYNEWT_VAL_BLE_LL_RESOLV_LIST_SIZE (4) 547*042d53a7SEvalZero #endif 548*042d53a7SEvalZero 549*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_LL_RNG_BUFSIZE 550*042d53a7SEvalZero #define MYNEWT_VAL_BLE_LL_RNG_BUFSIZE (32) 551*042d53a7SEvalZero #endif 552*042d53a7SEvalZero 553*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_LL_STRICT_CONN_SCHEDULING 554*042d53a7SEvalZero #define MYNEWT_VAL_BLE_LL_STRICT_CONN_SCHEDULING (0) 555*042d53a7SEvalZero #endif 556*042d53a7SEvalZero 557*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_LL_SUPP_MAX_RX_BYTES 558*042d53a7SEvalZero #define MYNEWT_VAL_BLE_LL_SUPP_MAX_RX_BYTES (MYNEWT_VAL_BLE_LL_MAX_PKT_SIZE) 559*042d53a7SEvalZero #endif 560*042d53a7SEvalZero 561*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_LL_SUPP_MAX_TX_BYTES 562*042d53a7SEvalZero #define MYNEWT_VAL_BLE_LL_SUPP_MAX_TX_BYTES (MYNEWT_VAL_BLE_LL_MAX_PKT_SIZE) 563*042d53a7SEvalZero #endif 564*042d53a7SEvalZero 565*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_LL_TX_PWR_DBM 566*042d53a7SEvalZero #define MYNEWT_VAL_BLE_LL_TX_PWR_DBM (0) 567*042d53a7SEvalZero #endif 568*042d53a7SEvalZero 569*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_LL_USECS_PER_PERIOD 570*042d53a7SEvalZero #define MYNEWT_VAL_BLE_LL_USECS_PER_PERIOD (3250) 571*042d53a7SEvalZero #endif 572*042d53a7SEvalZero 573*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_LL_WHITELIST_SIZE 574*042d53a7SEvalZero #define MYNEWT_VAL_BLE_LL_WHITELIST_SIZE (8) 575*042d53a7SEvalZero #endif 576*042d53a7SEvalZero 577*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_LP_CLOCK 578*042d53a7SEvalZero #define MYNEWT_VAL_BLE_LP_CLOCK (1) 579*042d53a7SEvalZero #endif 580*042d53a7SEvalZero 581*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_NUM_COMP_PKT_RATE 582*042d53a7SEvalZero #define MYNEWT_VAL_BLE_NUM_COMP_PKT_RATE ((2 * 128)) /* XXX */ 583*042d53a7SEvalZero #endif 584*042d53a7SEvalZero 585*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_PUBLIC_DEV_ADDR 586*042d53a7SEvalZero #define MYNEWT_VAL_BLE_PUBLIC_DEV_ADDR ((uint8_t[6]){0x00, 0x00, 0x00, 0x00, 0x00, 0x00}) 587*042d53a7SEvalZero #endif 588*042d53a7SEvalZero 589*042d53a7SEvalZero /* Overridden by hw/bsp/nrf52840pdk (defined by nimble/controller) */ 590*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_XTAL_SETTLE_TIME 591*042d53a7SEvalZero #define MYNEWT_VAL_BLE_XTAL_SETTLE_TIME (1500) 592*042d53a7SEvalZero #endif 593*042d53a7SEvalZero 594*042d53a7SEvalZero /*** nimble/drivers/nrf52 */ 595*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_PHY_CODED_RX_IFS_EXTRA_MARGIN 596*042d53a7SEvalZero #define MYNEWT_VAL_BLE_PHY_CODED_RX_IFS_EXTRA_MARGIN (0) 597*042d53a7SEvalZero #endif 598*042d53a7SEvalZero 599*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_PHY_DBG_TIME_ADDRESS_END_PIN 600*042d53a7SEvalZero #define MYNEWT_VAL_BLE_PHY_DBG_TIME_ADDRESS_END_PIN (-1) 601*042d53a7SEvalZero #endif 602*042d53a7SEvalZero 603*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_PHY_DBG_TIME_TXRXEN_READY_PIN 604*042d53a7SEvalZero #define MYNEWT_VAL_BLE_PHY_DBG_TIME_TXRXEN_READY_PIN (-1) 605*042d53a7SEvalZero #endif 606*042d53a7SEvalZero 607*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_PHY_DBG_TIME_WFR_PIN 608*042d53a7SEvalZero #define MYNEWT_VAL_BLE_PHY_DBG_TIME_WFR_PIN (-1) 609*042d53a7SEvalZero #endif 610*042d53a7SEvalZero 611*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_PHY_NRF52840_ERRATA_164 612*042d53a7SEvalZero #define MYNEWT_VAL_BLE_PHY_NRF52840_ERRATA_164 (0) 613*042d53a7SEvalZero #endif 614*042d53a7SEvalZero 615*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_PHY_NRF52840_ERRATA_191 616*042d53a7SEvalZero #define MYNEWT_VAL_BLE_PHY_NRF52840_ERRATA_191 (1) 617*042d53a7SEvalZero #endif 618*042d53a7SEvalZero 619*042d53a7SEvalZero /*** nimble/host */ 620*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_ATT_PREFERRED_MTU 621*042d53a7SEvalZero #define MYNEWT_VAL_BLE_ATT_PREFERRED_MTU (256) 622*042d53a7SEvalZero #endif 623*042d53a7SEvalZero 624*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_ATT_SVR_FIND_INFO 625*042d53a7SEvalZero #define MYNEWT_VAL_BLE_ATT_SVR_FIND_INFO (1) 626*042d53a7SEvalZero #endif 627*042d53a7SEvalZero 628*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_ATT_SVR_FIND_TYPE 629*042d53a7SEvalZero #define MYNEWT_VAL_BLE_ATT_SVR_FIND_TYPE (1) 630*042d53a7SEvalZero #endif 631*042d53a7SEvalZero 632*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_ATT_SVR_INDICATE 633*042d53a7SEvalZero #define MYNEWT_VAL_BLE_ATT_SVR_INDICATE (1) 634*042d53a7SEvalZero #endif 635*042d53a7SEvalZero 636*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_ATT_SVR_MAX_PREP_ENTRIES 637*042d53a7SEvalZero #define MYNEWT_VAL_BLE_ATT_SVR_MAX_PREP_ENTRIES (64) 638*042d53a7SEvalZero #endif 639*042d53a7SEvalZero 640*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_ATT_SVR_NOTIFY 641*042d53a7SEvalZero #define MYNEWT_VAL_BLE_ATT_SVR_NOTIFY (1) 642*042d53a7SEvalZero #endif 643*042d53a7SEvalZero 644*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_ATT_SVR_QUEUED_WRITE 645*042d53a7SEvalZero #define MYNEWT_VAL_BLE_ATT_SVR_QUEUED_WRITE (1) 646*042d53a7SEvalZero #endif 647*042d53a7SEvalZero 648*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_ATT_SVR_QUEUED_WRITE_TMO 649*042d53a7SEvalZero #define MYNEWT_VAL_BLE_ATT_SVR_QUEUED_WRITE_TMO (30000) 650*042d53a7SEvalZero #endif 651*042d53a7SEvalZero 652*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_ATT_SVR_READ 653*042d53a7SEvalZero #define MYNEWT_VAL_BLE_ATT_SVR_READ (1) 654*042d53a7SEvalZero #endif 655*042d53a7SEvalZero 656*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_ATT_SVR_READ_BLOB 657*042d53a7SEvalZero #define MYNEWT_VAL_BLE_ATT_SVR_READ_BLOB (1) 658*042d53a7SEvalZero #endif 659*042d53a7SEvalZero 660*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_ATT_SVR_READ_GROUP_TYPE 661*042d53a7SEvalZero #define MYNEWT_VAL_BLE_ATT_SVR_READ_GROUP_TYPE (1) 662*042d53a7SEvalZero #endif 663*042d53a7SEvalZero 664*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_ATT_SVR_READ_MULT 665*042d53a7SEvalZero #define MYNEWT_VAL_BLE_ATT_SVR_READ_MULT (1) 666*042d53a7SEvalZero #endif 667*042d53a7SEvalZero 668*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_ATT_SVR_READ_TYPE 669*042d53a7SEvalZero #define MYNEWT_VAL_BLE_ATT_SVR_READ_TYPE (1) 670*042d53a7SEvalZero #endif 671*042d53a7SEvalZero 672*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_ATT_SVR_SIGNED_WRITE 673*042d53a7SEvalZero #define MYNEWT_VAL_BLE_ATT_SVR_SIGNED_WRITE (1) 674*042d53a7SEvalZero #endif 675*042d53a7SEvalZero 676*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_ATT_SVR_WRITE 677*042d53a7SEvalZero #define MYNEWT_VAL_BLE_ATT_SVR_WRITE (1) 678*042d53a7SEvalZero #endif 679*042d53a7SEvalZero 680*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_ATT_SVR_WRITE_NO_RSP 681*042d53a7SEvalZero #define MYNEWT_VAL_BLE_ATT_SVR_WRITE_NO_RSP (1) 682*042d53a7SEvalZero #endif 683*042d53a7SEvalZero 684*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_GAP_MAX_PENDING_CONN_PARAM_UPDATE 685*042d53a7SEvalZero #define MYNEWT_VAL_BLE_GAP_MAX_PENDING_CONN_PARAM_UPDATE (1) 686*042d53a7SEvalZero #endif 687*042d53a7SEvalZero 688*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_GATT_DISC_ALL_CHRS 689*042d53a7SEvalZero #define MYNEWT_VAL_BLE_GATT_DISC_ALL_CHRS (MYNEWT_VAL_BLE_ROLE_CENTRAL) 690*042d53a7SEvalZero #endif 691*042d53a7SEvalZero 692*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_GATT_DISC_ALL_DSCS 693*042d53a7SEvalZero #define MYNEWT_VAL_BLE_GATT_DISC_ALL_DSCS (MYNEWT_VAL_BLE_ROLE_CENTRAL) 694*042d53a7SEvalZero #endif 695*042d53a7SEvalZero 696*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_GATT_DISC_ALL_SVCS 697*042d53a7SEvalZero #define MYNEWT_VAL_BLE_GATT_DISC_ALL_SVCS (MYNEWT_VAL_BLE_ROLE_CENTRAL) 698*042d53a7SEvalZero #endif 699*042d53a7SEvalZero 700*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_GATT_DISC_CHR_UUID 701*042d53a7SEvalZero #define MYNEWT_VAL_BLE_GATT_DISC_CHR_UUID (MYNEWT_VAL_BLE_ROLE_CENTRAL) 702*042d53a7SEvalZero #endif 703*042d53a7SEvalZero 704*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_GATT_DISC_SVC_UUID 705*042d53a7SEvalZero #define MYNEWT_VAL_BLE_GATT_DISC_SVC_UUID (MYNEWT_VAL_BLE_ROLE_CENTRAL) 706*042d53a7SEvalZero #endif 707*042d53a7SEvalZero 708*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_GATT_FIND_INC_SVCS 709*042d53a7SEvalZero #define MYNEWT_VAL_BLE_GATT_FIND_INC_SVCS (MYNEWT_VAL_BLE_ROLE_CENTRAL) 710*042d53a7SEvalZero #endif 711*042d53a7SEvalZero 712*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_GATT_INDICATE 713*042d53a7SEvalZero #define MYNEWT_VAL_BLE_GATT_INDICATE (1) 714*042d53a7SEvalZero #endif 715*042d53a7SEvalZero 716*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_GATT_MAX_PROCS 717*042d53a7SEvalZero #define MYNEWT_VAL_BLE_GATT_MAX_PROCS (4) 718*042d53a7SEvalZero #endif 719*042d53a7SEvalZero 720*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_GATT_NOTIFY 721*042d53a7SEvalZero #define MYNEWT_VAL_BLE_GATT_NOTIFY (1) 722*042d53a7SEvalZero #endif 723*042d53a7SEvalZero 724*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_GATT_READ 725*042d53a7SEvalZero #define MYNEWT_VAL_BLE_GATT_READ (MYNEWT_VAL_BLE_ROLE_CENTRAL) 726*042d53a7SEvalZero #endif 727*042d53a7SEvalZero 728*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_GATT_READ_LONG 729*042d53a7SEvalZero #define MYNEWT_VAL_BLE_GATT_READ_LONG (MYNEWT_VAL_BLE_ROLE_CENTRAL) 730*042d53a7SEvalZero #endif 731*042d53a7SEvalZero 732*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_GATT_READ_MAX_ATTRS 733*042d53a7SEvalZero #define MYNEWT_VAL_BLE_GATT_READ_MAX_ATTRS (8) 734*042d53a7SEvalZero #endif 735*042d53a7SEvalZero 736*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_GATT_READ_MULT 737*042d53a7SEvalZero #define MYNEWT_VAL_BLE_GATT_READ_MULT (MYNEWT_VAL_BLE_ROLE_CENTRAL) 738*042d53a7SEvalZero #endif 739*042d53a7SEvalZero 740*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_GATT_READ_UUID 741*042d53a7SEvalZero #define MYNEWT_VAL_BLE_GATT_READ_UUID (MYNEWT_VAL_BLE_ROLE_CENTRAL) 742*042d53a7SEvalZero #endif 743*042d53a7SEvalZero 744*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_GATT_RESUME_RATE 745*042d53a7SEvalZero #define MYNEWT_VAL_BLE_GATT_RESUME_RATE (1000) 746*042d53a7SEvalZero #endif 747*042d53a7SEvalZero 748*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_GATT_SIGNED_WRITE 749*042d53a7SEvalZero #define MYNEWT_VAL_BLE_GATT_SIGNED_WRITE (MYNEWT_VAL_BLE_ROLE_CENTRAL) 750*042d53a7SEvalZero #endif 751*042d53a7SEvalZero 752*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_GATT_WRITE 753*042d53a7SEvalZero #define MYNEWT_VAL_BLE_GATT_WRITE (MYNEWT_VAL_BLE_ROLE_CENTRAL) 754*042d53a7SEvalZero #endif 755*042d53a7SEvalZero 756*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_GATT_WRITE_LONG 757*042d53a7SEvalZero #define MYNEWT_VAL_BLE_GATT_WRITE_LONG (MYNEWT_VAL_BLE_ROLE_CENTRAL) 758*042d53a7SEvalZero #endif 759*042d53a7SEvalZero 760*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_GATT_WRITE_MAX_ATTRS 761*042d53a7SEvalZero #define MYNEWT_VAL_BLE_GATT_WRITE_MAX_ATTRS (4) 762*042d53a7SEvalZero #endif 763*042d53a7SEvalZero 764*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_GATT_WRITE_NO_RSP 765*042d53a7SEvalZero #define MYNEWT_VAL_BLE_GATT_WRITE_NO_RSP (MYNEWT_VAL_BLE_ROLE_CENTRAL) 766*042d53a7SEvalZero #endif 767*042d53a7SEvalZero 768*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_GATT_WRITE_RELIABLE 769*042d53a7SEvalZero #define MYNEWT_VAL_BLE_GATT_WRITE_RELIABLE (MYNEWT_VAL_BLE_ROLE_CENTRAL) 770*042d53a7SEvalZero #endif 771*042d53a7SEvalZero 772*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_HOST 773*042d53a7SEvalZero #define MYNEWT_VAL_BLE_HOST (1) 774*042d53a7SEvalZero #endif 775*042d53a7SEvalZero 776*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_HS_DEBUG 777*042d53a7SEvalZero #define MYNEWT_VAL_BLE_HS_DEBUG (0) 778*042d53a7SEvalZero #endif 779*042d53a7SEvalZero 780*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_HS_AUTO_START 781*042d53a7SEvalZero #define MYNEWT_VAL_BLE_HS_AUTO_START (1) 782*042d53a7SEvalZero #endif 783*042d53a7SEvalZero 784*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_HS_FLOW_CTRL 785*042d53a7SEvalZero #define MYNEWT_VAL_BLE_HS_FLOW_CTRL (0) 786*042d53a7SEvalZero #endif 787*042d53a7SEvalZero 788*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_HS_FLOW_CTRL_ITVL 789*042d53a7SEvalZero #define MYNEWT_VAL_BLE_HS_FLOW_CTRL_ITVL (1000) 790*042d53a7SEvalZero #endif 791*042d53a7SEvalZero 792*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_HS_FLOW_CTRL_THRESH 793*042d53a7SEvalZero #define MYNEWT_VAL_BLE_HS_FLOW_CTRL_THRESH (2) 794*042d53a7SEvalZero #endif 795*042d53a7SEvalZero 796*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_HS_FLOW_CTRL_TX_ON_DISCONNECT 797*042d53a7SEvalZero #define MYNEWT_VAL_BLE_HS_FLOW_CTRL_TX_ON_DISCONNECT (0) 798*042d53a7SEvalZero #endif 799*042d53a7SEvalZero 800*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_HS_PHONY_HCI_ACKS 801*042d53a7SEvalZero #define MYNEWT_VAL_BLE_HS_PHONY_HCI_ACKS (0) 802*042d53a7SEvalZero #endif 803*042d53a7SEvalZero 804*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_HS_REQUIRE_OS 805*042d53a7SEvalZero #define MYNEWT_VAL_BLE_HS_REQUIRE_OS (1) 806*042d53a7SEvalZero #endif 807*042d53a7SEvalZero 808*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_L2CAP_COC_MAX_NUM 809*042d53a7SEvalZero #define MYNEWT_VAL_BLE_L2CAP_COC_MAX_NUM (0) 810*042d53a7SEvalZero #endif 811*042d53a7SEvalZero 812*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_L2CAP_JOIN_RX_FRAGS 813*042d53a7SEvalZero #define MYNEWT_VAL_BLE_L2CAP_JOIN_RX_FRAGS (1) 814*042d53a7SEvalZero #endif 815*042d53a7SEvalZero 816*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_L2CAP_MAX_CHANS 817*042d53a7SEvalZero #define MYNEWT_VAL_BLE_L2CAP_MAX_CHANS (3*MYNEWT_VAL_BLE_MAX_CONNECTIONS) 818*042d53a7SEvalZero #endif 819*042d53a7SEvalZero 820*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_L2CAP_RX_FRAG_TIMEOUT 821*042d53a7SEvalZero #define MYNEWT_VAL_BLE_L2CAP_RX_FRAG_TIMEOUT (30000) 822*042d53a7SEvalZero #endif 823*042d53a7SEvalZero 824*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_L2CAP_SIG_MAX_PROCS 825*042d53a7SEvalZero #define MYNEWT_VAL_BLE_L2CAP_SIG_MAX_PROCS (1) 826*042d53a7SEvalZero #endif 827*042d53a7SEvalZero 828*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_MESH 829*042d53a7SEvalZero #define MYNEWT_VAL_BLE_MESH (0) 830*042d53a7SEvalZero #endif 831*042d53a7SEvalZero 832*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_MONITOR_CONSOLE_BUFFER_SIZE 833*042d53a7SEvalZero #define MYNEWT_VAL_BLE_MONITOR_CONSOLE_BUFFER_SIZE (128) 834*042d53a7SEvalZero #endif 835*042d53a7SEvalZero 836*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_MONITOR_RTT 837*042d53a7SEvalZero #define MYNEWT_VAL_BLE_MONITOR_RTT (0) 838*042d53a7SEvalZero #endif 839*042d53a7SEvalZero 840*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_MONITOR_RTT_BUFFERED 841*042d53a7SEvalZero #define MYNEWT_VAL_BLE_MONITOR_RTT_BUFFERED (1) 842*042d53a7SEvalZero #endif 843*042d53a7SEvalZero 844*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_MONITOR_RTT_BUFFER_NAME 845*042d53a7SEvalZero #define MYNEWT_VAL_BLE_MONITOR_RTT_BUFFER_NAME ("monitor") 846*042d53a7SEvalZero #endif 847*042d53a7SEvalZero 848*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_MONITOR_RTT_BUFFER_SIZE 849*042d53a7SEvalZero #define MYNEWT_VAL_BLE_MONITOR_RTT_BUFFER_SIZE (256) 850*042d53a7SEvalZero #endif 851*042d53a7SEvalZero 852*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_MONITOR_UART 853*042d53a7SEvalZero #define MYNEWT_VAL_BLE_MONITOR_UART (0) 854*042d53a7SEvalZero #endif 855*042d53a7SEvalZero 856*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_MONITOR_UART_BAUDRATE 857*042d53a7SEvalZero #define MYNEWT_VAL_BLE_MONITOR_UART_BAUDRATE (1000000) 858*042d53a7SEvalZero #endif 859*042d53a7SEvalZero 860*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_MONITOR_UART_BUFFER_SIZE 861*042d53a7SEvalZero #define MYNEWT_VAL_BLE_MONITOR_UART_BUFFER_SIZE (64) 862*042d53a7SEvalZero #endif 863*042d53a7SEvalZero 864*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_MONITOR_UART_DEV 865*042d53a7SEvalZero #define MYNEWT_VAL_BLE_MONITOR_UART_DEV ("uart0") 866*042d53a7SEvalZero #endif 867*042d53a7SEvalZero 868*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_RPA_TIMEOUT 869*042d53a7SEvalZero #define MYNEWT_VAL_BLE_RPA_TIMEOUT (300) 870*042d53a7SEvalZero #endif 871*042d53a7SEvalZero 872*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_SM_BONDING 873*042d53a7SEvalZero #define MYNEWT_VAL_BLE_SM_BONDING (0) 874*042d53a7SEvalZero #endif 875*042d53a7SEvalZero 876*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_SM_IO_CAP 877*042d53a7SEvalZero #define MYNEWT_VAL_BLE_SM_IO_CAP (BLE_HS_IO_NO_INPUT_OUTPUT) 878*042d53a7SEvalZero #endif 879*042d53a7SEvalZero 880*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_SM_KEYPRESS 881*042d53a7SEvalZero #define MYNEWT_VAL_BLE_SM_KEYPRESS (0) 882*042d53a7SEvalZero #endif 883*042d53a7SEvalZero 884*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_SM_LEGACY 885*042d53a7SEvalZero #define MYNEWT_VAL_BLE_SM_LEGACY (1) 886*042d53a7SEvalZero #endif 887*042d53a7SEvalZero 888*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_SM_MAX_PROCS 889*042d53a7SEvalZero #define MYNEWT_VAL_BLE_SM_MAX_PROCS (1) 890*042d53a7SEvalZero #endif 891*042d53a7SEvalZero 892*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_SM_MITM 893*042d53a7SEvalZero #define MYNEWT_VAL_BLE_SM_MITM (0) 894*042d53a7SEvalZero #endif 895*042d53a7SEvalZero 896*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_SM_OOB_DATA_FLAG 897*042d53a7SEvalZero #define MYNEWT_VAL_BLE_SM_OOB_DATA_FLAG (0) 898*042d53a7SEvalZero #endif 899*042d53a7SEvalZero 900*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_SM_OUR_KEY_DIST 901*042d53a7SEvalZero #define MYNEWT_VAL_BLE_SM_OUR_KEY_DIST (0) 902*042d53a7SEvalZero #endif 903*042d53a7SEvalZero 904*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_SM_SC 905*042d53a7SEvalZero #define MYNEWT_VAL_BLE_SM_SC (0) 906*042d53a7SEvalZero #endif 907*042d53a7SEvalZero 908*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_SM_THEIR_KEY_DIST 909*042d53a7SEvalZero #define MYNEWT_VAL_BLE_SM_THEIR_KEY_DIST (0) 910*042d53a7SEvalZero #endif 911*042d53a7SEvalZero 912*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_STORE_MAX_BONDS 913*042d53a7SEvalZero #define MYNEWT_VAL_BLE_STORE_MAX_BONDS (3) 914*042d53a7SEvalZero #endif 915*042d53a7SEvalZero 916*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_STORE_MAX_CCCDS 917*042d53a7SEvalZero #define MYNEWT_VAL_BLE_STORE_MAX_CCCDS (8) 918*042d53a7SEvalZero #endif 919*042d53a7SEvalZero 920*042d53a7SEvalZero /*** nimble/host/services/ans */ 921*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_SVC_ANS_NEW_ALERT_CAT 922*042d53a7SEvalZero #define MYNEWT_VAL_BLE_SVC_ANS_NEW_ALERT_CAT (0) 923*042d53a7SEvalZero #endif 924*042d53a7SEvalZero 925*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_SVC_ANS_UNR_ALERT_CAT 926*042d53a7SEvalZero #define MYNEWT_VAL_BLE_SVC_ANS_UNR_ALERT_CAT (0) 927*042d53a7SEvalZero #endif 928*042d53a7SEvalZero 929*042d53a7SEvalZero /*** nimble/host/services/bas */ 930*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_SVC_BAS_BATTERY_LEVEL_NOTIFY_ENABLE 931*042d53a7SEvalZero #define MYNEWT_VAL_BLE_SVC_BAS_BATTERY_LEVEL_NOTIFY_ENABLE (1) 932*042d53a7SEvalZero #endif 933*042d53a7SEvalZero 934*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_SVC_BAS_BATTERY_LEVEL_READ_PERM 935*042d53a7SEvalZero #define MYNEWT_VAL_BLE_SVC_BAS_BATTERY_LEVEL_READ_PERM (0) 936*042d53a7SEvalZero #endif 937*042d53a7SEvalZero 938*042d53a7SEvalZero /*** nimble/host/services/gap */ 939*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_SVC_GAP_APPEARANCE 940*042d53a7SEvalZero #define MYNEWT_VAL_BLE_SVC_GAP_APPEARANCE (0) 941*042d53a7SEvalZero #endif 942*042d53a7SEvalZero 943*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_SVC_GAP_APPEARANCE_WRITE_PERM 944*042d53a7SEvalZero #define MYNEWT_VAL_BLE_SVC_GAP_APPEARANCE_WRITE_PERM (-1) 945*042d53a7SEvalZero #endif 946*042d53a7SEvalZero 947*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_SVC_GAP_CENTRAL_ADDRESS_RESOLUTION 948*042d53a7SEvalZero #define MYNEWT_VAL_BLE_SVC_GAP_CENTRAL_ADDRESS_RESOLUTION (-1) 949*042d53a7SEvalZero #endif 950*042d53a7SEvalZero 951*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_SVC_GAP_DEVICE_NAME 952*042d53a7SEvalZero #define MYNEWT_VAL_BLE_SVC_GAP_DEVICE_NAME ("nimble") 953*042d53a7SEvalZero #endif 954*042d53a7SEvalZero 955*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_SVC_GAP_DEVICE_NAME_MAX_LENGTH 956*042d53a7SEvalZero #define MYNEWT_VAL_BLE_SVC_GAP_DEVICE_NAME_MAX_LENGTH (31) 957*042d53a7SEvalZero #endif 958*042d53a7SEvalZero 959*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_SVC_GAP_DEVICE_NAME_WRITE_PERM 960*042d53a7SEvalZero #define MYNEWT_VAL_BLE_SVC_GAP_DEVICE_NAME_WRITE_PERM (-1) 961*042d53a7SEvalZero #endif 962*042d53a7SEvalZero 963*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_SVC_GAP_PPCP_MAX_CONN_INTERVAL 964*042d53a7SEvalZero #define MYNEWT_VAL_BLE_SVC_GAP_PPCP_MAX_CONN_INTERVAL (0) 965*042d53a7SEvalZero #endif 966*042d53a7SEvalZero 967*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_SVC_GAP_PPCP_MIN_CONN_INTERVAL 968*042d53a7SEvalZero #define MYNEWT_VAL_BLE_SVC_GAP_PPCP_MIN_CONN_INTERVAL (0) 969*042d53a7SEvalZero #endif 970*042d53a7SEvalZero 971*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_SVC_GAP_PPCP_SLAVE_LATENCY 972*042d53a7SEvalZero #define MYNEWT_VAL_BLE_SVC_GAP_PPCP_SLAVE_LATENCY (0) 973*042d53a7SEvalZero #endif 974*042d53a7SEvalZero 975*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_SVC_GAP_PPCP_SUPERVISION_TMO 976*042d53a7SEvalZero #define MYNEWT_VAL_BLE_SVC_GAP_PPCP_SUPERVISION_TMO (0) 977*042d53a7SEvalZero #endif 978*042d53a7SEvalZero 979*042d53a7SEvalZero /*** nimble/transport */ 980*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_HCI_TRANSPORT_EMSPI 981*042d53a7SEvalZero #define MYNEWT_VAL_BLE_HCI_TRANSPORT_EMSPI (0) 982*042d53a7SEvalZero #endif 983*042d53a7SEvalZero 984*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_HCI_TRANSPORT_NIMBLE_BUILTIN 985*042d53a7SEvalZero #define MYNEWT_VAL_BLE_HCI_TRANSPORT_NIMBLE_BUILTIN (1) 986*042d53a7SEvalZero #endif 987*042d53a7SEvalZero 988*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_HCI_TRANSPORT_RAM 989*042d53a7SEvalZero #define MYNEWT_VAL_BLE_HCI_TRANSPORT_RAM (0) 990*042d53a7SEvalZero #endif 991*042d53a7SEvalZero 992*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_HCI_TRANSPORT_SOCKET 993*042d53a7SEvalZero #define MYNEWT_VAL_BLE_HCI_TRANSPORT_SOCKET (0) 994*042d53a7SEvalZero #endif 995*042d53a7SEvalZero 996*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_HCI_TRANSPORT_UART 997*042d53a7SEvalZero #define MYNEWT_VAL_BLE_HCI_TRANSPORT_UART (0) 998*042d53a7SEvalZero #endif 999*042d53a7SEvalZero 1000*042d53a7SEvalZero /*** nimble/transport/ram */ 1001*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_ACL_BUF_COUNT 1002*042d53a7SEvalZero #define MYNEWT_VAL_BLE_ACL_BUF_COUNT (4) 1003*042d53a7SEvalZero #endif 1004*042d53a7SEvalZero 1005*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_ACL_BUF_SIZE 1006*042d53a7SEvalZero #define MYNEWT_VAL_BLE_ACL_BUF_SIZE (255) 1007*042d53a7SEvalZero #endif 1008*042d53a7SEvalZero 1009*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_HCI_EVT_BUF_SIZE 1010*042d53a7SEvalZero #define MYNEWT_VAL_BLE_HCI_EVT_BUF_SIZE (70) 1011*042d53a7SEvalZero #endif 1012*042d53a7SEvalZero 1013*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_HCI_EVT_HI_BUF_COUNT 1014*042d53a7SEvalZero #define MYNEWT_VAL_BLE_HCI_EVT_HI_BUF_COUNT (2) 1015*042d53a7SEvalZero #endif 1016*042d53a7SEvalZero 1017*042d53a7SEvalZero #ifndef MYNEWT_VAL_BLE_HCI_EVT_LO_BUF_COUNT 1018*042d53a7SEvalZero #define MYNEWT_VAL_BLE_HCI_EVT_LO_BUF_COUNT (8) 1019*042d53a7SEvalZero #endif 1020*042d53a7SEvalZero 1021*042d53a7SEvalZero /*** sys/console/stub */ 1022*042d53a7SEvalZero #ifndef MYNEWT_VAL_CONSOLE_UART_BAUD 1023*042d53a7SEvalZero #define MYNEWT_VAL_CONSOLE_UART_BAUD (115200) 1024*042d53a7SEvalZero #endif 1025*042d53a7SEvalZero 1026*042d53a7SEvalZero #ifndef MYNEWT_VAL_CONSOLE_UART_DEV 1027*042d53a7SEvalZero #define MYNEWT_VAL_CONSOLE_UART_DEV ("uart0") 1028*042d53a7SEvalZero #endif 1029*042d53a7SEvalZero 1030*042d53a7SEvalZero #ifndef MYNEWT_VAL_CONSOLE_UART_FLOW_CONTROL 1031*042d53a7SEvalZero #define MYNEWT_VAL_CONSOLE_UART_FLOW_CONTROL (UART_FLOW_CTL_NONE) 1032*042d53a7SEvalZero #endif 1033*042d53a7SEvalZero 1034*042d53a7SEvalZero /*** sys/flash_map */ 1035*042d53a7SEvalZero #ifndef MYNEWT_VAL_FLASH_MAP_MAX_AREAS 1036*042d53a7SEvalZero #define MYNEWT_VAL_FLASH_MAP_MAX_AREAS (10) 1037*042d53a7SEvalZero #endif 1038*042d53a7SEvalZero 1039*042d53a7SEvalZero /*** sys/log/stub */ 1040*042d53a7SEvalZero #ifndef MYNEWT_VAL_LOG_CONSOLE 1041*042d53a7SEvalZero #define MYNEWT_VAL_LOG_CONSOLE (1) 1042*042d53a7SEvalZero #endif 1043*042d53a7SEvalZero 1044*042d53a7SEvalZero #ifndef MYNEWT_VAL_LOG_FCB 1045*042d53a7SEvalZero #define MYNEWT_VAL_LOG_FCB (0) 1046*042d53a7SEvalZero #endif 1047*042d53a7SEvalZero 1048*042d53a7SEvalZero #ifndef MYNEWT_VAL_LOG_LEVEL 1049*042d53a7SEvalZero #define MYNEWT_VAL_LOG_LEVEL (255) 1050*042d53a7SEvalZero #endif 1051*042d53a7SEvalZero 1052*042d53a7SEvalZero /*** sys/sysinit */ 1053*042d53a7SEvalZero #ifndef MYNEWT_VAL_SYSINIT_CONSTRAIN_INIT 1054*042d53a7SEvalZero #define MYNEWT_VAL_SYSINIT_CONSTRAIN_INIT (1) 1055*042d53a7SEvalZero #endif 1056*042d53a7SEvalZero 1057*042d53a7SEvalZero #ifndef MYNEWT_VAL_SYSINIT_PANIC_FILE_LINE 1058*042d53a7SEvalZero #define MYNEWT_VAL_SYSINIT_PANIC_FILE_LINE (0) 1059*042d53a7SEvalZero #endif 1060*042d53a7SEvalZero 1061*042d53a7SEvalZero #ifndef MYNEWT_VAL_SYSINIT_PANIC_MESSAGE 1062*042d53a7SEvalZero #define MYNEWT_VAL_SYSINIT_PANIC_MESSAGE (0) 1063*042d53a7SEvalZero #endif 1064*042d53a7SEvalZero 1065*042d53a7SEvalZero #endif 1066