xref: /nrf52832-nimble/nordic/nrfx/templates/nrfx_glue.c (revision 150812a83cab50279bd772ef6db1bfaf255f2c5b) 
1*150812a8SEvalZero /*
2*150812a8SEvalZero  * Copyright (c) 2006-2018, RT-Thread Development Team
3*150812a8SEvalZero  *
4*150812a8SEvalZero  * SPDX-License-Identifier: Apache-2.0
5*150812a8SEvalZero  */
6*150812a8SEvalZero 
7*150812a8SEvalZero #include "nrf.h"
8*150812a8SEvalZero #include "nrfx_glue.h"
9*150812a8SEvalZero 
10*150812a8SEvalZero #include <rtthread.h>
11*150812a8SEvalZero #include <rthw.h>
12*150812a8SEvalZero 
13*150812a8SEvalZero #define NUM_IRQS_PER_REG 32
14*150812a8SEvalZero #define REG_FROM_IRQ(irq) (irq / NUM_IRQS_PER_REG)
15*150812a8SEvalZero #define BIT_FROM_IRQ(irq) (irq % NUM_IRQS_PER_REG)
16*150812a8SEvalZero 
17*150812a8SEvalZero /**
18*150812a8SEvalZero  * @brief Return IRQ enable state
19*150812a8SEvalZero  *
20*150812a8SEvalZero  * @param irq IRQ line
21*150812a8SEvalZero  * @return interrupt enable state, true or false
22*150812a8SEvalZero  */
NVIC_IRQ_IS_ENABLED(unsigned int irq)23*150812a8SEvalZero int NVIC_IRQ_IS_ENABLED(unsigned int irq)
24*150812a8SEvalZero {
25*150812a8SEvalZero 	return NVIC->ISER[REG_FROM_IRQ(irq)] & (1 << BIT_FROM_IRQ(irq));
26*150812a8SEvalZero }
27*150812a8SEvalZero 
nrfx_enter_critical(void)28*150812a8SEvalZero unsigned int nrfx_enter_critical(void)
29*150812a8SEvalZero {
30*150812a8SEvalZero 	return rt_hw_interrupt_disable();
31*150812a8SEvalZero }
32*150812a8SEvalZero 
nrfx_exit_critical(unsigned int ctx)33*150812a8SEvalZero void nrfx_exit_critical(unsigned int ctx)
34*150812a8SEvalZero {
35*150812a8SEvalZero 	rt_hw_interrupt_enable(ctx);
36*150812a8SEvalZero }