xref: /nrf52832-nimble/nordic/nrfx/mdk/system_nrf51.c (revision 150812a83cab50279bd772ef6db1bfaf255f2c5b)
1 /*
2 
3 Copyright (c) 2009-2018 ARM Limited. All rights reserved.
4 
5     SPDX-License-Identifier: Apache-2.0
6 
7 Licensed under the Apache License, Version 2.0 (the License); you may
8 not use this file except in compliance with the License.
9 You may obtain a copy of the License at
10 
11     www.apache.org/licenses/LICENSE-2.0
12 
13 Unless required by applicable law or agreed to in writing, software
14 distributed under the License is distributed on an AS IS BASIS, WITHOUT
15 WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
16 See the License for the specific language governing permissions and
17 limitations under the License.
18 
19 NOTICE: This file has been modified by Nordic Semiconductor ASA.
20 
21 */
22 
23 /* NOTE: Template files (including this one) are application specific and therefore expected to
24    be copied into the application project folder prior to its use! */
25 
26 #include <stdint.h>
27 #include <stdbool.h>
28 #include "nrf.h"
29 #include "system_nrf51.h"
30 
31 /*lint ++flb "Enter library region" */
32 
33 
34 #define __SYSTEM_CLOCK      (16000000UL)     /*!< nRF51 devices use a fixed System Clock Frequency of 16MHz */
35 
36 static bool is_manual_peripheral_setup_needed(void);
37 static bool is_disabled_in_debug_needed(void);
38 static bool is_peripheral_domain_setup_needed(void);
39 
40 
41 #if defined ( __CC_ARM )
42     uint32_t SystemCoreClock __attribute__((used)) = __SYSTEM_CLOCK;
43 #elif defined ( __ICCARM__ )
44     __root uint32_t SystemCoreClock = __SYSTEM_CLOCK;
45 #elif defined   ( __GNUC__ )
46     uint32_t SystemCoreClock __attribute__((used)) = __SYSTEM_CLOCK;
47 #endif
48 
SystemCoreClockUpdate(void)49 void SystemCoreClockUpdate(void)
50 {
51     SystemCoreClock = __SYSTEM_CLOCK;
52 }
53 
SystemInit(void)54 void SystemInit(void)
55 {
56     /* If desired, switch off the unused RAM to lower consumption by the use of RAMON register.
57        It can also be done in the application main() function. */
58 
59     /* Prepare the peripherals for use as indicated by the PAN 26 "System: Manual setup is required
60        to enable the use of peripherals" found at Product Anomaly document for your device found at
61        https://www.nordicsemi.com/. The side effect of executing these instructions in the devices
62        that do not need it is that the new peripherals in the second generation devices (LPCOMP for
63        example) will not be available. */
64     if (is_manual_peripheral_setup_needed())
65     {
66         *(uint32_t volatile *)0x40000504 = 0xC007FFDF;
67         *(uint32_t volatile *)0x40006C18 = 0x00008000;
68     }
69 
70     /* Disable PROTENSET registers under debug, as indicated by PAN 59 "MPU: Reset value of DISABLEINDEBUG
71        register is incorrect" found at Product Anomaly document for your device found at
72        https://www.nordicsemi.com/. There is no side effect of using these instruction if not needed. */
73     if (is_disabled_in_debug_needed())
74     {
75         NRF_MPU->DISABLEINDEBUG = MPU_DISABLEINDEBUG_DISABLEINDEBUG_Disabled << MPU_DISABLEINDEBUG_DISABLEINDEBUG_Pos;
76     }
77 
78     /* Execute the following code to eliminate excessive current in sleep mode with RAM retention in nRF51802 devices,
79        as indicated by PAN 76 "System: Excessive current in sleep mode with retention" found at Product Anomaly document
80        for your device found at https://www.nordicsemi.com/. */
81     if (is_peripheral_domain_setup_needed()){
82         if (*(uint32_t volatile *)0x4006EC00 != 1){
83             *(uint32_t volatile *)0x4006EC00 = 0x9375;
84             while (*(uint32_t volatile *)0x4006EC00 != 1){
85             }
86         }
87         *(uint32_t volatile *)0x4006EC14 = 0xC0;
88     }
89 }
90 
91 
is_manual_peripheral_setup_needed(void)92 static bool is_manual_peripheral_setup_needed(void)
93 {
94     if ((((*(uint32_t *)0xF0000FE0) & 0x000000FF) == 0x1) && (((*(uint32_t *)0xF0000FE4) & 0x0000000F) == 0x0))
95     {
96         if ((((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x00) && (((*(uint32_t *)0xF0000FEC) & 0x000000F0) == 0x0))
97         {
98             return true;
99         }
100         if ((((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x10) && (((*(uint32_t *)0xF0000FEC) & 0x000000F0) == 0x0))
101         {
102             return true;
103         }
104         if ((((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x30) && (((*(uint32_t *)0xF0000FEC) & 0x000000F0) == 0x0))
105         {
106             return true;
107         }
108     }
109 
110     return false;
111 }
112 
is_disabled_in_debug_needed(void)113 static bool is_disabled_in_debug_needed(void)
114 {
115     if ((((*(uint32_t *)0xF0000FE0) & 0x000000FF) == 0x1) && (((*(uint32_t *)0xF0000FE4) & 0x0000000F) == 0x0))
116     {
117         if ((((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x40) && (((*(uint32_t *)0xF0000FEC) & 0x000000F0) == 0x0))
118         {
119             return true;
120         }
121     }
122 
123     return false;
124 }
125 
is_peripheral_domain_setup_needed(void)126 static bool is_peripheral_domain_setup_needed(void)
127 {
128     if ((((*(uint32_t *)0xF0000FE0) & 0x000000FF) == 0x1) && (((*(uint32_t *)0xF0000FE4) & 0x0000000F) == 0x0))
129     {
130         if ((((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0xA0) && (((*(uint32_t *)0xF0000FEC) & 0x000000F0) == 0x0))
131         {
132             return true;
133         }
134         if ((((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0xD0) && (((*(uint32_t *)0xF0000FEC) & 0x000000F0) == 0x0))
135         {
136             return true;
137         }
138     }
139 
140     return false;
141 }
142 
143 /*lint --flb "Leave library region" */
144