xref: /nrf52832-nimble/nordic/nrfx/mdk/ses_startup_nrf52810.s (revision 150812a83cab50279bd772ef6db1bfaf255f2c5b) 
1*150812a8SEvalZero/***********************************************************************************
2*150812a8SEvalZero *                           SEGGER Microcontroller GmbH                           *
3*150812a8SEvalZero *                               The Embedded Experts                              *
4*150812a8SEvalZero ***********************************************************************************
5*150812a8SEvalZero *                                                                                 *
6*150812a8SEvalZero *                   (c) 2014 - 2018 SEGGER Microcontroller GmbH                   *
7*150812a8SEvalZero *                                                                                 *
8*150812a8SEvalZero *                  www.segger.com     Support: [email protected]                 *
9*150812a8SEvalZero *                                                                                 *
10*150812a8SEvalZero ***********************************************************************************
11*150812a8SEvalZero *                                                                                 *
12*150812a8SEvalZero *        All rights reserved.                                                     *
13*150812a8SEvalZero *                                                                                 *
14*150812a8SEvalZero *        Redistribution and use in source and binary forms, with or               *
15*150812a8SEvalZero *        without modification, are permitted provided that the following          *
16*150812a8SEvalZero *        conditions are met:                                                      *
17*150812a8SEvalZero *                                                                                 *
18*150812a8SEvalZero *        - Redistributions of source code must retain the above copyright         *
19*150812a8SEvalZero *          notice, this list of conditions and the following disclaimer.          *
20*150812a8SEvalZero *                                                                                 *
21*150812a8SEvalZero *        - Neither the name of SEGGER Microcontroller GmbH                        *
22*150812a8SEvalZero *          nor the names of its contributors may be used to endorse or            *
23*150812a8SEvalZero *          promote products derived from this software without specific           *
24*150812a8SEvalZero *          prior written permission.                                              *
25*150812a8SEvalZero *                                                                                 *
26*150812a8SEvalZero *        THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND                   *
27*150812a8SEvalZero *        CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,              *
28*150812a8SEvalZero *        INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF                 *
29*150812a8SEvalZero *        MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE                 *
30*150812a8SEvalZero *        DISCLAIMED.                                                              *
31*150812a8SEvalZero *        IN NO EVENT SHALL SEGGER Microcontroller GmbH BE LIABLE FOR              *
32*150812a8SEvalZero *        ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR                 *
33*150812a8SEvalZero *        CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT        *
34*150812a8SEvalZero *        OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;          *
35*150812a8SEvalZero *        OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF            *
36*150812a8SEvalZero *        LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT                *
37*150812a8SEvalZero *        (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE        *
38*150812a8SEvalZero *        USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH         *
39*150812a8SEvalZero *        DAMAGE.                                                                  *
40*150812a8SEvalZero *                                                                                 *
41*150812a8SEvalZero ***********************************************************************************/
42*150812a8SEvalZero
43*150812a8SEvalZero/************************************************************************************
44*150812a8SEvalZero *                         Preprocessor Definitions                                 *
45*150812a8SEvalZero *                         ------------------------                                 *
46*150812a8SEvalZero * VECTORS_IN_RAM                                                                   *
47*150812a8SEvalZero *                                                                                  *
48*150812a8SEvalZero *   If defined, an area of RAM will large enough to store the vector table         *
49*150812a8SEvalZero *   will be reserved.                                                              *
50*150812a8SEvalZero *                                                                                  *
51*150812a8SEvalZero ************************************************************************************/
52*150812a8SEvalZero
53*150812a8SEvalZero  .syntax unified
54*150812a8SEvalZero  .code 16
55*150812a8SEvalZero
56*150812a8SEvalZero  .section .init, "ax"
57*150812a8SEvalZero  .align 0
58*150812a8SEvalZero
59*150812a8SEvalZero/************************************************************************************
60*150812a8SEvalZero * Default Exception Handlers                                                       *
61*150812a8SEvalZero ************************************************************************************/
62*150812a8SEvalZero
63*150812a8SEvalZero
64*150812a8SEvalZero  .thumb_func
65*150812a8SEvalZero  .weak   NMI_Handler
66*150812a8SEvalZeroNMI_Handler:
67*150812a8SEvalZero  b     .
68*150812a8SEvalZero
69*150812a8SEvalZero  .thumb_func
70*150812a8SEvalZero  .weak   HardFault_Handler
71*150812a8SEvalZeroHardFault_Handler:
72*150812a8SEvalZero  b     .
73*150812a8SEvalZero
74*150812a8SEvalZero  .thumb_func
75*150812a8SEvalZero  .weak   MemoryManagement_Handler
76*150812a8SEvalZeroMemoryManagement_Handler:
77*150812a8SEvalZero  b     .
78*150812a8SEvalZero
79*150812a8SEvalZero  .thumb_func
80*150812a8SEvalZero  .weak   BusFault_Handler
81*150812a8SEvalZeroBusFault_Handler:
82*150812a8SEvalZero  b     .
83*150812a8SEvalZero
84*150812a8SEvalZero  .thumb_func
85*150812a8SEvalZero  .weak   UsageFault_Handler
86*150812a8SEvalZeroUsageFault_Handler:
87*150812a8SEvalZero  b     .
88*150812a8SEvalZero
89*150812a8SEvalZero  .thumb_func
90*150812a8SEvalZero  .weak   SVC_Handler
91*150812a8SEvalZeroSVC_Handler:
92*150812a8SEvalZero  b     .
93*150812a8SEvalZero
94*150812a8SEvalZero  .thumb_func
95*150812a8SEvalZero  .weak   DebugMon_Handler
96*150812a8SEvalZeroDebugMon_Handler:
97*150812a8SEvalZero  b     .
98*150812a8SEvalZero
99*150812a8SEvalZero  .thumb_func
100*150812a8SEvalZero  .weak   PendSV_Handler
101*150812a8SEvalZeroPendSV_Handler:
102*150812a8SEvalZero  b     .
103*150812a8SEvalZero
104*150812a8SEvalZero  .thumb_func
105*150812a8SEvalZero  .weak   SysTick_Handler
106*150812a8SEvalZeroSysTick_Handler:
107*150812a8SEvalZero  b     .
108*150812a8SEvalZero
109*150812a8SEvalZero  .thumb_func
110*150812a8SEvalZero  .weak   Dummy_Handler
111*150812a8SEvalZeroDummy_Handler:
112*150812a8SEvalZero  b     .
113*150812a8SEvalZero
114*150812a8SEvalZero/************************************************************************************
115*150812a8SEvalZero * Default Interrupt Handlers                                                       *
116*150812a8SEvalZero ************************************************************************************/
117*150812a8SEvalZero
118*150812a8SEvalZero.weak POWER_CLOCK_IRQHandler
119*150812a8SEvalZero.thumb_set POWER_CLOCK_IRQHandler, Dummy_Handler
120*150812a8SEvalZero
121*150812a8SEvalZero.weak RADIO_IRQHandler
122*150812a8SEvalZero.thumb_set RADIO_IRQHandler, Dummy_Handler
123*150812a8SEvalZero
124*150812a8SEvalZero.weak UARTE0_IRQHandler
125*150812a8SEvalZero.thumb_set UARTE0_IRQHandler, Dummy_Handler
126*150812a8SEvalZero
127*150812a8SEvalZero.weak TWIM0_TWIS0_IRQHandler
128*150812a8SEvalZero.thumb_set TWIM0_TWIS0_IRQHandler, Dummy_Handler
129*150812a8SEvalZero
130*150812a8SEvalZero.weak SPIM0_SPIS0_IRQHandler
131*150812a8SEvalZero.thumb_set SPIM0_SPIS0_IRQHandler, Dummy_Handler
132*150812a8SEvalZero
133*150812a8SEvalZero.weak GPIOTE_IRQHandler
134*150812a8SEvalZero.thumb_set GPIOTE_IRQHandler, Dummy_Handler
135*150812a8SEvalZero
136*150812a8SEvalZero.weak SAADC_IRQHandler
137*150812a8SEvalZero.thumb_set SAADC_IRQHandler, Dummy_Handler
138*150812a8SEvalZero
139*150812a8SEvalZero.weak TIMER0_IRQHandler
140*150812a8SEvalZero.thumb_set TIMER0_IRQHandler, Dummy_Handler
141*150812a8SEvalZero
142*150812a8SEvalZero.weak TIMER1_IRQHandler
143*150812a8SEvalZero.thumb_set TIMER1_IRQHandler, Dummy_Handler
144*150812a8SEvalZero
145*150812a8SEvalZero.weak TIMER2_IRQHandler
146*150812a8SEvalZero.thumb_set TIMER2_IRQHandler, Dummy_Handler
147*150812a8SEvalZero
148*150812a8SEvalZero.weak RTC0_IRQHandler
149*150812a8SEvalZero.thumb_set RTC0_IRQHandler, Dummy_Handler
150*150812a8SEvalZero
151*150812a8SEvalZero.weak TEMP_IRQHandler
152*150812a8SEvalZero.thumb_set TEMP_IRQHandler, Dummy_Handler
153*150812a8SEvalZero
154*150812a8SEvalZero.weak RNG_IRQHandler
155*150812a8SEvalZero.thumb_set RNG_IRQHandler, Dummy_Handler
156*150812a8SEvalZero
157*150812a8SEvalZero.weak ECB_IRQHandler
158*150812a8SEvalZero.thumb_set ECB_IRQHandler, Dummy_Handler
159*150812a8SEvalZero
160*150812a8SEvalZero.weak CCM_AAR_IRQHandler
161*150812a8SEvalZero.thumb_set CCM_AAR_IRQHandler, Dummy_Handler
162*150812a8SEvalZero
163*150812a8SEvalZero.weak WDT_IRQHandler
164*150812a8SEvalZero.thumb_set WDT_IRQHandler, Dummy_Handler
165*150812a8SEvalZero
166*150812a8SEvalZero.weak RTC1_IRQHandler
167*150812a8SEvalZero.thumb_set RTC1_IRQHandler, Dummy_Handler
168*150812a8SEvalZero
169*150812a8SEvalZero.weak QDEC_IRQHandler
170*150812a8SEvalZero.thumb_set QDEC_IRQHandler, Dummy_Handler
171*150812a8SEvalZero
172*150812a8SEvalZero.weak COMP_IRQHandler
173*150812a8SEvalZero.thumb_set COMP_IRQHandler, Dummy_Handler
174*150812a8SEvalZero
175*150812a8SEvalZero.weak SWI0_EGU0_IRQHandler
176*150812a8SEvalZero.thumb_set SWI0_EGU0_IRQHandler, Dummy_Handler
177*150812a8SEvalZero
178*150812a8SEvalZero.weak SWI1_EGU1_IRQHandler
179*150812a8SEvalZero.thumb_set SWI1_EGU1_IRQHandler, Dummy_Handler
180*150812a8SEvalZero
181*150812a8SEvalZero.weak SWI2_IRQHandler
182*150812a8SEvalZero.thumb_set SWI2_IRQHandler, Dummy_Handler
183*150812a8SEvalZero
184*150812a8SEvalZero.weak SWI3_IRQHandler
185*150812a8SEvalZero.thumb_set SWI3_IRQHandler, Dummy_Handler
186*150812a8SEvalZero
187*150812a8SEvalZero.weak SWI4_IRQHandler
188*150812a8SEvalZero.thumb_set SWI4_IRQHandler, Dummy_Handler
189*150812a8SEvalZero
190*150812a8SEvalZero.weak SWI5_IRQHandler
191*150812a8SEvalZero.thumb_set SWI5_IRQHandler, Dummy_Handler
192*150812a8SEvalZero
193*150812a8SEvalZero.weak PWM0_IRQHandler
194*150812a8SEvalZero.thumb_set PWM0_IRQHandler, Dummy_Handler
195*150812a8SEvalZero
196*150812a8SEvalZero.weak PDM_IRQHandler
197*150812a8SEvalZero.thumb_set PDM_IRQHandler, Dummy_Handler
198*150812a8SEvalZero
199*150812a8SEvalZero/************************************************************************************
200*150812a8SEvalZero * Reset Handler Extensions                                                         *
201*150812a8SEvalZero ************************************************************************************/
202*150812a8SEvalZero
203*150812a8SEvalZero  .extern Reset_Handler
204*150812a8SEvalZero  .global nRFInitialize
205*150812a8SEvalZero
206*150812a8SEvalZero  .thumb_func
207*150812a8SEvalZeronRFInitialize:
208*150812a8SEvalZero  bx lr
209*150812a8SEvalZero
210*150812a8SEvalZero
211*150812a8SEvalZero/************************************************************************************
212*150812a8SEvalZero * Vector Table                                                                     *
213*150812a8SEvalZero ************************************************************************************/
214*150812a8SEvalZero
215*150812a8SEvalZero  .section .vectors, "ax"
216*150812a8SEvalZero  .align 0
217*150812a8SEvalZero  .global _vectors
218*150812a8SEvalZero  .extern __stack_end__
219*150812a8SEvalZero
220*150812a8SEvalZero_vectors:
221*150812a8SEvalZero  .word __stack_end__
222*150812a8SEvalZero  .word Reset_Handler
223*150812a8SEvalZero  .word NMI_Handler
224*150812a8SEvalZero  .word HardFault_Handler
225*150812a8SEvalZero  .word MemoryManagement_Handler
226*150812a8SEvalZero  .word BusFault_Handler
227*150812a8SEvalZero  .word UsageFault_Handler
228*150812a8SEvalZero  .word 0                           /*Reserved */
229*150812a8SEvalZero  .word 0                           /*Reserved */
230*150812a8SEvalZero  .word 0                           /*Reserved */
231*150812a8SEvalZero  .word 0                           /*Reserved */
232*150812a8SEvalZero  .word SVC_Handler
233*150812a8SEvalZero  .word DebugMon_Handler
234*150812a8SEvalZero  .word 0                           /*Reserved */
235*150812a8SEvalZero  .word PendSV_Handler
236*150812a8SEvalZero  .word SysTick_Handler
237*150812a8SEvalZero
238*150812a8SEvalZero/* External Interrupts */
239*150812a8SEvalZero  .word   POWER_CLOCK_IRQHandler
240*150812a8SEvalZero  .word   RADIO_IRQHandler
241*150812a8SEvalZero  .word   UARTE0_IRQHandler
242*150812a8SEvalZero  .word   TWIM0_TWIS0_IRQHandler
243*150812a8SEvalZero  .word   SPIM0_SPIS0_IRQHandler
244*150812a8SEvalZero  .word   0                           /*Reserved */
245*150812a8SEvalZero  .word   GPIOTE_IRQHandler
246*150812a8SEvalZero  .word   SAADC_IRQHandler
247*150812a8SEvalZero  .word   TIMER0_IRQHandler
248*150812a8SEvalZero  .word   TIMER1_IRQHandler
249*150812a8SEvalZero  .word   TIMER2_IRQHandler
250*150812a8SEvalZero  .word   RTC0_IRQHandler
251*150812a8SEvalZero  .word   TEMP_IRQHandler
252*150812a8SEvalZero  .word   RNG_IRQHandler
253*150812a8SEvalZero  .word   ECB_IRQHandler
254*150812a8SEvalZero  .word   CCM_AAR_IRQHandler
255*150812a8SEvalZero  .word   WDT_IRQHandler
256*150812a8SEvalZero  .word   RTC1_IRQHandler
257*150812a8SEvalZero  .word   QDEC_IRQHandler
258*150812a8SEvalZero  .word   COMP_IRQHandler
259*150812a8SEvalZero  .word   SWI0_EGU0_IRQHandler
260*150812a8SEvalZero  .word   SWI1_EGU1_IRQHandler
261*150812a8SEvalZero  .word   SWI2_IRQHandler
262*150812a8SEvalZero  .word   SWI3_IRQHandler
263*150812a8SEvalZero  .word   SWI4_IRQHandler
264*150812a8SEvalZero  .word   SWI5_IRQHandler
265*150812a8SEvalZero  .word   0                           /*Reserved */
266*150812a8SEvalZero  .word   0                           /*Reserved */
267*150812a8SEvalZero  .word   PWM0_IRQHandler
268*150812a8SEvalZero  .word   PDM_IRQHandler
269*150812a8SEvalZero  .word   0                           /*Reserved */
270*150812a8SEvalZero  .word   0                           /*Reserved */
271*150812a8SEvalZero  .word   0                           /*Reserved */
272*150812a8SEvalZero  .word   0                           /*Reserved */
273*150812a8SEvalZero  .word   0                           /*Reserved */
274*150812a8SEvalZero  .word   0                           /*Reserved */
275*150812a8SEvalZero  .word   0                           /*Reserved */
276*150812a8SEvalZero  .word   0                           /*Reserved */
277*150812a8SEvalZero  .word   0                           /*Reserved */
278*150812a8SEvalZero  .word   0                           /*Reserved */
279*150812a8SEvalZero  .word   0                           /*Reserved */
280*150812a8SEvalZero  .word   0                           /*Reserved */
281*150812a8SEvalZero  .word   0                           /*Reserved */
282*150812a8SEvalZero  .word   0                           /*Reserved */
283*150812a8SEvalZero  .word   0                           /*Reserved */
284*150812a8SEvalZero  .word   0                           /*Reserved */
285*150812a8SEvalZero  .word   0                           /*Reserved */
286*150812a8SEvalZero  .word   0                           /*Reserved */
287*150812a8SEvalZero  .word   0                           /*Reserved */
288*150812a8SEvalZero  .word   0                           /*Reserved */
289*150812a8SEvalZero  .word   0                           /*Reserved */
290*150812a8SEvalZero  .word   0                           /*Reserved */
291*150812a8SEvalZero  .word   0                           /*Reserved */
292*150812a8SEvalZero  .word   0                           /*Reserved */
293*150812a8SEvalZero  .word   0                           /*Reserved */
294*150812a8SEvalZero  .word   0                           /*Reserved */
295*150812a8SEvalZero  .word   0                           /*Reserved */
296*150812a8SEvalZero  .word   0                           /*Reserved */
297*150812a8SEvalZero  .word   0                           /*Reserved */
298*150812a8SEvalZero  .word   0                           /*Reserved */
299*150812a8SEvalZero  .word   0                           /*Reserved */
300*150812a8SEvalZero  .word   0                           /*Reserved */
301*150812a8SEvalZero  .word   0                           /*Reserved */
302*150812a8SEvalZero  .word   0                           /*Reserved */
303*150812a8SEvalZero  .word   0                           /*Reserved */
304*150812a8SEvalZero  .word   0                           /*Reserved */
305*150812a8SEvalZero  .word   0                           /*Reserved */
306*150812a8SEvalZero  .word   0                           /*Reserved */
307*150812a8SEvalZero  .word   0                           /*Reserved */
308*150812a8SEvalZero  .word   0                           /*Reserved */
309*150812a8SEvalZero  .word   0                           /*Reserved */
310*150812a8SEvalZero  .word   0                           /*Reserved */
311*150812a8SEvalZero  .word   0                           /*Reserved */
312*150812a8SEvalZero  .word   0                           /*Reserved */
313*150812a8SEvalZero  .word   0                           /*Reserved */
314*150812a8SEvalZero  .word   0                           /*Reserved */
315*150812a8SEvalZero  .word   0                           /*Reserved */
316*150812a8SEvalZero  .word   0                           /*Reserved */
317*150812a8SEvalZero  .word   0                           /*Reserved */
318*150812a8SEvalZero  .word   0                           /*Reserved */
319*150812a8SEvalZero  .word   0                           /*Reserved */
320*150812a8SEvalZero  .word   0                           /*Reserved */
321*150812a8SEvalZero  .word   0                           /*Reserved */
322*150812a8SEvalZero  .word   0                           /*Reserved */
323*150812a8SEvalZero  .word   0                           /*Reserved */
324*150812a8SEvalZero  .word   0                           /*Reserved */
325*150812a8SEvalZero  .word   0                           /*Reserved */
326*150812a8SEvalZero  .word   0                           /*Reserved */
327*150812a8SEvalZero  .word   0                           /*Reserved */
328*150812a8SEvalZero  .word   0                           /*Reserved */
329*150812a8SEvalZero  .word   0                           /*Reserved */
330*150812a8SEvalZero  .word   0                           /*Reserved */
331*150812a8SEvalZero  .word   0                           /*Reserved */
332*150812a8SEvalZero  .word   0                           /*Reserved */
333*150812a8SEvalZero  .word   0                           /*Reserved */
334*150812a8SEvalZero  .word   0                           /*Reserved */
335*150812a8SEvalZero  .word   0                           /*Reserved */
336*150812a8SEvalZero  .word   0                           /*Reserved */
337*150812a8SEvalZero  .word   0                           /*Reserved */
338*150812a8SEvalZero  .word   0                           /*Reserved */
339*150812a8SEvalZero  .word   0                           /*Reserved */
340*150812a8SEvalZero  .word   0                           /*Reserved */
341*150812a8SEvalZero  .word   0                           /*Reserved */
342*150812a8SEvalZero  .word   0                           /*Reserved */
343*150812a8SEvalZero  .word   0                           /*Reserved */
344*150812a8SEvalZero  .word   0                           /*Reserved */
345*150812a8SEvalZero  .word   0                           /*Reserved */
346*150812a8SEvalZero  .word   0                           /*Reserved */
347*150812a8SEvalZero  .word   0                           /*Reserved */
348*150812a8SEvalZero  .word   0                           /*Reserved */
349*150812a8SEvalZero  .word   0                           /*Reserved */
350*150812a8SEvalZero  .word   0                           /*Reserved */
351*150812a8SEvalZero_vectors_end:
352*150812a8SEvalZero
353*150812a8SEvalZero#ifdef VECTORS_IN_RAM
354*150812a8SEvalZero  .section .vectors_ram, "ax"
355*150812a8SEvalZero  .align 0
356*150812a8SEvalZero  .global _vectors_ram
357*150812a8SEvalZero
358*150812a8SEvalZero_vectors_ram:
359*150812a8SEvalZero  .space _vectors_end - _vectors, 0
360*150812a8SEvalZero#endif
361