1 /* 2 3 Copyright (c) 2010 - 2018, Nordic Semiconductor ASA All rights reserved. 4 5 Redistribution and use in source and binary forms, with or without 6 modification, are permitted provided that the following conditions are met: 7 8 1. Redistributions of source code must retain the above copyright notice, this 9 list of conditions and the following disclaimer. 10 11 2. Redistributions in binary form must reproduce the above copyright 12 notice, this list of conditions and the following disclaimer in the 13 documentation and/or other materials provided with the distribution. 14 15 3. Neither the name of Nordic Semiconductor ASA nor the names of its 16 contributors may be used to endorse or promote products derived from this 17 software without specific prior written permission. 18 19 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 20 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 21 IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE 22 ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE 23 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 POSSIBILITY OF SUCH DAMAGE. 30 31 */ 32 33 #ifndef _NRF9160_PERIPHERALS_H 34 #define _NRF9160_PERIPHERALS_H 35 36 /* UICR */ 37 #define UICR_KEYSLOT_COUNT 128 38 39 /* Clock Peripheral */ 40 #define CLOCK_PRESENT 41 #define CLOCK_COUNT 1 42 43 /* Power Peripheral */ 44 #define POWER_PRESENT 45 #define POWER_COUNT 1 46 47 /* Memory Watch Unit */ 48 #define MWU_PRESENT 49 #define MWU_COUNT 1 50 51 /* GPIO */ 52 #define GPIO_PRESENT 53 #define GPIO_COUNT 1 54 55 #define P0_PIN_NUM 32 56 57 /* Distributed Peripheral to Peripheral Interconnect */ 58 #define DPPI_PRESENT 59 #define DPPI_COUNT 1 60 61 #define DPPI_CH_NUM 16 62 #define DPPI_GROUP_NUM 6 63 64 /* Event Generator Unit */ 65 #define EGU_PRESENT 66 #define EGU_COUNT 6 67 68 #define EGU0_CH_NUM 16 69 #define EGU1_CH_NUM 16 70 #define EGU2_CH_NUM 16 71 #define EGU3_CH_NUM 16 72 #define EGU4_CH_NUM 16 73 #define EGU5_CH_NUM 16 74 75 /* Timer/Counter */ 76 #define TIMER_PRESENT 77 #define TIMER_COUNT 3 78 79 #define TIMER0_MAX_SIZE 32 80 #define TIMER1_MAX_SIZE 32 81 #define TIMER2_MAX_SIZE 32 82 83 84 #define TIMER0_CC_NUM 6 85 #define TIMER1_CC_NUM 6 86 #define TIMER2_CC_NUM 6 87 88 /* Real Time Counter */ 89 #define RTC_PRESENT 90 #define RTC_COUNT 2 91 92 #define RTC0_CC_NUM 4 93 #define RTC1_CC_NUM 4 94 95 /* Watchdog Timer */ 96 #define WDT_PRESENT 97 #define WDT_COUNT 1 98 99 /* Serial Peripheral Interface Master with DMA */ 100 #define SPIM_PRESENT 101 #define SPIM_COUNT 4 102 103 #define SPIM0_MAX_DATARATE 8 104 #define SPIM1_MAX_DATARATE 8 105 #define SPIM2_MAX_DATARATE 8 106 #define SPIM3_MAX_DATARATE 8 107 108 #define SPIM0_EASYDMA_MAXCNT_SIZE 16 109 #define SPIM1_EASYDMA_MAXCNT_SIZE 16 110 #define SPIM2_EASYDMA_MAXCNT_SIZE 16 111 #define SPIM3_EASYDMA_MAXCNT_SIZE 16 112 113 /* Serial Peripheral Interface Slave with DMA*/ 114 #define SPIS_PRESENT 115 #define SPIS_COUNT 4 116 117 #define SPIS0_EASYDMA_MAXCNT_SIZE 16 118 #define SPIS1_EASYDMA_MAXCNT_SIZE 16 119 #define SPIS2_EASYDMA_MAXCNT_SIZE 16 120 #define SPIS3_EASYDMA_MAXCNT_SIZE 16 121 122 /* Two Wire Interface Master with DMA */ 123 #define TWIM_PRESENT 124 #define TWIM_COUNT 4 125 126 #define TWIM0_EASYDMA_MAXCNT_SIZE 16 127 #define TWIM1_EASYDMA_MAXCNT_SIZE 16 128 #define TWIM2_EASYDMA_MAXCNT_SIZE 16 129 #define TWIM3_EASYDMA_MAXCNT_SIZE 16 130 131 /* Two Wire Interface Slave with DMA */ 132 #define TWIS_PRESENT 133 #define TWIS_COUNT 4 134 135 #define TWIS0_EASYDMA_MAXCNT_SIZE 16 136 #define TWIS1_EASYDMA_MAXCNT_SIZE 16 137 #define TWIS2_EASYDMA_MAXCNT_SIZE 16 138 #define TWIS3_EASYDMA_MAXCNT_SIZE 16 139 140 /* Universal Asynchronous Receiver-Transmitter with DMA */ 141 #define UARTE_PRESENT 142 #define UARTE_COUNT 4 143 144 #define UARTE0_EASYDMA_MAXCNT_SIZE 16 145 #define UARTE1_EASYDMA_MAXCNT_SIZE 16 146 #define UARTE2_EASYDMA_MAXCNT_SIZE 16 147 #define UARTE3_EASYDMA_MAXCNT_SIZE 16 148 149 150 /* Successive Approximation Analog to Digital Converter */ 151 #define SAADC_PRESENT 152 #define SAADC_COUNT 1 153 154 #define SAADC_EASYDMA_MAXCNT_SIZE 15 155 156 /* GPIO Tasks and Events */ 157 #define GPIOTE_PRESENT 158 #define GPIOTE_COUNT 2 159 160 #define GPIOTE_CH_NUM 8 161 162 #define GPIOTE_FEATURE_SET_PRESENT 163 #define GPIOTE_FEATURE_CLR_PRESENT 164 165 /* Pulse Width Modulator */ 166 #define PWM_PRESENT 167 #define PWM_COUNT 4 168 169 #define PWM_CH_NUM 4 170 171 #define PWM_EASYDMA_MAXCNT_SIZE 15 172 173 /* Pulse Density Modulator */ 174 #define PDM_PRESENT 175 #define PDM_COUNT 1 176 177 #define PDM_EASYDMA_MAXCNT_SIZE 15 178 179 /* Inter-IC Sound Interface */ 180 #define I2S_PRESENT 181 #define I2S_COUNT 1 182 183 #define I2S_EASYDMA_MAXCNT_SIZE 14 184 185 /* Inter Processor Communication */ 186 #define IPC_PRESENT 187 #define IPC_COUNT 1 188 189 #define IPC_CH_NUM 8 190 #define IPC_GPMEM_NUM 4 191 192 /* FPU */ 193 #define FPU_PRESENT 194 #define FPU_COUNT 1 195 196 /* SPU */ 197 #define SPU_PRESENT 198 #define SPU_COUNT 1 199 200 /* CRYPTOCELL */ 201 #define CRYPTOCELL_PRESENT 202 #define CRYPTOCELL_COUNT 1 203 204 /* KMU */ 205 #define KMU_PRESENT 206 #define KMU_COUNT 1 207 208 #define KMU_KEYSLOT_PRESENT 209 210 /* MAGPIO */ 211 #define MAGPIO_PRESENT 212 #define MAGPIO_COUNT 1 213 #define MAGPIO_PIN_NUM 3 214 215 /* REGULATORS */ 216 #define REGULATORS_PRESENT 217 #define REGULATORS_COUNT 1 218 219 220 #endif // _NRF9160_PERIPHERALS_H 221