1 /* 2 3 Copyright (c) 2010 - 2018, Nordic Semiconductor ASA All rights reserved. 4 5 Redistribution and use in source and binary forms, with or without 6 modification, are permitted provided that the following conditions are met: 7 8 1. Redistributions of source code must retain the above copyright notice, this 9 list of conditions and the following disclaimer. 10 11 2. Redistributions in binary form must reproduce the above copyright 12 notice, this list of conditions and the following disclaimer in the 13 documentation and/or other materials provided with the distribution. 14 15 3. Neither the name of Nordic Semiconductor ASA nor the names of its 16 contributors may be used to endorse or promote products derived from this 17 software without specific prior written permission. 18 19 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 20 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 21 IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE 22 ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE 23 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 POSSIBILITY OF SUCH DAMAGE. 30 31 */ 32 33 #ifndef NRF51_TO_NRF52840_H 34 #define NRF51_TO_NRF52840_H 35 36 /*lint ++flb "Enter library region */ 37 38 /* This file is given to prevent your SW from not compiling with the name changes between nRF51 and nRF52840 devices. 39 * It redefines the old nRF51 names into the new ones as long as the functionality is still supported. If the 40 * functionality is gone, there old names are not defined, so compilation will fail. Note that also includes macros 41 * from the nrf51_deprecated.h file. */ 42 43 44 /* IRQ */ 45 /* Several peripherals have been added to several indexes. Names of IRQ handlers and IRQ numbers have changed. */ 46 #define UART0_IRQHandler UARTE0_UART0_IRQHandler 47 #define SPI0_TWI0_IRQHandler SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler 48 #define SPI1_TWI1_IRQHandler SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler 49 #define ADC_IRQHandler SAADC_IRQHandler 50 #define LPCOMP_IRQHandler COMP_LPCOMP_IRQHandler 51 #define SWI0_IRQHandler SWI0_EGU0_IRQHandler 52 #define SWI1_IRQHandler SWI1_EGU1_IRQHandler 53 #define SWI2_IRQHandler SWI2_EGU2_IRQHandler 54 #define SWI3_IRQHandler SWI3_EGU3_IRQHandler 55 #define SWI4_IRQHandler SWI4_EGU4_IRQHandler 56 #define SWI5_IRQHandler SWI5_EGU5_IRQHandler 57 58 #define UART0_IRQn UARTE0_UART0_IRQn 59 #define SPI0_TWI0_IRQn SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQn 60 #define SPI1_TWI1_IRQn SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQn 61 #define ADC_IRQn SAADC_IRQn 62 #define LPCOMP_IRQn COMP_LPCOMP_IRQn 63 #define SWI0_IRQn SWI0_EGU0_IRQn 64 #define SWI1_IRQn SWI1_EGU1_IRQn 65 #define SWI2_IRQn SWI2_EGU2_IRQn 66 #define SWI3_IRQn SWI3_EGU3_IRQn 67 #define SWI4_IRQn SWI4_EGU4_IRQn 68 #define SWI5_IRQn SWI5_EGU5_IRQn 69 70 71 /* UICR */ 72 /* Register RBPCONF was renamed to APPROTECT. */ 73 #define RBPCONF APPROTECT 74 75 #define UICR_RBPCONF_PALL_Pos UICR_APPROTECT_PALL_Pos 76 #define UICR_RBPCONF_PALL_Msk UICR_APPROTECT_PALL_Msk 77 #define UICR_RBPCONF_PALL_Enabled UICR_APPROTECT_PALL_Enabled 78 #define UICR_RBPCONF_PALL_Disabled UICR_APPROTECT_PALL_Disabled 79 80 81 /* GPIO */ 82 /* GPIO port was renamed to P0. */ 83 #define NRF_GPIO NRF_P0 84 #define NRF_GPIO_BASE NRF_P0_BASE 85 86 87 /* QDEC */ 88 /* The registers PSELA, PSELB and PSELLED were restructured into a struct. */ 89 #define PSELLED PSEL.LED 90 #define PSELA PSEL.A 91 #define PSELB PSEL.B 92 93 94 /* SPIS */ 95 /* The registers PSELSCK, PSELMISO, PSELMOSI, PSELCSN were restructured into a struct. */ 96 #define PSELSCK PSEL.SCK 97 #define PSELMISO PSEL.MISO 98 #define PSELMOSI PSEL.MOSI 99 #define PSELCSN PSEL.CSN 100 101 /* The registers RXDPTR, MAXRX, AMOUNTRX were restructured into a struct */ 102 #define RXDPTR RXD.PTR 103 #define MAXRX RXD.MAXCNT 104 #define AMOUNTRX RXD.AMOUNT 105 106 #define SPIS_MAXRX_MAXRX_Pos SPIS_RXD_MAXCNT_MAXCNT_Pos 107 #define SPIS_MAXRX_MAXRX_Msk SPIS_RXD_MAXCNT_MAXCNT_Msk 108 109 #define SPIS_AMOUNTRX_AMOUNTRX_Pos SPIS_RXD_AMOUNT_AMOUNT_Pos 110 #define SPIS_AMOUNTRX_AMOUNTRX_Msk SPIS_RXD_AMOUNT_AMOUNT_Msk 111 112 /* The registers TXDPTR, MAXTX, AMOUNTTX were restructured into a struct */ 113 #define TXDPTR TXD.PTR 114 #define MAXTX TXD.MAXCNT 115 #define AMOUNTTX TXD.AMOUNT 116 117 #define SPIS_MAXTX_MAXTX_Pos SPIS_TXD_MAXCNT_MAXCNT_Pos 118 #define SPIS_MAXTX_MAXTX_Msk SPIS_TXD_MAXCNT_MAXCNT_Msk 119 120 #define SPIS_AMOUNTTX_AMOUNTTX_Pos SPIS_TXD_AMOUNT_AMOUNT_Pos 121 #define SPIS_AMOUNTTX_AMOUNTTX_Msk SPIS_TXD_AMOUNT_AMOUNT_Msk 122 123 124 /* UART */ 125 /* The registers PSELRTS, PSELTXD, PSELCTS, PSELRXD were restructured into a struct. */ 126 #define PSELRTS PSEL.RTS 127 #define PSELTXD PSEL.TXD 128 #define PSELCTS PSEL.CTS 129 #define PSELRXD PSEL.RXD 130 131 /* TWI */ 132 /* The registers PSELSCL, PSELSDA were restructured into a struct. */ 133 #define PSELSCL PSEL.SCL 134 #define PSELSDA PSEL.SDA 135 136 137 138 /* From nrf51_deprecated.h */ 139 140 /* NVMC */ 141 /* The register ERASEPROTECTEDPAGE changed name to ERASEPCR0 in the documentation. */ 142 #define ERASEPROTECTEDPAGE ERASEPCR0 143 144 145 /* IRQ */ 146 /* COMP module was eliminated. Adapted to nrf52840 headers. */ 147 #define LPCOMP_COMP_IRQHandler COMP_LPCOMP_IRQHandler 148 #define LPCOMP_COMP_IRQn COMP_LPCOMP_IRQn 149 150 151 /* REFSEL register redefined enumerated values and added some more. */ 152 #define LPCOMP_REFSEL_REFSEL_SupplyOneEighthPrescaling LPCOMP_REFSEL_REFSEL_Ref1_8Vdd 153 #define LPCOMP_REFSEL_REFSEL_SupplyTwoEighthsPrescaling LPCOMP_REFSEL_REFSEL_Ref2_8Vdd 154 #define LPCOMP_REFSEL_REFSEL_SupplyThreeEighthsPrescaling LPCOMP_REFSEL_REFSEL_Ref3_8Vdd 155 #define LPCOMP_REFSEL_REFSEL_SupplyFourEighthsPrescaling LPCOMP_REFSEL_REFSEL_Ref4_8Vdd 156 #define LPCOMP_REFSEL_REFSEL_SupplyFiveEighthsPrescaling LPCOMP_REFSEL_REFSEL_Ref5_8Vdd 157 #define LPCOMP_REFSEL_REFSEL_SupplySixEighthsPrescaling LPCOMP_REFSEL_REFSEL_Ref6_8Vdd 158 #define LPCOMP_REFSEL_REFSEL_SupplySevenEighthsPrescaling LPCOMP_REFSEL_REFSEL_Ref7_8Vdd 159 160 161 /* RADIO */ 162 /* The name of the field SKIPADDR was corrected. Old macros added for compatibility. */ 163 #define RADIO_CRCCNF_SKIP_ADDR_Pos RADIO_CRCCNF_SKIPADDR_Pos 164 #define RADIO_CRCCNF_SKIP_ADDR_Msk RADIO_CRCCNF_SKIPADDR_Msk 165 #define RADIO_CRCCNF_SKIP_ADDR_Include RADIO_CRCCNF_SKIPADDR_Include 166 #define RADIO_CRCCNF_SKIP_ADDR_Skip RADIO_CRCCNF_SKIPADDR_Skip 167 168 169 /* FICR */ 170 /* The registers FICR.DEVICEID0 and FICR.DEVICEID1 were renamed into an array. */ 171 #define DEVICEID0 DEVICEID[0] 172 #define DEVICEID1 DEVICEID[1] 173 174 /* The registers FICR.ER0, FICR.ER1, FICR.ER2 and FICR.ER3 were renamed into an array. */ 175 #define ER0 ER[0] 176 #define ER1 ER[1] 177 #define ER2 ER[2] 178 #define ER3 ER[3] 179 180 /* The registers FICR.IR0, FICR.IR1, FICR.IR2 and FICR.IR3 were renamed into an array. */ 181 #define IR0 IR[0] 182 #define IR1 IR[1] 183 #define IR2 IR[2] 184 #define IR3 IR[3] 185 186 /* The registers FICR.DEVICEADDR0 and FICR.DEVICEADDR1 were renamed into an array. */ 187 #define DEVICEADDR0 DEVICEADDR[0] 188 #define DEVICEADDR1 DEVICEADDR[1] 189 190 191 /* PPI */ 192 /* The tasks PPI.TASKS_CHGxEN and PPI.TASKS_CHGxDIS were renamed into an array of structs. */ 193 #define TASKS_CHG0EN TASKS_CHG[0].EN 194 #define TASKS_CHG0DIS TASKS_CHG[0].DIS 195 #define TASKS_CHG1EN TASKS_CHG[1].EN 196 #define TASKS_CHG1DIS TASKS_CHG[1].DIS 197 #define TASKS_CHG2EN TASKS_CHG[2].EN 198 #define TASKS_CHG2DIS TASKS_CHG[2].DIS 199 #define TASKS_CHG3EN TASKS_CHG[3].EN 200 #define TASKS_CHG3DIS TASKS_CHG[3].DIS 201 202 /* The registers PPI.CHx_EEP and PPI.CHx_TEP were renamed into an array of structs. */ 203 #define CH0_EEP CH[0].EEP 204 #define CH0_TEP CH[0].TEP 205 #define CH1_EEP CH[1].EEP 206 #define CH1_TEP CH[1].TEP 207 #define CH2_EEP CH[2].EEP 208 #define CH2_TEP CH[2].TEP 209 #define CH3_EEP CH[3].EEP 210 #define CH3_TEP CH[3].TEP 211 #define CH4_EEP CH[4].EEP 212 #define CH4_TEP CH[4].TEP 213 #define CH5_EEP CH[5].EEP 214 #define CH5_TEP CH[5].TEP 215 #define CH6_EEP CH[6].EEP 216 #define CH6_TEP CH[6].TEP 217 #define CH7_EEP CH[7].EEP 218 #define CH7_TEP CH[7].TEP 219 #define CH8_EEP CH[8].EEP 220 #define CH8_TEP CH[8].TEP 221 #define CH9_EEP CH[9].EEP 222 #define CH9_TEP CH[9].TEP 223 #define CH10_EEP CH[10].EEP 224 #define CH10_TEP CH[10].TEP 225 #define CH11_EEP CH[11].EEP 226 #define CH11_TEP CH[11].TEP 227 #define CH12_EEP CH[12].EEP 228 #define CH12_TEP CH[12].TEP 229 #define CH13_EEP CH[13].EEP 230 #define CH13_TEP CH[13].TEP 231 #define CH14_EEP CH[14].EEP 232 #define CH14_TEP CH[14].TEP 233 #define CH15_EEP CH[15].EEP 234 #define CH15_TEP CH[15].TEP 235 236 /* The registers PPI.CHG0, PPI.CHG1, PPI.CHG2 and PPI.CHG3 were renamed into an array. */ 237 #define CHG0 CHG[0] 238 #define CHG1 CHG[1] 239 #define CHG2 CHG[2] 240 #define CHG3 CHG[3] 241 242 /* All bitfield macros for the CHGx registers therefore changed name. */ 243 #define PPI_CHG0_CH15_Pos PPI_CHG_CH15_Pos 244 #define PPI_CHG0_CH15_Msk PPI_CHG_CH15_Msk 245 #define PPI_CHG0_CH15_Excluded PPI_CHG_CH15_Excluded 246 #define PPI_CHG0_CH15_Included PPI_CHG_CH15_Included 247 248 #define PPI_CHG0_CH14_Pos PPI_CHG_CH14_Pos 249 #define PPI_CHG0_CH14_Msk PPI_CHG_CH14_Msk 250 #define PPI_CHG0_CH14_Excluded PPI_CHG_CH14_Excluded 251 #define PPI_CHG0_CH14_Included PPI_CHG_CH14_Included 252 253 #define PPI_CHG0_CH13_Pos PPI_CHG_CH13_Pos 254 #define PPI_CHG0_CH13_Msk PPI_CHG_CH13_Msk 255 #define PPI_CHG0_CH13_Excluded PPI_CHG_CH13_Excluded 256 #define PPI_CHG0_CH13_Included PPI_CHG_CH13_Included 257 258 #define PPI_CHG0_CH12_Pos PPI_CHG_CH12_Pos 259 #define PPI_CHG0_CH12_Msk PPI_CHG_CH12_Msk 260 #define PPI_CHG0_CH12_Excluded PPI_CHG_CH12_Excluded 261 #define PPI_CHG0_CH12_Included PPI_CHG_CH12_Included 262 263 #define PPI_CHG0_CH11_Pos PPI_CHG_CH11_Pos 264 #define PPI_CHG0_CH11_Msk PPI_CHG_CH11_Msk 265 #define PPI_CHG0_CH11_Excluded PPI_CHG_CH11_Excluded 266 #define PPI_CHG0_CH11_Included PPI_CHG_CH11_Included 267 268 #define PPI_CHG0_CH10_Pos PPI_CHG_CH10_Pos 269 #define PPI_CHG0_CH10_Msk PPI_CHG_CH10_Msk 270 #define PPI_CHG0_CH10_Excluded PPI_CHG_CH10_Excluded 271 #define PPI_CHG0_CH10_Included PPI_CHG_CH10_Included 272 273 #define PPI_CHG0_CH9_Pos PPI_CHG_CH9_Pos 274 #define PPI_CHG0_CH9_Msk PPI_CHG_CH9_Msk 275 #define PPI_CHG0_CH9_Excluded PPI_CHG_CH9_Excluded 276 #define PPI_CHG0_CH9_Included PPI_CHG_CH9_Included 277 278 #define PPI_CHG0_CH8_Pos PPI_CHG_CH8_Pos 279 #define PPI_CHG0_CH8_Msk PPI_CHG_CH8_Msk 280 #define PPI_CHG0_CH8_Excluded PPI_CHG_CH8_Excluded 281 #define PPI_CHG0_CH8_Included PPI_CHG_CH8_Included 282 283 #define PPI_CHG0_CH7_Pos PPI_CHG_CH7_Pos 284 #define PPI_CHG0_CH7_Msk PPI_CHG_CH7_Msk 285 #define PPI_CHG0_CH7_Excluded PPI_CHG_CH7_Excluded 286 #define PPI_CHG0_CH7_Included PPI_CHG_CH7_Included 287 288 #define PPI_CHG0_CH6_Pos PPI_CHG_CH6_Pos 289 #define PPI_CHG0_CH6_Msk PPI_CHG_CH6_Msk 290 #define PPI_CHG0_CH6_Excluded PPI_CHG_CH6_Excluded 291 #define PPI_CHG0_CH6_Included PPI_CHG_CH6_Included 292 293 #define PPI_CHG0_CH5_Pos PPI_CHG_CH5_Pos 294 #define PPI_CHG0_CH5_Msk PPI_CHG_CH5_Msk 295 #define PPI_CHG0_CH5_Excluded PPI_CHG_CH5_Excluded 296 #define PPI_CHG0_CH5_Included PPI_CHG_CH5_Included 297 298 #define PPI_CHG0_CH4_Pos PPI_CHG_CH4_Pos 299 #define PPI_CHG0_CH4_Msk PPI_CHG_CH4_Msk 300 #define PPI_CHG0_CH4_Excluded PPI_CHG_CH4_Excluded 301 #define PPI_CHG0_CH4_Included PPI_CHG_CH4_Included 302 303 #define PPI_CHG0_CH3_Pos PPI_CHG_CH3_Pos 304 #define PPI_CHG0_CH3_Msk PPI_CHG_CH3_Msk 305 #define PPI_CHG0_CH3_Excluded PPI_CHG_CH3_Excluded 306 #define PPI_CHG0_CH3_Included PPI_CHG_CH3_Included 307 308 #define PPI_CHG0_CH2_Pos PPI_CHG_CH2_Pos 309 #define PPI_CHG0_CH2_Msk PPI_CHG_CH2_Msk 310 #define PPI_CHG0_CH2_Excluded PPI_CHG_CH2_Excluded 311 #define PPI_CHG0_CH2_Included PPI_CHG_CH2_Included 312 313 #define PPI_CHG0_CH1_Pos PPI_CHG_CH1_Pos 314 #define PPI_CHG0_CH1_Msk PPI_CHG_CH1_Msk 315 #define PPI_CHG0_CH1_Excluded PPI_CHG_CH1_Excluded 316 #define PPI_CHG0_CH1_Included PPI_CHG_CH1_Included 317 318 #define PPI_CHG0_CH0_Pos PPI_CHG_CH0_Pos 319 #define PPI_CHG0_CH0_Msk PPI_CHG_CH0_Msk 320 #define PPI_CHG0_CH0_Excluded PPI_CHG_CH0_Excluded 321 #define PPI_CHG0_CH0_Included PPI_CHG_CH0_Included 322 323 #define PPI_CHG1_CH15_Pos PPI_CHG_CH15_Pos 324 #define PPI_CHG1_CH15_Msk PPI_CHG_CH15_Msk 325 #define PPI_CHG1_CH15_Excluded PPI_CHG_CH15_Excluded 326 #define PPI_CHG1_CH15_Included PPI_CHG_CH15_Included 327 328 #define PPI_CHG1_CH14_Pos PPI_CHG_CH14_Pos 329 #define PPI_CHG1_CH14_Msk PPI_CHG_CH14_Msk 330 #define PPI_CHG1_CH14_Excluded PPI_CHG_CH14_Excluded 331 #define PPI_CHG1_CH14_Included PPI_CHG_CH14_Included 332 333 #define PPI_CHG1_CH13_Pos PPI_CHG_CH13_Pos 334 #define PPI_CHG1_CH13_Msk PPI_CHG_CH13_Msk 335 #define PPI_CHG1_CH13_Excluded PPI_CHG_CH13_Excluded 336 #define PPI_CHG1_CH13_Included PPI_CHG_CH13_Included 337 338 #define PPI_CHG1_CH12_Pos PPI_CHG_CH12_Pos 339 #define PPI_CHG1_CH12_Msk PPI_CHG_CH12_Msk 340 #define PPI_CHG1_CH12_Excluded PPI_CHG_CH12_Excluded 341 #define PPI_CHG1_CH12_Included PPI_CHG_CH12_Included 342 343 #define PPI_CHG1_CH11_Pos PPI_CHG_CH11_Pos 344 #define PPI_CHG1_CH11_Msk PPI_CHG_CH11_Msk 345 #define PPI_CHG1_CH11_Excluded PPI_CHG_CH11_Excluded 346 #define PPI_CHG1_CH11_Included PPI_CHG_CH11_Included 347 348 #define PPI_CHG1_CH10_Pos PPI_CHG_CH10_Pos 349 #define PPI_CHG1_CH10_Msk PPI_CHG_CH10_Msk 350 #define PPI_CHG1_CH10_Excluded PPI_CHG_CH10_Excluded 351 #define PPI_CHG1_CH10_Included PPI_CHG_CH10_Included 352 353 #define PPI_CHG1_CH9_Pos PPI_CHG_CH9_Pos 354 #define PPI_CHG1_CH9_Msk PPI_CHG_CH9_Msk 355 #define PPI_CHG1_CH9_Excluded PPI_CHG_CH9_Excluded 356 #define PPI_CHG1_CH9_Included PPI_CHG_CH9_Included 357 358 #define PPI_CHG1_CH8_Pos PPI_CHG_CH8_Pos 359 #define PPI_CHG1_CH8_Msk PPI_CHG_CH8_Msk 360 #define PPI_CHG1_CH8_Excluded PPI_CHG_CH8_Excluded 361 #define PPI_CHG1_CH8_Included PPI_CHG_CH8_Included 362 363 #define PPI_CHG1_CH7_Pos PPI_CHG_CH7_Pos 364 #define PPI_CHG1_CH7_Msk PPI_CHG_CH7_Msk 365 #define PPI_CHG1_CH7_Excluded PPI_CHG_CH7_Excluded 366 #define PPI_CHG1_CH7_Included PPI_CHG_CH7_Included 367 368 #define PPI_CHG1_CH6_Pos PPI_CHG_CH6_Pos 369 #define PPI_CHG1_CH6_Msk PPI_CHG_CH6_Msk 370 #define PPI_CHG1_CH6_Excluded PPI_CHG_CH6_Excluded 371 #define PPI_CHG1_CH6_Included PPI_CHG_CH6_Included 372 373 #define PPI_CHG1_CH5_Pos PPI_CHG_CH5_Pos 374 #define PPI_CHG1_CH5_Msk PPI_CHG_CH5_Msk 375 #define PPI_CHG1_CH5_Excluded PPI_CHG_CH5_Excluded 376 #define PPI_CHG1_CH5_Included PPI_CHG_CH5_Included 377 378 #define PPI_CHG1_CH4_Pos PPI_CHG_CH4_Pos 379 #define PPI_CHG1_CH4_Msk PPI_CHG_CH4_Msk 380 #define PPI_CHG1_CH4_Excluded PPI_CHG_CH4_Excluded 381 #define PPI_CHG1_CH4_Included PPI_CHG_CH4_Included 382 383 #define PPI_CHG1_CH3_Pos PPI_CHG_CH3_Pos 384 #define PPI_CHG1_CH3_Msk PPI_CHG_CH3_Msk 385 #define PPI_CHG1_CH3_Excluded PPI_CHG_CH3_Excluded 386 #define PPI_CHG1_CH3_Included PPI_CHG_CH3_Included 387 388 #define PPI_CHG1_CH2_Pos PPI_CHG_CH2_Pos 389 #define PPI_CHG1_CH2_Msk PPI_CHG_CH2_Msk 390 #define PPI_CHG1_CH2_Excluded PPI_CHG_CH2_Excluded 391 #define PPI_CHG1_CH2_Included PPI_CHG_CH2_Included 392 393 #define PPI_CHG1_CH1_Pos PPI_CHG_CH1_Pos 394 #define PPI_CHG1_CH1_Msk PPI_CHG_CH1_Msk 395 #define PPI_CHG1_CH1_Excluded PPI_CHG_CH1_Excluded 396 #define PPI_CHG1_CH1_Included PPI_CHG_CH1_Included 397 398 #define PPI_CHG1_CH0_Pos PPI_CHG_CH0_Pos 399 #define PPI_CHG1_CH0_Msk PPI_CHG_CH0_Msk 400 #define PPI_CHG1_CH0_Excluded PPI_CHG_CH0_Excluded 401 #define PPI_CHG1_CH0_Included PPI_CHG_CH0_Included 402 403 #define PPI_CHG2_CH15_Pos PPI_CHG_CH15_Pos 404 #define PPI_CHG2_CH15_Msk PPI_CHG_CH15_Msk 405 #define PPI_CHG2_CH15_Excluded PPI_CHG_CH15_Excluded 406 #define PPI_CHG2_CH15_Included PPI_CHG_CH15_Included 407 408 #define PPI_CHG2_CH14_Pos PPI_CHG_CH14_Pos 409 #define PPI_CHG2_CH14_Msk PPI_CHG_CH14_Msk 410 #define PPI_CHG2_CH14_Excluded PPI_CHG_CH14_Excluded 411 #define PPI_CHG2_CH14_Included PPI_CHG_CH14_Included 412 413 #define PPI_CHG2_CH13_Pos PPI_CHG_CH13_Pos 414 #define PPI_CHG2_CH13_Msk PPI_CHG_CH13_Msk 415 #define PPI_CHG2_CH13_Excluded PPI_CHG_CH13_Excluded 416 #define PPI_CHG2_CH13_Included PPI_CHG_CH13_Included 417 418 #define PPI_CHG2_CH12_Pos PPI_CHG_CH12_Pos 419 #define PPI_CHG2_CH12_Msk PPI_CHG_CH12_Msk 420 #define PPI_CHG2_CH12_Excluded PPI_CHG_CH12_Excluded 421 #define PPI_CHG2_CH12_Included PPI_CHG_CH12_Included 422 423 #define PPI_CHG2_CH11_Pos PPI_CHG_CH11_Pos 424 #define PPI_CHG2_CH11_Msk PPI_CHG_CH11_Msk 425 #define PPI_CHG2_CH11_Excluded PPI_CHG_CH11_Excluded 426 #define PPI_CHG2_CH11_Included PPI_CHG_CH11_Included 427 428 #define PPI_CHG2_CH10_Pos PPI_CHG_CH10_Pos 429 #define PPI_CHG2_CH10_Msk PPI_CHG_CH10_Msk 430 #define PPI_CHG2_CH10_Excluded PPI_CHG_CH10_Excluded 431 #define PPI_CHG2_CH10_Included PPI_CHG_CH10_Included 432 433 #define PPI_CHG2_CH9_Pos PPI_CHG_CH9_Pos 434 #define PPI_CHG2_CH9_Msk PPI_CHG_CH9_Msk 435 #define PPI_CHG2_CH9_Excluded PPI_CHG_CH9_Excluded 436 #define PPI_CHG2_CH9_Included PPI_CHG_CH9_Included 437 438 #define PPI_CHG2_CH8_Pos PPI_CHG_CH8_Pos 439 #define PPI_CHG2_CH8_Msk PPI_CHG_CH8_Msk 440 #define PPI_CHG2_CH8_Excluded PPI_CHG_CH8_Excluded 441 #define PPI_CHG2_CH8_Included PPI_CHG_CH8_Included 442 443 #define PPI_CHG2_CH7_Pos PPI_CHG_CH7_Pos 444 #define PPI_CHG2_CH7_Msk PPI_CHG_CH7_Msk 445 #define PPI_CHG2_CH7_Excluded PPI_CHG_CH7_Excluded 446 #define PPI_CHG2_CH7_Included PPI_CHG_CH7_Included 447 448 #define PPI_CHG2_CH6_Pos PPI_CHG_CH6_Pos 449 #define PPI_CHG2_CH6_Msk PPI_CHG_CH6_Msk 450 #define PPI_CHG2_CH6_Excluded PPI_CHG_CH6_Excluded 451 #define PPI_CHG2_CH6_Included PPI_CHG_CH6_Included 452 453 #define PPI_CHG2_CH5_Pos PPI_CHG_CH5_Pos 454 #define PPI_CHG2_CH5_Msk PPI_CHG_CH5_Msk 455 #define PPI_CHG2_CH5_Excluded PPI_CHG_CH5_Excluded 456 #define PPI_CHG2_CH5_Included PPI_CHG_CH5_Included 457 458 #define PPI_CHG2_CH4_Pos PPI_CHG_CH4_Pos 459 #define PPI_CHG2_CH4_Msk PPI_CHG_CH4_Msk 460 #define PPI_CHG2_CH4_Excluded PPI_CHG_CH4_Excluded 461 #define PPI_CHG2_CH4_Included PPI_CHG_CH4_Included 462 463 #define PPI_CHG2_CH3_Pos PPI_CHG_CH3_Pos 464 #define PPI_CHG2_CH3_Msk PPI_CHG_CH3_Msk 465 #define PPI_CHG2_CH3_Excluded PPI_CHG_CH3_Excluded 466 #define PPI_CHG2_CH3_Included PPI_CHG_CH3_Included 467 468 #define PPI_CHG2_CH2_Pos PPI_CHG_CH2_Pos 469 #define PPI_CHG2_CH2_Msk PPI_CHG_CH2_Msk 470 #define PPI_CHG2_CH2_Excluded PPI_CHG_CH2_Excluded 471 #define PPI_CHG2_CH2_Included PPI_CHG_CH2_Included 472 473 #define PPI_CHG2_CH1_Pos PPI_CHG_CH1_Pos 474 #define PPI_CHG2_CH1_Msk PPI_CHG_CH1_Msk 475 #define PPI_CHG2_CH1_Excluded PPI_CHG_CH1_Excluded 476 #define PPI_CHG2_CH1_Included PPI_CHG_CH1_Included 477 478 #define PPI_CHG2_CH0_Pos PPI_CHG_CH0_Pos 479 #define PPI_CHG2_CH0_Msk PPI_CHG_CH0_Msk 480 #define PPI_CHG2_CH0_Excluded PPI_CHG_CH0_Excluded 481 #define PPI_CHG2_CH0_Included PPI_CHG_CH0_Included 482 483 #define PPI_CHG3_CH15_Pos PPI_CHG_CH15_Pos 484 #define PPI_CHG3_CH15_Msk PPI_CHG_CH15_Msk 485 #define PPI_CHG3_CH15_Excluded PPI_CHG_CH15_Excluded 486 #define PPI_CHG3_CH15_Included PPI_CHG_CH15_Included 487 488 #define PPI_CHG3_CH14_Pos PPI_CHG_CH14_Pos 489 #define PPI_CHG3_CH14_Msk PPI_CHG_CH14_Msk 490 #define PPI_CHG3_CH14_Excluded PPI_CHG_CH14_Excluded 491 #define PPI_CHG3_CH14_Included PPI_CHG_CH14_Included 492 493 #define PPI_CHG3_CH13_Pos PPI_CHG_CH13_Pos 494 #define PPI_CHG3_CH13_Msk PPI_CHG_CH13_Msk 495 #define PPI_CHG3_CH13_Excluded PPI_CHG_CH13_Excluded 496 #define PPI_CHG3_CH13_Included PPI_CHG_CH13_Included 497 498 #define PPI_CHG3_CH12_Pos PPI_CHG_CH12_Pos 499 #define PPI_CHG3_CH12_Msk PPI_CHG_CH12_Msk 500 #define PPI_CHG3_CH12_Excluded PPI_CHG_CH12_Excluded 501 #define PPI_CHG3_CH12_Included PPI_CHG_CH12_Included 502 503 #define PPI_CHG3_CH11_Pos PPI_CHG_CH11_Pos 504 #define PPI_CHG3_CH11_Msk PPI_CHG_CH11_Msk 505 #define PPI_CHG3_CH11_Excluded PPI_CHG_CH11_Excluded 506 #define PPI_CHG3_CH11_Included PPI_CHG_CH11_Included 507 508 #define PPI_CHG3_CH10_Pos PPI_CHG_CH10_Pos 509 #define PPI_CHG3_CH10_Msk PPI_CHG_CH10_Msk 510 #define PPI_CHG3_CH10_Excluded PPI_CHG_CH10_Excluded 511 #define PPI_CHG3_CH10_Included PPI_CHG_CH10_Included 512 513 #define PPI_CHG3_CH9_Pos PPI_CHG_CH9_Pos 514 #define PPI_CHG3_CH9_Msk PPI_CHG_CH9_Msk 515 #define PPI_CHG3_CH9_Excluded PPI_CHG_CH9_Excluded 516 #define PPI_CHG3_CH9_Included PPI_CHG_CH9_Included 517 518 #define PPI_CHG3_CH8_Pos PPI_CHG_CH8_Pos 519 #define PPI_CHG3_CH8_Msk PPI_CHG_CH8_Msk 520 #define PPI_CHG3_CH8_Excluded PPI_CHG_CH8_Excluded 521 #define PPI_CHG3_CH8_Included PPI_CHG_CH8_Included 522 523 #define PPI_CHG3_CH7_Pos PPI_CHG_CH7_Pos 524 #define PPI_CHG3_CH7_Msk PPI_CHG_CH7_Msk 525 #define PPI_CHG3_CH7_Excluded PPI_CHG_CH7_Excluded 526 #define PPI_CHG3_CH7_Included PPI_CHG_CH7_Included 527 528 #define PPI_CHG3_CH6_Pos PPI_CHG_CH6_Pos 529 #define PPI_CHG3_CH6_Msk PPI_CHG_CH6_Msk 530 #define PPI_CHG3_CH6_Excluded PPI_CHG_CH6_Excluded 531 #define PPI_CHG3_CH6_Included PPI_CHG_CH6_Included 532 533 #define PPI_CHG3_CH5_Pos PPI_CHG_CH5_Pos 534 #define PPI_CHG3_CH5_Msk PPI_CHG_CH5_Msk 535 #define PPI_CHG3_CH5_Excluded PPI_CHG_CH5_Excluded 536 #define PPI_CHG3_CH5_Included PPI_CHG_CH5_Included 537 538 #define PPI_CHG3_CH4_Pos PPI_CHG_CH4_Pos 539 #define PPI_CHG3_CH4_Msk PPI_CHG_CH4_Msk 540 #define PPI_CHG3_CH4_Excluded PPI_CHG_CH4_Excluded 541 #define PPI_CHG3_CH4_Included PPI_CHG_CH4_Included 542 543 #define PPI_CHG3_CH3_Pos PPI_CHG_CH3_Pos 544 #define PPI_CHG3_CH3_Msk PPI_CHG_CH3_Msk 545 #define PPI_CHG3_CH3_Excluded PPI_CHG_CH3_Excluded 546 #define PPI_CHG3_CH3_Included PPI_CHG_CH3_Included 547 548 #define PPI_CHG3_CH2_Pos PPI_CHG_CH2_Pos 549 #define PPI_CHG3_CH2_Msk PPI_CHG_CH2_Msk 550 #define PPI_CHG3_CH2_Excluded PPI_CHG_CH2_Excluded 551 #define PPI_CHG3_CH2_Included PPI_CHG_CH2_Included 552 553 #define PPI_CHG3_CH1_Pos PPI_CHG_CH1_Pos 554 #define PPI_CHG3_CH1_Msk PPI_CHG_CH1_Msk 555 #define PPI_CHG3_CH1_Excluded PPI_CHG_CH1_Excluded 556 #define PPI_CHG3_CH1_Included PPI_CHG_CH1_Included 557 558 #define PPI_CHG3_CH0_Pos PPI_CHG_CH0_Pos 559 #define PPI_CHG3_CH0_Msk PPI_CHG_CH0_Msk 560 #define PPI_CHG3_CH0_Excluded PPI_CHG_CH0_Excluded 561 #define PPI_CHG3_CH0_Included PPI_CHG_CH0_Included 562 563 564 565 566 /*lint --flb "Leave library region" */ 567 568 #endif /* NRF51_TO_NRF52840_H */ 569 570