xref: /nrf52832-nimble/nordic/nrfx/mdk/nrf51_to_nrf52810.h (revision 150812a83cab50279bd772ef6db1bfaf255f2c5b)
1 /*
2 
3 Copyright (c) 2010 - 2018, Nordic Semiconductor ASA All rights reserved.
4 
5 Redistribution and use in source and binary forms, with or without
6 modification, are permitted provided that the following conditions are met:
7 
8 1. Redistributions of source code must retain the above copyright notice, this
9    list of conditions and the following disclaimer.
10 
11 2. Redistributions in binary form must reproduce the above copyright
12    notice, this list of conditions and the following disclaimer in the
13    documentation and/or other materials provided with the distribution.
14 
15 3. Neither the name of Nordic Semiconductor ASA nor the names of its
16    contributors may be used to endorse or promote products derived from this
17    software without specific prior written permission.
18 
19 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
22 ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
23 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 POSSIBILITY OF SUCH DAMAGE.
30 
31 */
32 
33 #ifndef NRF51_TO_NRF52810_H
34 #define NRF51_TO_NRF52810_H
35 
36 /*lint ++flb "Enter library region */
37 
38 /* This file is given to prevent your SW from not compiling with the name changes between nRF51 and nRF52840 devices.
39  * It redefines the old nRF51 names into the new ones as long as the functionality is still supported. If the
40  * functionality is gone, there old names are not defined, so compilation will fail. Note that also includes macros
41  * from the nrf51_deprecated.h file. */
42 
43 
44  /* Differences between latest nRF51 headers and nRF52810 headers. */
45 
46 /* IRQ */
47 /* Several peripherals have been added to several indexes. Names of IRQ handlers and IRQ numbers have changed. */
48 #define SWI0_IRQHandler         SWI0_EGU0_IRQHandler
49 #define SWI1_IRQHandler         SWI1_EGU1_IRQHandler
50 
51 #define SWI0_IRQn               SWI0_EGU0_IRQn
52 #define SWI1_IRQn               SWI1_EGU1_IRQn
53 
54 
55 /* UICR */
56 /* Register RBPCONF was renamed to APPROTECT. */
57 #define RBPCONF     APPROTECT
58 
59 #define UICR_RBPCONF_PALL_Pos           UICR_APPROTECT_PALL_Pos
60 #define UICR_RBPCONF_PALL_Msk           UICR_APPROTECT_PALL_Msk
61 #define UICR_RBPCONF_PALL_Enabled       UICR_APPROTECT_PALL_Enabled
62 #define UICR_RBPCONF_PALL_Disabled      UICR_APPROTECT_PALL_Disabled
63 
64 
65 /* GPIO */
66 /* GPIO port was renamed to P0. */
67 #define NRF_GPIO        NRF_P0
68 #define NRF_GPIO_BASE   NRF_P0_BASE
69 
70 
71 /* QDEC */
72 /* The registers PSELA, PSELB and PSELLED were restructured into a struct. */
73 #define PSELLED     PSEL.LED
74 #define PSELA       PSEL.A
75 #define PSELB       PSEL.B
76 
77 
78 /* SPIS */
79 /* The registers PSELSCK, PSELMISO, PSELMOSI, PSELCSN were restructured into a struct. */
80 #define PSELSCK       PSEL.SCK
81 #define PSELMISO      PSEL.MISO
82 #define PSELMOSI      PSEL.MOSI
83 #define PSELCSN       PSEL.CSN
84 
85 /* The registers RXDPTR, MAXRX, AMOUNTRX were restructured into a struct */
86 #define RXDPTR        RXD.PTR
87 #define MAXRX         RXD.MAXCNT
88 #define AMOUNTRX      RXD.AMOUNT
89 
90 #define SPIS_MAXRX_MAXRX_Pos        SPIS_RXD_MAXCNT_MAXCNT_Pos
91 #define SPIS_MAXRX_MAXRX_Msk        SPIS_RXD_MAXCNT_MAXCNT_Msk
92 
93 #define SPIS_AMOUNTRX_AMOUNTRX_Pos  SPIS_RXD_AMOUNT_AMOUNT_Pos
94 #define SPIS_AMOUNTRX_AMOUNTRX_Msk  SPIS_RXD_AMOUNT_AMOUNT_Msk
95 
96 /* The registers TXDPTR, MAXTX, AMOUNTTX were restructured into a struct */
97 #define TXDPTR        TXD.PTR
98 #define MAXTX         TXD.MAXCNT
99 #define AMOUNTTX      TXD.AMOUNT
100 
101 #define SPIS_MAXTX_MAXTX_Pos        SPIS_TXD_MAXCNT_MAXCNT_Pos
102 #define SPIS_MAXTX_MAXTX_Msk        SPIS_TXD_MAXCNT_MAXCNT_Msk
103 
104 #define SPIS_AMOUNTTX_AMOUNTTX_Pos  SPIS_TXD_AMOUNT_AMOUNT_Pos
105 #define SPIS_AMOUNTTX_AMOUNTTX_Msk  SPIS_TXD_AMOUNT_AMOUNT_Msk
106 
107 
108 /* From nrf51_deprecated.h. Several macros changed in different versions of nRF52 headers. By defining the following, any code written for any version of nRF52 headers will still compile. */
109 
110 /* NVMC */
111 /* The register ERASEPROTECTEDPAGE changed name to ERASEPCR0 in the documentation. */
112 #define ERASEPROTECTEDPAGE      ERASEPCR0
113 
114 
115 /* RADIO */
116 /* The name of the field SKIPADDR was corrected. Old macros added for compatibility. */
117 #define RADIO_CRCCNF_SKIP_ADDR_Pos      RADIO_CRCCNF_SKIPADDR_Pos
118 #define RADIO_CRCCNF_SKIP_ADDR_Msk      RADIO_CRCCNF_SKIPADDR_Msk
119 #define RADIO_CRCCNF_SKIP_ADDR_Include  RADIO_CRCCNF_SKIPADDR_Include
120 #define RADIO_CRCCNF_SKIP_ADDR_Skip     RADIO_CRCCNF_SKIPADDR_Skip
121 
122 
123 /* FICR */
124 /* The registers FICR.DEVICEID0 and FICR.DEVICEID1 were renamed into an array. */
125 #define DEVICEID0       DEVICEID[0]
126 #define DEVICEID1       DEVICEID[1]
127 
128 /* The registers FICR.ER0, FICR.ER1, FICR.ER2 and FICR.ER3 were renamed into an array. */
129 #define ER0             ER[0]
130 #define ER1             ER[1]
131 #define ER2             ER[2]
132 #define ER3             ER[3]
133 
134 /* The registers FICR.IR0, FICR.IR1, FICR.IR2 and FICR.IR3 were renamed into an array. */
135 #define IR0             IR[0]
136 #define IR1             IR[1]
137 #define IR2             IR[2]
138 #define IR3             IR[3]
139 
140 /* The registers FICR.DEVICEADDR0 and FICR.DEVICEADDR1 were renamed into an array. */
141 #define DEVICEADDR0     DEVICEADDR[0]
142 #define DEVICEADDR1     DEVICEADDR[1]
143 
144 
145 /* PPI */
146 /* The tasks PPI.TASKS_CHGxEN and PPI.TASKS_CHGxDIS were renamed into an array of structs. */
147 #define TASKS_CHG0EN     TASKS_CHG[0].EN
148 #define TASKS_CHG0DIS    TASKS_CHG[0].DIS
149 #define TASKS_CHG1EN     TASKS_CHG[1].EN
150 #define TASKS_CHG1DIS    TASKS_CHG[1].DIS
151 #define TASKS_CHG2EN     TASKS_CHG[2].EN
152 #define TASKS_CHG2DIS    TASKS_CHG[2].DIS
153 #define TASKS_CHG3EN     TASKS_CHG[3].EN
154 #define TASKS_CHG3DIS    TASKS_CHG[3].DIS
155 
156 /* The registers PPI.CHx_EEP and PPI.CHx_TEP were renamed into an array of structs. */
157 #define CH0_EEP          CH[0].EEP
158 #define CH0_TEP          CH[0].TEP
159 #define CH1_EEP          CH[1].EEP
160 #define CH1_TEP          CH[1].TEP
161 #define CH2_EEP          CH[2].EEP
162 #define CH2_TEP          CH[2].TEP
163 #define CH3_EEP          CH[3].EEP
164 #define CH3_TEP          CH[3].TEP
165 #define CH4_EEP          CH[4].EEP
166 #define CH4_TEP          CH[4].TEP
167 #define CH5_EEP          CH[5].EEP
168 #define CH5_TEP          CH[5].TEP
169 #define CH6_EEP          CH[6].EEP
170 #define CH6_TEP          CH[6].TEP
171 #define CH7_EEP          CH[7].EEP
172 #define CH7_TEP          CH[7].TEP
173 #define CH8_EEP          CH[8].EEP
174 #define CH8_TEP          CH[8].TEP
175 #define CH9_EEP          CH[9].EEP
176 #define CH9_TEP          CH[9].TEP
177 #define CH10_EEP         CH[10].EEP
178 #define CH10_TEP         CH[10].TEP
179 #define CH11_EEP         CH[11].EEP
180 #define CH11_TEP         CH[11].TEP
181 #define CH12_EEP         CH[12].EEP
182 #define CH12_TEP         CH[12].TEP
183 #define CH13_EEP         CH[13].EEP
184 #define CH13_TEP         CH[13].TEP
185 #define CH14_EEP         CH[14].EEP
186 #define CH14_TEP         CH[14].TEP
187 #define CH15_EEP         CH[15].EEP
188 #define CH15_TEP         CH[15].TEP
189 
190 /* The registers PPI.CHG0, PPI.CHG1, PPI.CHG2 and PPI.CHG3 were renamed into an array. */
191 #define CHG0             CHG[0]
192 #define CHG1             CHG[1]
193 #define CHG2             CHG[2]
194 #define CHG3             CHG[3]
195 
196 /* All bitfield macros for the CHGx registers therefore changed name. */
197 #define PPI_CHG0_CH15_Pos       PPI_CHG_CH15_Pos
198 #define PPI_CHG0_CH15_Msk       PPI_CHG_CH15_Msk
199 #define PPI_CHG0_CH15_Excluded  PPI_CHG_CH15_Excluded
200 #define PPI_CHG0_CH15_Included  PPI_CHG_CH15_Included
201 
202 #define PPI_CHG0_CH14_Pos       PPI_CHG_CH14_Pos
203 #define PPI_CHG0_CH14_Msk       PPI_CHG_CH14_Msk
204 #define PPI_CHG0_CH14_Excluded  PPI_CHG_CH14_Excluded
205 #define PPI_CHG0_CH14_Included  PPI_CHG_CH14_Included
206 
207 #define PPI_CHG0_CH13_Pos       PPI_CHG_CH13_Pos
208 #define PPI_CHG0_CH13_Msk       PPI_CHG_CH13_Msk
209 #define PPI_CHG0_CH13_Excluded  PPI_CHG_CH13_Excluded
210 #define PPI_CHG0_CH13_Included  PPI_CHG_CH13_Included
211 
212 #define PPI_CHG0_CH12_Pos       PPI_CHG_CH12_Pos
213 #define PPI_CHG0_CH12_Msk       PPI_CHG_CH12_Msk
214 #define PPI_CHG0_CH12_Excluded  PPI_CHG_CH12_Excluded
215 #define PPI_CHG0_CH12_Included  PPI_CHG_CH12_Included
216 
217 #define PPI_CHG0_CH11_Pos       PPI_CHG_CH11_Pos
218 #define PPI_CHG0_CH11_Msk       PPI_CHG_CH11_Msk
219 #define PPI_CHG0_CH11_Excluded  PPI_CHG_CH11_Excluded
220 #define PPI_CHG0_CH11_Included  PPI_CHG_CH11_Included
221 
222 #define PPI_CHG0_CH10_Pos       PPI_CHG_CH10_Pos
223 #define PPI_CHG0_CH10_Msk       PPI_CHG_CH10_Msk
224 #define PPI_CHG0_CH10_Excluded  PPI_CHG_CH10_Excluded
225 #define PPI_CHG0_CH10_Included  PPI_CHG_CH10_Included
226 
227 #define PPI_CHG0_CH9_Pos        PPI_CHG_CH9_Pos
228 #define PPI_CHG0_CH9_Msk        PPI_CHG_CH9_Msk
229 #define PPI_CHG0_CH9_Excluded   PPI_CHG_CH9_Excluded
230 #define PPI_CHG0_CH9_Included   PPI_CHG_CH9_Included
231 
232 #define PPI_CHG0_CH8_Pos        PPI_CHG_CH8_Pos
233 #define PPI_CHG0_CH8_Msk        PPI_CHG_CH8_Msk
234 #define PPI_CHG0_CH8_Excluded   PPI_CHG_CH8_Excluded
235 #define PPI_CHG0_CH8_Included   PPI_CHG_CH8_Included
236 
237 #define PPI_CHG0_CH7_Pos        PPI_CHG_CH7_Pos
238 #define PPI_CHG0_CH7_Msk        PPI_CHG_CH7_Msk
239 #define PPI_CHG0_CH7_Excluded   PPI_CHG_CH7_Excluded
240 #define PPI_CHG0_CH7_Included   PPI_CHG_CH7_Included
241 
242 #define PPI_CHG0_CH6_Pos        PPI_CHG_CH6_Pos
243 #define PPI_CHG0_CH6_Msk        PPI_CHG_CH6_Msk
244 #define PPI_CHG0_CH6_Excluded   PPI_CHG_CH6_Excluded
245 #define PPI_CHG0_CH6_Included   PPI_CHG_CH6_Included
246 
247 #define PPI_CHG0_CH5_Pos        PPI_CHG_CH5_Pos
248 #define PPI_CHG0_CH5_Msk        PPI_CHG_CH5_Msk
249 #define PPI_CHG0_CH5_Excluded   PPI_CHG_CH5_Excluded
250 #define PPI_CHG0_CH5_Included   PPI_CHG_CH5_Included
251 
252 #define PPI_CHG0_CH4_Pos        PPI_CHG_CH4_Pos
253 #define PPI_CHG0_CH4_Msk        PPI_CHG_CH4_Msk
254 #define PPI_CHG0_CH4_Excluded   PPI_CHG_CH4_Excluded
255 #define PPI_CHG0_CH4_Included   PPI_CHG_CH4_Included
256 
257 #define PPI_CHG0_CH3_Pos        PPI_CHG_CH3_Pos
258 #define PPI_CHG0_CH3_Msk        PPI_CHG_CH3_Msk
259 #define PPI_CHG0_CH3_Excluded   PPI_CHG_CH3_Excluded
260 #define PPI_CHG0_CH3_Included   PPI_CHG_CH3_Included
261 
262 #define PPI_CHG0_CH2_Pos        PPI_CHG_CH2_Pos
263 #define PPI_CHG0_CH2_Msk        PPI_CHG_CH2_Msk
264 #define PPI_CHG0_CH2_Excluded   PPI_CHG_CH2_Excluded
265 #define PPI_CHG0_CH2_Included   PPI_CHG_CH2_Included
266 
267 #define PPI_CHG0_CH1_Pos        PPI_CHG_CH1_Pos
268 #define PPI_CHG0_CH1_Msk        PPI_CHG_CH1_Msk
269 #define PPI_CHG0_CH1_Excluded   PPI_CHG_CH1_Excluded
270 #define PPI_CHG0_CH1_Included   PPI_CHG_CH1_Included
271 
272 #define PPI_CHG0_CH0_Pos        PPI_CHG_CH0_Pos
273 #define PPI_CHG0_CH0_Msk        PPI_CHG_CH0_Msk
274 #define PPI_CHG0_CH0_Excluded   PPI_CHG_CH0_Excluded
275 #define PPI_CHG0_CH0_Included   PPI_CHG_CH0_Included
276 
277 #define PPI_CHG1_CH15_Pos       PPI_CHG_CH15_Pos
278 #define PPI_CHG1_CH15_Msk       PPI_CHG_CH15_Msk
279 #define PPI_CHG1_CH15_Excluded  PPI_CHG_CH15_Excluded
280 #define PPI_CHG1_CH15_Included  PPI_CHG_CH15_Included
281 
282 #define PPI_CHG1_CH14_Pos       PPI_CHG_CH14_Pos
283 #define PPI_CHG1_CH14_Msk       PPI_CHG_CH14_Msk
284 #define PPI_CHG1_CH14_Excluded  PPI_CHG_CH14_Excluded
285 #define PPI_CHG1_CH14_Included  PPI_CHG_CH14_Included
286 
287 #define PPI_CHG1_CH13_Pos       PPI_CHG_CH13_Pos
288 #define PPI_CHG1_CH13_Msk       PPI_CHG_CH13_Msk
289 #define PPI_CHG1_CH13_Excluded  PPI_CHG_CH13_Excluded
290 #define PPI_CHG1_CH13_Included  PPI_CHG_CH13_Included
291 
292 #define PPI_CHG1_CH12_Pos       PPI_CHG_CH12_Pos
293 #define PPI_CHG1_CH12_Msk       PPI_CHG_CH12_Msk
294 #define PPI_CHG1_CH12_Excluded  PPI_CHG_CH12_Excluded
295 #define PPI_CHG1_CH12_Included  PPI_CHG_CH12_Included
296 
297 #define PPI_CHG1_CH11_Pos       PPI_CHG_CH11_Pos
298 #define PPI_CHG1_CH11_Msk       PPI_CHG_CH11_Msk
299 #define PPI_CHG1_CH11_Excluded  PPI_CHG_CH11_Excluded
300 #define PPI_CHG1_CH11_Included  PPI_CHG_CH11_Included
301 
302 #define PPI_CHG1_CH10_Pos       PPI_CHG_CH10_Pos
303 #define PPI_CHG1_CH10_Msk       PPI_CHG_CH10_Msk
304 #define PPI_CHG1_CH10_Excluded  PPI_CHG_CH10_Excluded
305 #define PPI_CHG1_CH10_Included  PPI_CHG_CH10_Included
306 
307 #define PPI_CHG1_CH9_Pos        PPI_CHG_CH9_Pos
308 #define PPI_CHG1_CH9_Msk        PPI_CHG_CH9_Msk
309 #define PPI_CHG1_CH9_Excluded   PPI_CHG_CH9_Excluded
310 #define PPI_CHG1_CH9_Included   PPI_CHG_CH9_Included
311 
312 #define PPI_CHG1_CH8_Pos        PPI_CHG_CH8_Pos
313 #define PPI_CHG1_CH8_Msk        PPI_CHG_CH8_Msk
314 #define PPI_CHG1_CH8_Excluded   PPI_CHG_CH8_Excluded
315 #define PPI_CHG1_CH8_Included   PPI_CHG_CH8_Included
316 
317 #define PPI_CHG1_CH7_Pos        PPI_CHG_CH7_Pos
318 #define PPI_CHG1_CH7_Msk        PPI_CHG_CH7_Msk
319 #define PPI_CHG1_CH7_Excluded   PPI_CHG_CH7_Excluded
320 #define PPI_CHG1_CH7_Included   PPI_CHG_CH7_Included
321 
322 #define PPI_CHG1_CH6_Pos        PPI_CHG_CH6_Pos
323 #define PPI_CHG1_CH6_Msk        PPI_CHG_CH6_Msk
324 #define PPI_CHG1_CH6_Excluded   PPI_CHG_CH6_Excluded
325 #define PPI_CHG1_CH6_Included   PPI_CHG_CH6_Included
326 
327 #define PPI_CHG1_CH5_Pos        PPI_CHG_CH5_Pos
328 #define PPI_CHG1_CH5_Msk        PPI_CHG_CH5_Msk
329 #define PPI_CHG1_CH5_Excluded   PPI_CHG_CH5_Excluded
330 #define PPI_CHG1_CH5_Included   PPI_CHG_CH5_Included
331 
332 #define PPI_CHG1_CH4_Pos        PPI_CHG_CH4_Pos
333 #define PPI_CHG1_CH4_Msk        PPI_CHG_CH4_Msk
334 #define PPI_CHG1_CH4_Excluded   PPI_CHG_CH4_Excluded
335 #define PPI_CHG1_CH4_Included   PPI_CHG_CH4_Included
336 
337 #define PPI_CHG1_CH3_Pos        PPI_CHG_CH3_Pos
338 #define PPI_CHG1_CH3_Msk        PPI_CHG_CH3_Msk
339 #define PPI_CHG1_CH3_Excluded   PPI_CHG_CH3_Excluded
340 #define PPI_CHG1_CH3_Included   PPI_CHG_CH3_Included
341 
342 #define PPI_CHG1_CH2_Pos        PPI_CHG_CH2_Pos
343 #define PPI_CHG1_CH2_Msk        PPI_CHG_CH2_Msk
344 #define PPI_CHG1_CH2_Excluded   PPI_CHG_CH2_Excluded
345 #define PPI_CHG1_CH2_Included   PPI_CHG_CH2_Included
346 
347 #define PPI_CHG1_CH1_Pos        PPI_CHG_CH1_Pos
348 #define PPI_CHG1_CH1_Msk        PPI_CHG_CH1_Msk
349 #define PPI_CHG1_CH1_Excluded   PPI_CHG_CH1_Excluded
350 #define PPI_CHG1_CH1_Included   PPI_CHG_CH1_Included
351 
352 #define PPI_CHG1_CH0_Pos        PPI_CHG_CH0_Pos
353 #define PPI_CHG1_CH0_Msk        PPI_CHG_CH0_Msk
354 #define PPI_CHG1_CH0_Excluded   PPI_CHG_CH0_Excluded
355 #define PPI_CHG1_CH0_Included   PPI_CHG_CH0_Included
356 
357 #define PPI_CHG2_CH15_Pos       PPI_CHG_CH15_Pos
358 #define PPI_CHG2_CH15_Msk       PPI_CHG_CH15_Msk
359 #define PPI_CHG2_CH15_Excluded  PPI_CHG_CH15_Excluded
360 #define PPI_CHG2_CH15_Included  PPI_CHG_CH15_Included
361 
362 #define PPI_CHG2_CH14_Pos       PPI_CHG_CH14_Pos
363 #define PPI_CHG2_CH14_Msk       PPI_CHG_CH14_Msk
364 #define PPI_CHG2_CH14_Excluded  PPI_CHG_CH14_Excluded
365 #define PPI_CHG2_CH14_Included  PPI_CHG_CH14_Included
366 
367 #define PPI_CHG2_CH13_Pos       PPI_CHG_CH13_Pos
368 #define PPI_CHG2_CH13_Msk       PPI_CHG_CH13_Msk
369 #define PPI_CHG2_CH13_Excluded  PPI_CHG_CH13_Excluded
370 #define PPI_CHG2_CH13_Included  PPI_CHG_CH13_Included
371 
372 #define PPI_CHG2_CH12_Pos       PPI_CHG_CH12_Pos
373 #define PPI_CHG2_CH12_Msk       PPI_CHG_CH12_Msk
374 #define PPI_CHG2_CH12_Excluded  PPI_CHG_CH12_Excluded
375 #define PPI_CHG2_CH12_Included  PPI_CHG_CH12_Included
376 
377 #define PPI_CHG2_CH11_Pos       PPI_CHG_CH11_Pos
378 #define PPI_CHG2_CH11_Msk       PPI_CHG_CH11_Msk
379 #define PPI_CHG2_CH11_Excluded  PPI_CHG_CH11_Excluded
380 #define PPI_CHG2_CH11_Included  PPI_CHG_CH11_Included
381 
382 #define PPI_CHG2_CH10_Pos       PPI_CHG_CH10_Pos
383 #define PPI_CHG2_CH10_Msk       PPI_CHG_CH10_Msk
384 #define PPI_CHG2_CH10_Excluded  PPI_CHG_CH10_Excluded
385 #define PPI_CHG2_CH10_Included  PPI_CHG_CH10_Included
386 
387 #define PPI_CHG2_CH9_Pos        PPI_CHG_CH9_Pos
388 #define PPI_CHG2_CH9_Msk        PPI_CHG_CH9_Msk
389 #define PPI_CHG2_CH9_Excluded   PPI_CHG_CH9_Excluded
390 #define PPI_CHG2_CH9_Included   PPI_CHG_CH9_Included
391 
392 #define PPI_CHG2_CH8_Pos        PPI_CHG_CH8_Pos
393 #define PPI_CHG2_CH8_Msk        PPI_CHG_CH8_Msk
394 #define PPI_CHG2_CH8_Excluded   PPI_CHG_CH8_Excluded
395 #define PPI_CHG2_CH8_Included   PPI_CHG_CH8_Included
396 
397 #define PPI_CHG2_CH7_Pos        PPI_CHG_CH7_Pos
398 #define PPI_CHG2_CH7_Msk        PPI_CHG_CH7_Msk
399 #define PPI_CHG2_CH7_Excluded   PPI_CHG_CH7_Excluded
400 #define PPI_CHG2_CH7_Included   PPI_CHG_CH7_Included
401 
402 #define PPI_CHG2_CH6_Pos        PPI_CHG_CH6_Pos
403 #define PPI_CHG2_CH6_Msk        PPI_CHG_CH6_Msk
404 #define PPI_CHG2_CH6_Excluded   PPI_CHG_CH6_Excluded
405 #define PPI_CHG2_CH6_Included   PPI_CHG_CH6_Included
406 
407 #define PPI_CHG2_CH5_Pos        PPI_CHG_CH5_Pos
408 #define PPI_CHG2_CH5_Msk        PPI_CHG_CH5_Msk
409 #define PPI_CHG2_CH5_Excluded   PPI_CHG_CH5_Excluded
410 #define PPI_CHG2_CH5_Included   PPI_CHG_CH5_Included
411 
412 #define PPI_CHG2_CH4_Pos        PPI_CHG_CH4_Pos
413 #define PPI_CHG2_CH4_Msk        PPI_CHG_CH4_Msk
414 #define PPI_CHG2_CH4_Excluded   PPI_CHG_CH4_Excluded
415 #define PPI_CHG2_CH4_Included   PPI_CHG_CH4_Included
416 
417 #define PPI_CHG2_CH3_Pos        PPI_CHG_CH3_Pos
418 #define PPI_CHG2_CH3_Msk        PPI_CHG_CH3_Msk
419 #define PPI_CHG2_CH3_Excluded   PPI_CHG_CH3_Excluded
420 #define PPI_CHG2_CH3_Included   PPI_CHG_CH3_Included
421 
422 #define PPI_CHG2_CH2_Pos        PPI_CHG_CH2_Pos
423 #define PPI_CHG2_CH2_Msk        PPI_CHG_CH2_Msk
424 #define PPI_CHG2_CH2_Excluded   PPI_CHG_CH2_Excluded
425 #define PPI_CHG2_CH2_Included   PPI_CHG_CH2_Included
426 
427 #define PPI_CHG2_CH1_Pos        PPI_CHG_CH1_Pos
428 #define PPI_CHG2_CH1_Msk        PPI_CHG_CH1_Msk
429 #define PPI_CHG2_CH1_Excluded   PPI_CHG_CH1_Excluded
430 #define PPI_CHG2_CH1_Included   PPI_CHG_CH1_Included
431 
432 #define PPI_CHG2_CH0_Pos        PPI_CHG_CH0_Pos
433 #define PPI_CHG2_CH0_Msk        PPI_CHG_CH0_Msk
434 #define PPI_CHG2_CH0_Excluded   PPI_CHG_CH0_Excluded
435 #define PPI_CHG2_CH0_Included   PPI_CHG_CH0_Included
436 
437 #define PPI_CHG3_CH15_Pos       PPI_CHG_CH15_Pos
438 #define PPI_CHG3_CH15_Msk       PPI_CHG_CH15_Msk
439 #define PPI_CHG3_CH15_Excluded  PPI_CHG_CH15_Excluded
440 #define PPI_CHG3_CH15_Included  PPI_CHG_CH15_Included
441 
442 #define PPI_CHG3_CH14_Pos       PPI_CHG_CH14_Pos
443 #define PPI_CHG3_CH14_Msk       PPI_CHG_CH14_Msk
444 #define PPI_CHG3_CH14_Excluded  PPI_CHG_CH14_Excluded
445 #define PPI_CHG3_CH14_Included  PPI_CHG_CH14_Included
446 
447 #define PPI_CHG3_CH13_Pos       PPI_CHG_CH13_Pos
448 #define PPI_CHG3_CH13_Msk       PPI_CHG_CH13_Msk
449 #define PPI_CHG3_CH13_Excluded  PPI_CHG_CH13_Excluded
450 #define PPI_CHG3_CH13_Included  PPI_CHG_CH13_Included
451 
452 #define PPI_CHG3_CH12_Pos       PPI_CHG_CH12_Pos
453 #define PPI_CHG3_CH12_Msk       PPI_CHG_CH12_Msk
454 #define PPI_CHG3_CH12_Excluded  PPI_CHG_CH12_Excluded
455 #define PPI_CHG3_CH12_Included  PPI_CHG_CH12_Included
456 
457 #define PPI_CHG3_CH11_Pos       PPI_CHG_CH11_Pos
458 #define PPI_CHG3_CH11_Msk       PPI_CHG_CH11_Msk
459 #define PPI_CHG3_CH11_Excluded  PPI_CHG_CH11_Excluded
460 #define PPI_CHG3_CH11_Included  PPI_CHG_CH11_Included
461 
462 #define PPI_CHG3_CH10_Pos       PPI_CHG_CH10_Pos
463 #define PPI_CHG3_CH10_Msk       PPI_CHG_CH10_Msk
464 #define PPI_CHG3_CH10_Excluded  PPI_CHG_CH10_Excluded
465 #define PPI_CHG3_CH10_Included  PPI_CHG_CH10_Included
466 
467 #define PPI_CHG3_CH9_Pos        PPI_CHG_CH9_Pos
468 #define PPI_CHG3_CH9_Msk        PPI_CHG_CH9_Msk
469 #define PPI_CHG3_CH9_Excluded   PPI_CHG_CH9_Excluded
470 #define PPI_CHG3_CH9_Included   PPI_CHG_CH9_Included
471 
472 #define PPI_CHG3_CH8_Pos        PPI_CHG_CH8_Pos
473 #define PPI_CHG3_CH8_Msk        PPI_CHG_CH8_Msk
474 #define PPI_CHG3_CH8_Excluded   PPI_CHG_CH8_Excluded
475 #define PPI_CHG3_CH8_Included   PPI_CHG_CH8_Included
476 
477 #define PPI_CHG3_CH7_Pos        PPI_CHG_CH7_Pos
478 #define PPI_CHG3_CH7_Msk        PPI_CHG_CH7_Msk
479 #define PPI_CHG3_CH7_Excluded   PPI_CHG_CH7_Excluded
480 #define PPI_CHG3_CH7_Included   PPI_CHG_CH7_Included
481 
482 #define PPI_CHG3_CH6_Pos        PPI_CHG_CH6_Pos
483 #define PPI_CHG3_CH6_Msk        PPI_CHG_CH6_Msk
484 #define PPI_CHG3_CH6_Excluded   PPI_CHG_CH6_Excluded
485 #define PPI_CHG3_CH6_Included   PPI_CHG_CH6_Included
486 
487 #define PPI_CHG3_CH5_Pos        PPI_CHG_CH5_Pos
488 #define PPI_CHG3_CH5_Msk        PPI_CHG_CH5_Msk
489 #define PPI_CHG3_CH5_Excluded   PPI_CHG_CH5_Excluded
490 #define PPI_CHG3_CH5_Included   PPI_CHG_CH5_Included
491 
492 #define PPI_CHG3_CH4_Pos        PPI_CHG_CH4_Pos
493 #define PPI_CHG3_CH4_Msk        PPI_CHG_CH4_Msk
494 #define PPI_CHG3_CH4_Excluded   PPI_CHG_CH4_Excluded
495 #define PPI_CHG3_CH4_Included   PPI_CHG_CH4_Included
496 
497 #define PPI_CHG3_CH3_Pos        PPI_CHG_CH3_Pos
498 #define PPI_CHG3_CH3_Msk        PPI_CHG_CH3_Msk
499 #define PPI_CHG3_CH3_Excluded   PPI_CHG_CH3_Excluded
500 #define PPI_CHG3_CH3_Included   PPI_CHG_CH3_Included
501 
502 #define PPI_CHG3_CH2_Pos        PPI_CHG_CH2_Pos
503 #define PPI_CHG3_CH2_Msk        PPI_CHG_CH2_Msk
504 #define PPI_CHG3_CH2_Excluded   PPI_CHG_CH2_Excluded
505 #define PPI_CHG3_CH2_Included   PPI_CHG_CH2_Included
506 
507 #define PPI_CHG3_CH1_Pos        PPI_CHG_CH1_Pos
508 #define PPI_CHG3_CH1_Msk        PPI_CHG_CH1_Msk
509 #define PPI_CHG3_CH1_Excluded   PPI_CHG_CH1_Excluded
510 #define PPI_CHG3_CH1_Included   PPI_CHG_CH1_Included
511 
512 #define PPI_CHG3_CH0_Pos        PPI_CHG_CH0_Pos
513 #define PPI_CHG3_CH0_Msk        PPI_CHG_CH0_Msk
514 #define PPI_CHG3_CH0_Excluded   PPI_CHG_CH0_Excluded
515 #define PPI_CHG3_CH0_Included   PPI_CHG_CH0_Included
516 
517 
518 
519 
520 /*lint --flb "Leave library region" */
521 
522 #endif /* NRF51_TO_NRF52810_H */
523 
524