xref: /nrf52832-nimble/nordic/nrfx/mdk/nrf51824_peripherals.h (revision 150812a83cab50279bd772ef6db1bfaf255f2c5b)
1*150812a8SEvalZero /*
2*150812a8SEvalZero 
3*150812a8SEvalZero Copyright (c) 2010 - 2018, Nordic Semiconductor ASA All rights reserved.
4*150812a8SEvalZero 
5*150812a8SEvalZero Redistribution and use in source and binary forms, with or without
6*150812a8SEvalZero modification, are permitted provided that the following conditions are met:
7*150812a8SEvalZero 
8*150812a8SEvalZero 1. Redistributions of source code must retain the above copyright notice, this
9*150812a8SEvalZero    list of conditions and the following disclaimer.
10*150812a8SEvalZero 
11*150812a8SEvalZero 2. Redistributions in binary form must reproduce the above copyright
12*150812a8SEvalZero    notice, this list of conditions and the following disclaimer in the
13*150812a8SEvalZero    documentation and/or other materials provided with the distribution.
14*150812a8SEvalZero 
15*150812a8SEvalZero 3. Neither the name of Nordic Semiconductor ASA nor the names of its
16*150812a8SEvalZero    contributors may be used to endorse or promote products derived from this
17*150812a8SEvalZero    software without specific prior written permission.
18*150812a8SEvalZero 
19*150812a8SEvalZero THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20*150812a8SEvalZero AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21*150812a8SEvalZero IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
22*150812a8SEvalZero ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
23*150812a8SEvalZero LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24*150812a8SEvalZero CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25*150812a8SEvalZero SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26*150812a8SEvalZero INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27*150812a8SEvalZero CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28*150812a8SEvalZero ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29*150812a8SEvalZero POSSIBILITY OF SUCH DAMAGE.
30*150812a8SEvalZero 
31*150812a8SEvalZero */
32*150812a8SEvalZero 
33*150812a8SEvalZero 
34*150812a8SEvalZero /* This file is deprecated */
35*150812a8SEvalZero #ifndef _NRF51824_PERIPHERALS_H
36*150812a8SEvalZero #define _NRF51824_PERIPHERALS_H
37*150812a8SEvalZero 
38*150812a8SEvalZero 
39*150812a8SEvalZero /* Clock Peripheral */
40*150812a8SEvalZero #define CLOCK_PRESENT
41*150812a8SEvalZero #define CLOCK_COUNT 1
42*150812a8SEvalZero 
43*150812a8SEvalZero /* Power Peripheral */
44*150812a8SEvalZero #define POWER_PRESENT
45*150812a8SEvalZero #define POWER_COUNT 1
46*150812a8SEvalZero 
47*150812a8SEvalZero #define POWER_FEATURE_RAMON_REGISTERS_PRESENT
48*150812a8SEvalZero 
49*150812a8SEvalZero /* Software Interrupts */
50*150812a8SEvalZero #define SWI_PRESENT
51*150812a8SEvalZero #define SWI_COUNT 6
52*150812a8SEvalZero 
53*150812a8SEvalZero /* GPIO */
54*150812a8SEvalZero #define GPIO_PRESENT
55*150812a8SEvalZero #define GPIO_COUNT 1
56*150812a8SEvalZero 
57*150812a8SEvalZero #define P0_PIN_NUM 32
58*150812a8SEvalZero 
59*150812a8SEvalZero /* MPU and BPROT */
60*150812a8SEvalZero #define BPROT_PRESENT
61*150812a8SEvalZero 
62*150812a8SEvalZero #define BPROT_REGIONS_SIZE 4096
63*150812a8SEvalZero #define BPROT_REGIONS_NUM 64
64*150812a8SEvalZero 
65*150812a8SEvalZero /* Radio */
66*150812a8SEvalZero #define RADIO_PRESENT
67*150812a8SEvalZero #define RADIO_COUNT 1
68*150812a8SEvalZero 
69*150812a8SEvalZero /* Accelerated Address Resolver */
70*150812a8SEvalZero #define AAR_PRESENT
71*150812a8SEvalZero #define AAR_COUNT 1
72*150812a8SEvalZero 
73*150812a8SEvalZero #define AAR_MAX_IRK_NUM 8
74*150812a8SEvalZero 
75*150812a8SEvalZero /* AES Electronic CodeBook mode encryption */
76*150812a8SEvalZero #define ECB_PRESENT
77*150812a8SEvalZero #define ECB_COUNT 1
78*150812a8SEvalZero 
79*150812a8SEvalZero /* AES CCM mode encryption */
80*150812a8SEvalZero #define CCM_PRESENT
81*150812a8SEvalZero #define CCM_COUNT 1
82*150812a8SEvalZero 
83*150812a8SEvalZero /* Peripheral to Peripheral Interconnect */
84*150812a8SEvalZero #define PPI_PRESENT
85*150812a8SEvalZero #define PPI_COUNT 1
86*150812a8SEvalZero 
87*150812a8SEvalZero #define PPI_CH_NUM 16
88*150812a8SEvalZero #define PPI_FIXED_CH_NUM 12
89*150812a8SEvalZero #define PPI_GROUP_NUM 4
90*150812a8SEvalZero 
91*150812a8SEvalZero /* Timer/Counter */
92*150812a8SEvalZero #define TIMER_PRESENT
93*150812a8SEvalZero #define TIMER_COUNT 3
94*150812a8SEvalZero 
95*150812a8SEvalZero #define TIMER0_MAX_SIZE 32
96*150812a8SEvalZero #define TIMER1_MAX_SIZE 16
97*150812a8SEvalZero #define TIMER2_MAX_SIZE 16
98*150812a8SEvalZero 
99*150812a8SEvalZero #define TIMER0_CC_NUM 4
100*150812a8SEvalZero #define TIMER1_CC_NUM 4
101*150812a8SEvalZero #define TIMER2_CC_NUM 4
102*150812a8SEvalZero 
103*150812a8SEvalZero /* Real Time Counter */
104*150812a8SEvalZero #define RTC_PRESENT
105*150812a8SEvalZero #define RTC_COUNT 2
106*150812a8SEvalZero 
107*150812a8SEvalZero #define RTC0_CC_NUM 3
108*150812a8SEvalZero #define RTC1_CC_NUM 4
109*150812a8SEvalZero 
110*150812a8SEvalZero /* RNG */
111*150812a8SEvalZero #define RNG_PRESENT
112*150812a8SEvalZero #define RNG_COUNT 1
113*150812a8SEvalZero 
114*150812a8SEvalZero /* Watchdog Timer */
115*150812a8SEvalZero #define WDT_PRESENT
116*150812a8SEvalZero #define WDT_COUNT 1
117*150812a8SEvalZero 
118*150812a8SEvalZero /* Temperature Sensor */
119*150812a8SEvalZero #define TEMP_PRESENT
120*150812a8SEvalZero #define TEMP_COUNT 1
121*150812a8SEvalZero 
122*150812a8SEvalZero /* Serial Peripheral Interface Master */
123*150812a8SEvalZero #define SPI_PRESENT
124*150812a8SEvalZero #define SPI_COUNT 2
125*150812a8SEvalZero 
126*150812a8SEvalZero /* Serial Peripheral Interface Slave with DMA */
127*150812a8SEvalZero #define SPIS_PRESENT
128*150812a8SEvalZero #define SPIS_COUNT 1
129*150812a8SEvalZero 
130*150812a8SEvalZero #define SPIS1_EASYDMA_MAXCNT_SIZE 8
131*150812a8SEvalZero 
132*150812a8SEvalZero /* Two Wire Interface Master */
133*150812a8SEvalZero #define TWI_PRESENT
134*150812a8SEvalZero #define TWI_COUNT 2
135*150812a8SEvalZero 
136*150812a8SEvalZero /* Universal Asynchronous Receiver-Transmitter */
137*150812a8SEvalZero #define UART_PRESENT
138*150812a8SEvalZero #define UART_COUNT 1
139*150812a8SEvalZero 
140*150812a8SEvalZero /* Quadrature Decoder */
141*150812a8SEvalZero #define QDEC_PRESENT
142*150812a8SEvalZero #define QDEC_COUNT 1
143*150812a8SEvalZero 
144*150812a8SEvalZero /* Analog to Digital Converter */
145*150812a8SEvalZero #define ADC_PRESENT
146*150812a8SEvalZero #define ADC_COUNT 1
147*150812a8SEvalZero 
148*150812a8SEvalZero /* GPIO Tasks and Events */
149*150812a8SEvalZero #define GPIOTE_PRESENT
150*150812a8SEvalZero #define GPIOTE_COUNT 1
151*150812a8SEvalZero 
152*150812a8SEvalZero #define GPIOTE_CH_NUM 4
153*150812a8SEvalZero 
154*150812a8SEvalZero /* Low Power Comparator */
155*150812a8SEvalZero #define LPCOMP_PRESENT
156*150812a8SEvalZero #define LPCOMP_COUNT 1
157*150812a8SEvalZero 
158*150812a8SEvalZero #define LPCOMP_REFSEL_RESOLUTION 8
159*150812a8SEvalZero 
160*150812a8SEvalZero 
161*150812a8SEvalZero #endif      // _NRF51824_PERIPHERALS_H
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