xref: /nrf52832-nimble/nordic/nrfx/mdk/nrf51422_peripherals.h (revision 150812a83cab50279bd772ef6db1bfaf255f2c5b)
1*150812a8SEvalZero /*
2*150812a8SEvalZero 
3*150812a8SEvalZero Copyright (c) 2010 - 2018, Nordic Semiconductor ASA All rights reserved.
4*150812a8SEvalZero 
5*150812a8SEvalZero Redistribution and use in source and binary forms, with or without
6*150812a8SEvalZero modification, are permitted provided that the following conditions are met:
7*150812a8SEvalZero 
8*150812a8SEvalZero 1. Redistributions of source code must retain the above copyright notice, this
9*150812a8SEvalZero    list of conditions and the following disclaimer.
10*150812a8SEvalZero 
11*150812a8SEvalZero 2. Redistributions in binary form must reproduce the above copyright
12*150812a8SEvalZero    notice, this list of conditions and the following disclaimer in the
13*150812a8SEvalZero    documentation and/or other materials provided with the distribution.
14*150812a8SEvalZero 
15*150812a8SEvalZero 3. Neither the name of Nordic Semiconductor ASA nor the names of its
16*150812a8SEvalZero    contributors may be used to endorse or promote products derived from this
17*150812a8SEvalZero    software without specific prior written permission.
18*150812a8SEvalZero 
19*150812a8SEvalZero THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20*150812a8SEvalZero AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21*150812a8SEvalZero IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
22*150812a8SEvalZero ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
23*150812a8SEvalZero LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24*150812a8SEvalZero CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25*150812a8SEvalZero SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26*150812a8SEvalZero INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27*150812a8SEvalZero CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28*150812a8SEvalZero ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29*150812a8SEvalZero POSSIBILITY OF SUCH DAMAGE.
30*150812a8SEvalZero 
31*150812a8SEvalZero */
32*150812a8SEvalZero 
33*150812a8SEvalZero /* This file is deprecated */
34*150812a8SEvalZero #ifndef _NRF51422_PERIPHERALS_H
35*150812a8SEvalZero #define _NRF51422_PERIPHERALS_H
36*150812a8SEvalZero 
37*150812a8SEvalZero 
38*150812a8SEvalZero /* Clock Peripheral */
39*150812a8SEvalZero #define CLOCK_PRESENT
40*150812a8SEvalZero #define CLOCK_COUNT 1
41*150812a8SEvalZero 
42*150812a8SEvalZero /* Power Peripheral */
43*150812a8SEvalZero #define POWER_PRESENT
44*150812a8SEvalZero #define POWER_COUNT 1
45*150812a8SEvalZero 
46*150812a8SEvalZero #define POWER_FEATURE_RAMON_REGISTERS_PRESENT
47*150812a8SEvalZero 
48*150812a8SEvalZero /* Software Interrupts */
49*150812a8SEvalZero #define SWI_PRESENT
50*150812a8SEvalZero #define SWI_COUNT 6
51*150812a8SEvalZero 
52*150812a8SEvalZero /* GPIO */
53*150812a8SEvalZero #define GPIO_PRESENT
54*150812a8SEvalZero #define GPIO_COUNT 1
55*150812a8SEvalZero 
56*150812a8SEvalZero #define P0_PIN_NUM 32
57*150812a8SEvalZero 
58*150812a8SEvalZero /* MPU and BPROT */
59*150812a8SEvalZero #define BPROT_PRESENT
60*150812a8SEvalZero 
61*150812a8SEvalZero #define BPROT_REGIONS_SIZE 4096
62*150812a8SEvalZero #define BPROT_REGIONS_NUM 64
63*150812a8SEvalZero 
64*150812a8SEvalZero /* Radio */
65*150812a8SEvalZero #define RADIO_PRESENT
66*150812a8SEvalZero #define RADIO_COUNT 1
67*150812a8SEvalZero 
68*150812a8SEvalZero /* Accelerated Address Resolver */
69*150812a8SEvalZero #define AAR_PRESENT
70*150812a8SEvalZero #define AAR_COUNT 1
71*150812a8SEvalZero 
72*150812a8SEvalZero #define AAR_MAX_IRK_NUM 8
73*150812a8SEvalZero 
74*150812a8SEvalZero /* AES Electronic CodeBook mode encryption */
75*150812a8SEvalZero #define ECB_PRESENT
76*150812a8SEvalZero #define ECB_COUNT 1
77*150812a8SEvalZero 
78*150812a8SEvalZero /* AES CCM mode encryption */
79*150812a8SEvalZero #define CCM_PRESENT
80*150812a8SEvalZero #define CCM_COUNT 1
81*150812a8SEvalZero 
82*150812a8SEvalZero /* Peripheral to Peripheral Interconnect */
83*150812a8SEvalZero #define PPI_PRESENT
84*150812a8SEvalZero #define PPI_COUNT 1
85*150812a8SEvalZero 
86*150812a8SEvalZero #define PPI_CH_NUM 16
87*150812a8SEvalZero #define PPI_FIXED_CH_NUM 12
88*150812a8SEvalZero #define PPI_GROUP_NUM 4
89*150812a8SEvalZero 
90*150812a8SEvalZero /* Timer/Counter */
91*150812a8SEvalZero #define TIMER_PRESENT
92*150812a8SEvalZero #define TIMER_COUNT 3
93*150812a8SEvalZero 
94*150812a8SEvalZero #define TIMER0_MAX_SIZE 32
95*150812a8SEvalZero #define TIMER1_MAX_SIZE 16
96*150812a8SEvalZero #define TIMER2_MAX_SIZE 16
97*150812a8SEvalZero 
98*150812a8SEvalZero #define TIMER0_CC_NUM 4
99*150812a8SEvalZero #define TIMER1_CC_NUM 4
100*150812a8SEvalZero #define TIMER2_CC_NUM 4
101*150812a8SEvalZero 
102*150812a8SEvalZero /* Real Time Counter */
103*150812a8SEvalZero #define RTC_PRESENT
104*150812a8SEvalZero #define RTC_COUNT 2
105*150812a8SEvalZero 
106*150812a8SEvalZero #define RTC0_CC_NUM 3
107*150812a8SEvalZero #define RTC1_CC_NUM 4
108*150812a8SEvalZero 
109*150812a8SEvalZero /* RNG */
110*150812a8SEvalZero #define RNG_PRESENT
111*150812a8SEvalZero #define RNG_COUNT 1
112*150812a8SEvalZero 
113*150812a8SEvalZero /* Watchdog Timer */
114*150812a8SEvalZero #define WDT_PRESENT
115*150812a8SEvalZero #define WDT_COUNT 1
116*150812a8SEvalZero 
117*150812a8SEvalZero /* Temperature Sensor */
118*150812a8SEvalZero #define TEMP_PRESENT
119*150812a8SEvalZero #define TEMP_COUNT 1
120*150812a8SEvalZero 
121*150812a8SEvalZero /* Serial Peripheral Interface Master */
122*150812a8SEvalZero #define SPI_PRESENT
123*150812a8SEvalZero #define SPI_COUNT 2
124*150812a8SEvalZero 
125*150812a8SEvalZero /* Serial Peripheral Interface Slave with DMA */
126*150812a8SEvalZero #define SPIS_PRESENT
127*150812a8SEvalZero #define SPIS_COUNT 1
128*150812a8SEvalZero 
129*150812a8SEvalZero #define SPIS1_EASYDMA_MAXCNT_SIZE 8
130*150812a8SEvalZero 
131*150812a8SEvalZero /* Two Wire Interface Master */
132*150812a8SEvalZero #define TWI_PRESENT
133*150812a8SEvalZero #define TWI_COUNT 2
134*150812a8SEvalZero 
135*150812a8SEvalZero /* Universal Asynchronous Receiver-Transmitter */
136*150812a8SEvalZero #define UART_PRESENT
137*150812a8SEvalZero #define UART_COUNT 1
138*150812a8SEvalZero 
139*150812a8SEvalZero /* Quadrature Decoder */
140*150812a8SEvalZero #define QDEC_PRESENT
141*150812a8SEvalZero #define QDEC_COUNT 1
142*150812a8SEvalZero 
143*150812a8SEvalZero /* Analog to Digital Converter */
144*150812a8SEvalZero #define ADC_PRESENT
145*150812a8SEvalZero #define ADC_COUNT 1
146*150812a8SEvalZero 
147*150812a8SEvalZero /* GPIO Tasks and Events */
148*150812a8SEvalZero #define GPIOTE_PRESENT
149*150812a8SEvalZero #define GPIOTE_COUNT 1
150*150812a8SEvalZero 
151*150812a8SEvalZero #define GPIOTE_CH_NUM 4
152*150812a8SEvalZero 
153*150812a8SEvalZero /* Low Power Comparator */
154*150812a8SEvalZero #define LPCOMP_PRESENT
155*150812a8SEvalZero #define LPCOMP_COUNT 1
156*150812a8SEvalZero 
157*150812a8SEvalZero #define LPCOMP_REFSEL_RESOLUTION 8
158*150812a8SEvalZero 
159*150812a8SEvalZero 
160*150812a8SEvalZero #endif      // _NRF51422_PERIPHERALS_H
161