1*150812a8SEvalZero/* 2*150812a8SEvalZero 3*150812a8SEvalZeroCopyright (c) 2009-2018 ARM Limited. All rights reserved. 4*150812a8SEvalZero 5*150812a8SEvalZero SPDX-License-Identifier: Apache-2.0 6*150812a8SEvalZero 7*150812a8SEvalZeroLicensed under the Apache License, Version 2.0 (the License); you may 8*150812a8SEvalZeronot use this file except in compliance with the License. 9*150812a8SEvalZeroYou may obtain a copy of the License at 10*150812a8SEvalZero 11*150812a8SEvalZero www.apache.org/licenses/LICENSE-2.0 12*150812a8SEvalZero 13*150812a8SEvalZeroUnless required by applicable law or agreed to in writing, software 14*150812a8SEvalZerodistributed under the License is distributed on an AS IS BASIS, WITHOUT 15*150812a8SEvalZeroWARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 16*150812a8SEvalZeroSee the License for the specific language governing permissions and 17*150812a8SEvalZerolimitations under the License. 18*150812a8SEvalZero 19*150812a8SEvalZeroNOTICE: This file has been modified by Nordic Semiconductor ASA. 20*150812a8SEvalZero 21*150812a8SEvalZero*/ 22*150812a8SEvalZero 23*150812a8SEvalZero .syntax unified 24*150812a8SEvalZero .arch armv8-m.main 25*150812a8SEvalZero 26*150812a8SEvalZero#ifdef __STARTUP_CONFIG 27*150812a8SEvalZero#include "startup_config.h" 28*150812a8SEvalZero#ifndef __STARTUP_CONFIG_STACK_ALIGNEMENT 29*150812a8SEvalZero#define __STARTUP_CONFIG_STACK_ALIGNEMENT 3 30*150812a8SEvalZero#endif 31*150812a8SEvalZero#endif 32*150812a8SEvalZero 33*150812a8SEvalZero .section .stack 34*150812a8SEvalZero#if defined(__STARTUP_CONFIG) 35*150812a8SEvalZero .align __STARTUP_CONFIG_STACK_ALIGNEMENT 36*150812a8SEvalZero .equ Stack_Size, __STARTUP_CONFIG_STACK_SIZE 37*150812a8SEvalZero#elif defined(__STACK_SIZE) 38*150812a8SEvalZero .align 3 39*150812a8SEvalZero .equ Stack_Size, __STACK_SIZE 40*150812a8SEvalZero#else 41*150812a8SEvalZero .align 3 42*150812a8SEvalZero .equ Stack_Size, 8192 43*150812a8SEvalZero#endif 44*150812a8SEvalZero .globl __StackTop 45*150812a8SEvalZero .globl __StackLimit 46*150812a8SEvalZero__StackLimit: 47*150812a8SEvalZero .space Stack_Size 48*150812a8SEvalZero .size __StackLimit, . - __StackLimit 49*150812a8SEvalZero__StackTop: 50*150812a8SEvalZero .size __StackTop, . - __StackTop 51*150812a8SEvalZero 52*150812a8SEvalZero .section .heap 53*150812a8SEvalZero .align 3 54*150812a8SEvalZero#if defined(__STARTUP_CONFIG) 55*150812a8SEvalZero .equ Heap_Size, __STARTUP_CONFIG_HEAP_SIZE 56*150812a8SEvalZero#elif defined(__HEAP_SIZE) 57*150812a8SEvalZero .equ Heap_Size, __HEAP_SIZE 58*150812a8SEvalZero#else 59*150812a8SEvalZero .equ Heap_Size, 8192 60*150812a8SEvalZero#endif 61*150812a8SEvalZero .globl __HeapBase 62*150812a8SEvalZero .globl __HeapLimit 63*150812a8SEvalZero__HeapBase: 64*150812a8SEvalZero .if Heap_Size 65*150812a8SEvalZero .space Heap_Size 66*150812a8SEvalZero .endif 67*150812a8SEvalZero .size __HeapBase, . - __HeapBase 68*150812a8SEvalZero__HeapLimit: 69*150812a8SEvalZero .size __HeapLimit, . - __HeapLimit 70*150812a8SEvalZero 71*150812a8SEvalZero .section .isr_vector 72*150812a8SEvalZero .align 2 73*150812a8SEvalZero .globl __isr_vector 74*150812a8SEvalZero__isr_vector: 75*150812a8SEvalZero .long __StackTop /* Top of Stack */ 76*150812a8SEvalZero .long Reset_Handler 77*150812a8SEvalZero .long NMI_Handler 78*150812a8SEvalZero .long HardFault_Handler 79*150812a8SEvalZero .long MemoryManagement_Handler 80*150812a8SEvalZero .long BusFault_Handler 81*150812a8SEvalZero .long UsageFault_Handler 82*150812a8SEvalZero .long SecureFault_Handler 83*150812a8SEvalZero .long 0 /*Reserved */ 84*150812a8SEvalZero .long 0 /*Reserved */ 85*150812a8SEvalZero .long 0 /*Reserved */ 86*150812a8SEvalZero .long SVC_Handler 87*150812a8SEvalZero .long DebugMon_Handler 88*150812a8SEvalZero .long 0 /*Reserved */ 89*150812a8SEvalZero .long PendSV_Handler 90*150812a8SEvalZero .long SysTick_Handler 91*150812a8SEvalZero 92*150812a8SEvalZero /* External Interrupts */ 93*150812a8SEvalZero .long 0 /*Reserved */ 94*150812a8SEvalZero .long 0 /*Reserved */ 95*150812a8SEvalZero .long 0 /*Reserved */ 96*150812a8SEvalZero .long SPU_IRQHandler 97*150812a8SEvalZero .long 0 /*Reserved */ 98*150812a8SEvalZero .long CLOCK_POWER_IRQHandler 99*150812a8SEvalZero .long 0 /*Reserved */ 100*150812a8SEvalZero .long 0 /*Reserved */ 101*150812a8SEvalZero .long UARTE0_SPIM0_SPIS0_TWIM0_TWIS0_IRQHandler 102*150812a8SEvalZero .long UARTE1_SPIM1_SPIS1_TWIM1_TWIS1_IRQHandler 103*150812a8SEvalZero .long UARTE2_SPIM2_SPIS2_TWIM2_TWIS2_IRQHandler 104*150812a8SEvalZero .long UARTE3_SPIM3_SPIS3_TWIM3_TWIS3_IRQHandler 105*150812a8SEvalZero .long 0 /*Reserved */ 106*150812a8SEvalZero .long GPIOTE0_IRQHandler 107*150812a8SEvalZero .long SAADC_IRQHandler 108*150812a8SEvalZero .long TIMER0_IRQHandler 109*150812a8SEvalZero .long TIMER1_IRQHandler 110*150812a8SEvalZero .long TIMER2_IRQHandler 111*150812a8SEvalZero .long 0 /*Reserved */ 112*150812a8SEvalZero .long 0 /*Reserved */ 113*150812a8SEvalZero .long RTC0_IRQHandler 114*150812a8SEvalZero .long RTC1_IRQHandler 115*150812a8SEvalZero .long 0 /*Reserved */ 116*150812a8SEvalZero .long 0 /*Reserved */ 117*150812a8SEvalZero .long WDT_IRQHandler 118*150812a8SEvalZero .long 0 /*Reserved */ 119*150812a8SEvalZero .long 0 /*Reserved */ 120*150812a8SEvalZero .long EGU0_IRQHandler 121*150812a8SEvalZero .long EGU1_IRQHandler 122*150812a8SEvalZero .long EGU2_IRQHandler 123*150812a8SEvalZero .long EGU3_IRQHandler 124*150812a8SEvalZero .long EGU4_IRQHandler 125*150812a8SEvalZero .long EGU5_IRQHandler 126*150812a8SEvalZero .long PWM0_IRQHandler 127*150812a8SEvalZero .long PWM1_IRQHandler 128*150812a8SEvalZero .long PWM2_IRQHandler 129*150812a8SEvalZero .long PWM3_IRQHandler 130*150812a8SEvalZero .long 0 /*Reserved */ 131*150812a8SEvalZero .long PDM_IRQHandler 132*150812a8SEvalZero .long 0 /*Reserved */ 133*150812a8SEvalZero .long I2S_IRQHandler 134*150812a8SEvalZero .long 0 /*Reserved */ 135*150812a8SEvalZero .long IPC_IRQHandler 136*150812a8SEvalZero .long 0 /*Reserved */ 137*150812a8SEvalZero .long FPU_IRQHandler 138*150812a8SEvalZero .long 0 /*Reserved */ 139*150812a8SEvalZero .long 0 /*Reserved */ 140*150812a8SEvalZero .long 0 /*Reserved */ 141*150812a8SEvalZero .long 0 /*Reserved */ 142*150812a8SEvalZero .long GPIOTE1_IRQHandler 143*150812a8SEvalZero .long 0 /*Reserved */ 144*150812a8SEvalZero .long 0 /*Reserved */ 145*150812a8SEvalZero .long 0 /*Reserved */ 146*150812a8SEvalZero .long 0 /*Reserved */ 147*150812a8SEvalZero .long 0 /*Reserved */ 148*150812a8SEvalZero .long 0 /*Reserved */ 149*150812a8SEvalZero .long 0 /*Reserved */ 150*150812a8SEvalZero .long KMU_IRQHandler 151*150812a8SEvalZero .long 0 /*Reserved */ 152*150812a8SEvalZero .long 0 /*Reserved */ 153*150812a8SEvalZero .long 0 /*Reserved */ 154*150812a8SEvalZero .long 0 /*Reserved */ 155*150812a8SEvalZero .long 0 /*Reserved */ 156*150812a8SEvalZero .long 0 /*Reserved */ 157*150812a8SEvalZero .long CRYPTOCELL_IRQHandler 158*150812a8SEvalZero .long 0 /*Reserved */ 159*150812a8SEvalZero .long 0 /*Reserved */ 160*150812a8SEvalZero .long 0 /*Reserved */ 161*150812a8SEvalZero .long 0 /*Reserved */ 162*150812a8SEvalZero .long 0 /*Reserved */ 163*150812a8SEvalZero .long 0 /*Reserved */ 164*150812a8SEvalZero .long 0 /*Reserved */ 165*150812a8SEvalZero .long 0 /*Reserved */ 166*150812a8SEvalZero .long 0 /*Reserved */ 167*150812a8SEvalZero .long 0 /*Reserved */ 168*150812a8SEvalZero .long 0 /*Reserved */ 169*150812a8SEvalZero .long 0 /*Reserved */ 170*150812a8SEvalZero .long 0 /*Reserved */ 171*150812a8SEvalZero .long 0 /*Reserved */ 172*150812a8SEvalZero .long 0 /*Reserved */ 173*150812a8SEvalZero .long 0 /*Reserved */ 174*150812a8SEvalZero .long 0 /*Reserved */ 175*150812a8SEvalZero .long 0 /*Reserved */ 176*150812a8SEvalZero .long 0 /*Reserved */ 177*150812a8SEvalZero .long 0 /*Reserved */ 178*150812a8SEvalZero .long 0 /*Reserved */ 179*150812a8SEvalZero .long 0 /*Reserved */ 180*150812a8SEvalZero .long 0 /*Reserved */ 181*150812a8SEvalZero .long 0 /*Reserved */ 182*150812a8SEvalZero .long 0 /*Reserved */ 183*150812a8SEvalZero .long 0 /*Reserved */ 184*150812a8SEvalZero .long 0 /*Reserved */ 185*150812a8SEvalZero .long 0 /*Reserved */ 186*150812a8SEvalZero .long 0 /*Reserved */ 187*150812a8SEvalZero .long 0 /*Reserved */ 188*150812a8SEvalZero .long 0 /*Reserved */ 189*150812a8SEvalZero .long 0 /*Reserved */ 190*150812a8SEvalZero .long 0 /*Reserved */ 191*150812a8SEvalZero .long 0 /*Reserved */ 192*150812a8SEvalZero .long 0 /*Reserved */ 193*150812a8SEvalZero .long 0 /*Reserved */ 194*150812a8SEvalZero .long 0 /*Reserved */ 195*150812a8SEvalZero .long 0 /*Reserved */ 196*150812a8SEvalZero .long 0 /*Reserved */ 197*150812a8SEvalZero .long 0 /*Reserved */ 198*150812a8SEvalZero .long 0 /*Reserved */ 199*150812a8SEvalZero .long 0 /*Reserved */ 200*150812a8SEvalZero .long 0 /*Reserved */ 201*150812a8SEvalZero .long 0 /*Reserved */ 202*150812a8SEvalZero .long 0 /*Reserved */ 203*150812a8SEvalZero .long 0 /*Reserved */ 204*150812a8SEvalZero .long 0 /*Reserved */ 205*150812a8SEvalZero .long 0 /*Reserved */ 206*150812a8SEvalZero .long 0 /*Reserved */ 207*150812a8SEvalZero .long 0 /*Reserved */ 208*150812a8SEvalZero .long 0 /*Reserved */ 209*150812a8SEvalZero .long 0 /*Reserved */ 210*150812a8SEvalZero .long 0 /*Reserved */ 211*150812a8SEvalZero .long 0 /*Reserved */ 212*150812a8SEvalZero .long 0 /*Reserved */ 213*150812a8SEvalZero .long 0 /*Reserved */ 214*150812a8SEvalZero .long 0 /*Reserved */ 215*150812a8SEvalZero .long 0 /*Reserved */ 216*150812a8SEvalZero .long 0 /*Reserved */ 217*150812a8SEvalZero .long 0 /*Reserved */ 218*150812a8SEvalZero .long 0 /*Reserved */ 219*150812a8SEvalZero .long 0 /*Reserved */ 220*150812a8SEvalZero .long 0 /*Reserved */ 221*150812a8SEvalZero .long 0 /*Reserved */ 222*150812a8SEvalZero .long 0 /*Reserved */ 223*150812a8SEvalZero .long 0 /*Reserved */ 224*150812a8SEvalZero .long 0 /*Reserved */ 225*150812a8SEvalZero .long 0 /*Reserved */ 226*150812a8SEvalZero .long 0 /*Reserved */ 227*150812a8SEvalZero .long 0 /*Reserved */ 228*150812a8SEvalZero .long 0 /*Reserved */ 229*150812a8SEvalZero .long 0 /*Reserved */ 230*150812a8SEvalZero .long 0 /*Reserved */ 231*150812a8SEvalZero .long 0 /*Reserved */ 232*150812a8SEvalZero .long 0 /*Reserved */ 233*150812a8SEvalZero .long 0 /*Reserved */ 234*150812a8SEvalZero .long 0 /*Reserved */ 235*150812a8SEvalZero .long 0 /*Reserved */ 236*150812a8SEvalZero .long 0 /*Reserved */ 237*150812a8SEvalZero .long 0 /*Reserved */ 238*150812a8SEvalZero .long 0 /*Reserved */ 239*150812a8SEvalZero .long 0 /*Reserved */ 240*150812a8SEvalZero .long 0 /*Reserved */ 241*150812a8SEvalZero .long 0 /*Reserved */ 242*150812a8SEvalZero .long 0 /*Reserved */ 243*150812a8SEvalZero .long 0 /*Reserved */ 244*150812a8SEvalZero .long 0 /*Reserved */ 245*150812a8SEvalZero .long 0 /*Reserved */ 246*150812a8SEvalZero .long 0 /*Reserved */ 247*150812a8SEvalZero .long 0 /*Reserved */ 248*150812a8SEvalZero .long 0 /*Reserved */ 249*150812a8SEvalZero .long 0 /*Reserved */ 250*150812a8SEvalZero .long 0 /*Reserved */ 251*150812a8SEvalZero .long 0 /*Reserved */ 252*150812a8SEvalZero .long 0 /*Reserved */ 253*150812a8SEvalZero .long 0 /*Reserved */ 254*150812a8SEvalZero .long 0 /*Reserved */ 255*150812a8SEvalZero .long 0 /*Reserved */ 256*150812a8SEvalZero .long 0 /*Reserved */ 257*150812a8SEvalZero .long 0 /*Reserved */ 258*150812a8SEvalZero .long 0 /*Reserved */ 259*150812a8SEvalZero .long 0 /*Reserved */ 260*150812a8SEvalZero .long 0 /*Reserved */ 261*150812a8SEvalZero .long 0 /*Reserved */ 262*150812a8SEvalZero .long 0 /*Reserved */ 263*150812a8SEvalZero .long 0 /*Reserved */ 264*150812a8SEvalZero .long 0 /*Reserved */ 265*150812a8SEvalZero .long 0 /*Reserved */ 266*150812a8SEvalZero .long 0 /*Reserved */ 267*150812a8SEvalZero .long 0 /*Reserved */ 268*150812a8SEvalZero .long 0 /*Reserved */ 269*150812a8SEvalZero .long 0 /*Reserved */ 270*150812a8SEvalZero .long 0 /*Reserved */ 271*150812a8SEvalZero .long 0 /*Reserved */ 272*150812a8SEvalZero .long 0 /*Reserved */ 273*150812a8SEvalZero .long 0 /*Reserved */ 274*150812a8SEvalZero .long 0 /*Reserved */ 275*150812a8SEvalZero .long 0 /*Reserved */ 276*150812a8SEvalZero .long 0 /*Reserved */ 277*150812a8SEvalZero .long 0 /*Reserved */ 278*150812a8SEvalZero .long 0 /*Reserved */ 279*150812a8SEvalZero .long 0 /*Reserved */ 280*150812a8SEvalZero .long 0 /*Reserved */ 281*150812a8SEvalZero .long 0 /*Reserved */ 282*150812a8SEvalZero .long 0 /*Reserved */ 283*150812a8SEvalZero .long 0 /*Reserved */ 284*150812a8SEvalZero .long 0 /*Reserved */ 285*150812a8SEvalZero .long 0 /*Reserved */ 286*150812a8SEvalZero .long 0 /*Reserved */ 287*150812a8SEvalZero .long 0 /*Reserved */ 288*150812a8SEvalZero .long 0 /*Reserved */ 289*150812a8SEvalZero .long 0 /*Reserved */ 290*150812a8SEvalZero .long 0 /*Reserved */ 291*150812a8SEvalZero .long 0 /*Reserved */ 292*150812a8SEvalZero .long 0 /*Reserved */ 293*150812a8SEvalZero .long 0 /*Reserved */ 294*150812a8SEvalZero .long 0 /*Reserved */ 295*150812a8SEvalZero .long 0 /*Reserved */ 296*150812a8SEvalZero .long 0 /*Reserved */ 297*150812a8SEvalZero .long 0 /*Reserved */ 298*150812a8SEvalZero .long 0 /*Reserved */ 299*150812a8SEvalZero .long 0 /*Reserved */ 300*150812a8SEvalZero .long 0 /*Reserved */ 301*150812a8SEvalZero .long 0 /*Reserved */ 302*150812a8SEvalZero .long 0 /*Reserved */ 303*150812a8SEvalZero .long 0 /*Reserved */ 304*150812a8SEvalZero .long 0 /*Reserved */ 305*150812a8SEvalZero .long 0 /*Reserved */ 306*150812a8SEvalZero .long 0 /*Reserved */ 307*150812a8SEvalZero .long 0 /*Reserved */ 308*150812a8SEvalZero .long 0 /*Reserved */ 309*150812a8SEvalZero .long 0 /*Reserved */ 310*150812a8SEvalZero .long 0 /*Reserved */ 311*150812a8SEvalZero .long 0 /*Reserved */ 312*150812a8SEvalZero .long 0 /*Reserved */ 313*150812a8SEvalZero .long 0 /*Reserved */ 314*150812a8SEvalZero .long 0 /*Reserved */ 315*150812a8SEvalZero .long 0 /*Reserved */ 316*150812a8SEvalZero .long 0 /*Reserved */ 317*150812a8SEvalZero .long 0 /*Reserved */ 318*150812a8SEvalZero .long 0 /*Reserved */ 319*150812a8SEvalZero .long 0 /*Reserved */ 320*150812a8SEvalZero .long 0 /*Reserved */ 321*150812a8SEvalZero .long 0 /*Reserved */ 322*150812a8SEvalZero .long 0 /*Reserved */ 323*150812a8SEvalZero .long 0 /*Reserved */ 324*150812a8SEvalZero .long 0 /*Reserved */ 325*150812a8SEvalZero .long 0 /*Reserved */ 326*150812a8SEvalZero .long 0 /*Reserved */ 327*150812a8SEvalZero .long 0 /*Reserved */ 328*150812a8SEvalZero .long 0 /*Reserved */ 329*150812a8SEvalZero .long 0 /*Reserved */ 330*150812a8SEvalZero .long 0 /*Reserved */ 331*150812a8SEvalZero .long 0 /*Reserved */ 332*150812a8SEvalZero .long 0 /*Reserved */ 333*150812a8SEvalZero 334*150812a8SEvalZero .size __isr_vector, . - __isr_vector 335*150812a8SEvalZero 336*150812a8SEvalZero/* Reset Handler */ 337*150812a8SEvalZero 338*150812a8SEvalZero 339*150812a8SEvalZero .text 340*150812a8SEvalZero .thumb 341*150812a8SEvalZero .thumb_func 342*150812a8SEvalZero .align 1 343*150812a8SEvalZero .globl Reset_Handler 344*150812a8SEvalZero .type Reset_Handler, %function 345*150812a8SEvalZeroReset_Handler: 346*150812a8SEvalZero 347*150812a8SEvalZero 348*150812a8SEvalZero/* Loop to copy data from read only memory to RAM. 349*150812a8SEvalZero * The ranges of copy from/to are specified by following symbols: 350*150812a8SEvalZero * __etext: LMA of start of the section to copy from. Usually end of text 351*150812a8SEvalZero * __data_start__: VMA of start of the section to copy to. 352*150812a8SEvalZero * __bss_start__: VMA of end of the section to copy to. Normally __data_end__ is used, but by using __bss_start__ 353*150812a8SEvalZero * the user can add their own initialized data section before BSS section with the INTERT AFTER command. 354*150812a8SEvalZero * 355*150812a8SEvalZero * All addresses must be aligned to 4 bytes boundary. 356*150812a8SEvalZero */ 357*150812a8SEvalZero ldr r1, =__etext 358*150812a8SEvalZero ldr r2, =__data_start__ 359*150812a8SEvalZero ldr r3, =__bss_start__ 360*150812a8SEvalZero 361*150812a8SEvalZero subs r3, r3, r2 362*150812a8SEvalZero ble .L_loop1_done 363*150812a8SEvalZero 364*150812a8SEvalZero.L_loop1: 365*150812a8SEvalZero subs r3, r3, #4 366*150812a8SEvalZero ldr r0, [r1,r3] 367*150812a8SEvalZero str r0, [r2,r3] 368*150812a8SEvalZero bgt .L_loop1 369*150812a8SEvalZero 370*150812a8SEvalZero.L_loop1_done: 371*150812a8SEvalZero 372*150812a8SEvalZero/* This part of work usually is done in C library startup code. Otherwise, 373*150812a8SEvalZero * define __STARTUP_CLEAR_BSS to enable it in this startup. This section 374*150812a8SEvalZero * clears the RAM where BSS data is located. 375*150812a8SEvalZero * 376*150812a8SEvalZero * The BSS section is specified by following symbols 377*150812a8SEvalZero * __bss_start__: start of the BSS section. 378*150812a8SEvalZero * __bss_end__: end of the BSS section. 379*150812a8SEvalZero * 380*150812a8SEvalZero * All addresses must be aligned to 4 bytes boundary. 381*150812a8SEvalZero */ 382*150812a8SEvalZero#ifdef __STARTUP_CLEAR_BSS 383*150812a8SEvalZero ldr r1, =__bss_start__ 384*150812a8SEvalZero ldr r2, =__bss_end__ 385*150812a8SEvalZero 386*150812a8SEvalZero movs r0, 0 387*150812a8SEvalZero 388*150812a8SEvalZero subs r2, r2, r1 389*150812a8SEvalZero ble .L_loop3_done 390*150812a8SEvalZero 391*150812a8SEvalZero.L_loop3: 392*150812a8SEvalZero subs r2, r2, #4 393*150812a8SEvalZero str r0, [r1, r2] 394*150812a8SEvalZero bgt .L_loop3 395*150812a8SEvalZero 396*150812a8SEvalZero.L_loop3_done: 397*150812a8SEvalZero#endif /* __STARTUP_CLEAR_BSS */ 398*150812a8SEvalZero 399*150812a8SEvalZero/* Execute SystemInit function. */ 400*150812a8SEvalZero bl SystemInit 401*150812a8SEvalZero 402*150812a8SEvalZero/* Call _start function provided by libraries. 403*150812a8SEvalZero * If those libraries are not accessible, define __START as your entry point. 404*150812a8SEvalZero */ 405*150812a8SEvalZero#ifndef __START 406*150812a8SEvalZero#define __START _start 407*150812a8SEvalZero#endif 408*150812a8SEvalZero bl __START 409*150812a8SEvalZero 410*150812a8SEvalZero .pool 411*150812a8SEvalZero .size Reset_Handler,.-Reset_Handler 412*150812a8SEvalZero 413*150812a8SEvalZero .section ".text" 414*150812a8SEvalZero 415*150812a8SEvalZero 416*150812a8SEvalZero/* Dummy Exception Handlers (infinite loops which can be modified) */ 417*150812a8SEvalZero 418*150812a8SEvalZero .weak NMI_Handler 419*150812a8SEvalZero .type NMI_Handler, %function 420*150812a8SEvalZeroNMI_Handler: 421*150812a8SEvalZero b . 422*150812a8SEvalZero .size NMI_Handler, . - NMI_Handler 423*150812a8SEvalZero 424*150812a8SEvalZero 425*150812a8SEvalZero .weak HardFault_Handler 426*150812a8SEvalZero .type HardFault_Handler, %function 427*150812a8SEvalZeroHardFault_Handler: 428*150812a8SEvalZero b . 429*150812a8SEvalZero .size HardFault_Handler, . - HardFault_Handler 430*150812a8SEvalZero 431*150812a8SEvalZero 432*150812a8SEvalZero .weak MemoryManagement_Handler 433*150812a8SEvalZero .type MemoryManagement_Handler, %function 434*150812a8SEvalZeroMemoryManagement_Handler: 435*150812a8SEvalZero b . 436*150812a8SEvalZero .size MemoryManagement_Handler, . - MemoryManagement_Handler 437*150812a8SEvalZero 438*150812a8SEvalZero 439*150812a8SEvalZero .weak BusFault_Handler 440*150812a8SEvalZero .type BusFault_Handler, %function 441*150812a8SEvalZeroBusFault_Handler: 442*150812a8SEvalZero b . 443*150812a8SEvalZero .size BusFault_Handler, . - BusFault_Handler 444*150812a8SEvalZero 445*150812a8SEvalZero 446*150812a8SEvalZero .weak UsageFault_Handler 447*150812a8SEvalZero .type UsageFault_Handler, %function 448*150812a8SEvalZeroUsageFault_Handler: 449*150812a8SEvalZero b . 450*150812a8SEvalZero .size UsageFault_Handler, . - UsageFault_Handler 451*150812a8SEvalZero 452*150812a8SEvalZero 453*150812a8SEvalZero .weak SecureFault_Handler 454*150812a8SEvalZero .type SecureFault_Handler, %function 455*150812a8SEvalZeroSecureFault_Handler: 456*150812a8SEvalZero b . 457*150812a8SEvalZero .size SecureFault_Handler, . - SecureFault_Handler 458*150812a8SEvalZero 459*150812a8SEvalZero 460*150812a8SEvalZero .weak SVC_Handler 461*150812a8SEvalZero .type SVC_Handler, %function 462*150812a8SEvalZeroSVC_Handler: 463*150812a8SEvalZero b . 464*150812a8SEvalZero .size SVC_Handler, . - SVC_Handler 465*150812a8SEvalZero 466*150812a8SEvalZero 467*150812a8SEvalZero .weak DebugMon_Handler 468*150812a8SEvalZero .type DebugMon_Handler, %function 469*150812a8SEvalZeroDebugMon_Handler: 470*150812a8SEvalZero b . 471*150812a8SEvalZero .size DebugMon_Handler, . - DebugMon_Handler 472*150812a8SEvalZero 473*150812a8SEvalZero 474*150812a8SEvalZero .weak PendSV_Handler 475*150812a8SEvalZero .type PendSV_Handler, %function 476*150812a8SEvalZeroPendSV_Handler: 477*150812a8SEvalZero b . 478*150812a8SEvalZero .size PendSV_Handler, . - PendSV_Handler 479*150812a8SEvalZero 480*150812a8SEvalZero 481*150812a8SEvalZero .weak SysTick_Handler 482*150812a8SEvalZero .type SysTick_Handler, %function 483*150812a8SEvalZeroSysTick_Handler: 484*150812a8SEvalZero b . 485*150812a8SEvalZero .size SysTick_Handler, . - SysTick_Handler 486*150812a8SEvalZero 487*150812a8SEvalZero 488*150812a8SEvalZero/* IRQ Handlers */ 489*150812a8SEvalZero 490*150812a8SEvalZero .globl Default_Handler 491*150812a8SEvalZero .type Default_Handler, %function 492*150812a8SEvalZeroDefault_Handler: 493*150812a8SEvalZero b . 494*150812a8SEvalZero .size Default_Handler, . - Default_Handler 495*150812a8SEvalZero 496*150812a8SEvalZero .macro IRQ handler 497*150812a8SEvalZero .weak \handler 498*150812a8SEvalZero .set \handler, Default_Handler 499*150812a8SEvalZero .endm 500*150812a8SEvalZero 501*150812a8SEvalZero IRQ SPU_IRQHandler 502*150812a8SEvalZero IRQ CLOCK_POWER_IRQHandler 503*150812a8SEvalZero IRQ UARTE0_SPIM0_SPIS0_TWIM0_TWIS0_IRQHandler 504*150812a8SEvalZero IRQ UARTE1_SPIM1_SPIS1_TWIM1_TWIS1_IRQHandler 505*150812a8SEvalZero IRQ UARTE2_SPIM2_SPIS2_TWIM2_TWIS2_IRQHandler 506*150812a8SEvalZero IRQ UARTE3_SPIM3_SPIS3_TWIM3_TWIS3_IRQHandler 507*150812a8SEvalZero IRQ GPIOTE0_IRQHandler 508*150812a8SEvalZero IRQ SAADC_IRQHandler 509*150812a8SEvalZero IRQ TIMER0_IRQHandler 510*150812a8SEvalZero IRQ TIMER1_IRQHandler 511*150812a8SEvalZero IRQ TIMER2_IRQHandler 512*150812a8SEvalZero IRQ RTC0_IRQHandler 513*150812a8SEvalZero IRQ RTC1_IRQHandler 514*150812a8SEvalZero IRQ WDT_IRQHandler 515*150812a8SEvalZero IRQ EGU0_IRQHandler 516*150812a8SEvalZero IRQ EGU1_IRQHandler 517*150812a8SEvalZero IRQ EGU2_IRQHandler 518*150812a8SEvalZero IRQ EGU3_IRQHandler 519*150812a8SEvalZero IRQ EGU4_IRQHandler 520*150812a8SEvalZero IRQ EGU5_IRQHandler 521*150812a8SEvalZero IRQ PWM0_IRQHandler 522*150812a8SEvalZero IRQ PWM1_IRQHandler 523*150812a8SEvalZero IRQ PWM2_IRQHandler 524*150812a8SEvalZero IRQ PWM3_IRQHandler 525*150812a8SEvalZero IRQ PDM_IRQHandler 526*150812a8SEvalZero IRQ I2S_IRQHandler 527*150812a8SEvalZero IRQ IPC_IRQHandler 528*150812a8SEvalZero IRQ FPU_IRQHandler 529*150812a8SEvalZero IRQ GPIOTE1_IRQHandler 530*150812a8SEvalZero IRQ KMU_IRQHandler 531*150812a8SEvalZero IRQ CRYPTOCELL_IRQHandler 532*150812a8SEvalZero 533*150812a8SEvalZero .end 534