1*150812a8SEvalZero/* 2*150812a8SEvalZero 3*150812a8SEvalZeroCopyright (c) 2009-2018 ARM Limited. All rights reserved. 4*150812a8SEvalZero 5*150812a8SEvalZero SPDX-License-Identifier: Apache-2.0 6*150812a8SEvalZero 7*150812a8SEvalZeroLicensed under the Apache License, Version 2.0 (the License); you may 8*150812a8SEvalZeronot use this file except in compliance with the License. 9*150812a8SEvalZeroYou may obtain a copy of the License at 10*150812a8SEvalZero 11*150812a8SEvalZero www.apache.org/licenses/LICENSE-2.0 12*150812a8SEvalZero 13*150812a8SEvalZeroUnless required by applicable law or agreed to in writing, software 14*150812a8SEvalZerodistributed under the License is distributed on an AS IS BASIS, WITHOUT 15*150812a8SEvalZeroWARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 16*150812a8SEvalZeroSee the License for the specific language governing permissions and 17*150812a8SEvalZerolimitations under the License. 18*150812a8SEvalZero 19*150812a8SEvalZeroNOTICE: This file has been modified by Nordic Semiconductor ASA. 20*150812a8SEvalZero 21*150812a8SEvalZero*/ 22*150812a8SEvalZero 23*150812a8SEvalZero .syntax unified 24*150812a8SEvalZero .arch armv6-m 25*150812a8SEvalZero 26*150812a8SEvalZero#ifdef __STARTUP_CONFIG 27*150812a8SEvalZero#include "startup_config.h" 28*150812a8SEvalZero#ifndef __STARTUP_CONFIG_STACK_ALIGNEMENT 29*150812a8SEvalZero#define __STARTUP_CONFIG_STACK_ALIGNEMENT 3 30*150812a8SEvalZero#endif 31*150812a8SEvalZero#endif 32*150812a8SEvalZero 33*150812a8SEvalZero .section .stack 34*150812a8SEvalZero#if defined(__STARTUP_CONFIG) 35*150812a8SEvalZero .align __STARTUP_CONFIG_STACK_ALIGNEMENT 36*150812a8SEvalZero .equ Stack_Size, __STARTUP_CONFIG_STACK_SIZE 37*150812a8SEvalZero#elif defined(__STACK_SIZE) 38*150812a8SEvalZero .align 3 39*150812a8SEvalZero .equ Stack_Size, __STACK_SIZE 40*150812a8SEvalZero#else 41*150812a8SEvalZero .align 3 42*150812a8SEvalZero .equ Stack_Size, 2048 43*150812a8SEvalZero#endif 44*150812a8SEvalZero .globl __StackTop 45*150812a8SEvalZero .globl __StackLimit 46*150812a8SEvalZero__StackLimit: 47*150812a8SEvalZero .space Stack_Size 48*150812a8SEvalZero .size __StackLimit, . - __StackLimit 49*150812a8SEvalZero__StackTop: 50*150812a8SEvalZero .size __StackTop, . - __StackTop 51*150812a8SEvalZero 52*150812a8SEvalZero .section .heap 53*150812a8SEvalZero .align 3 54*150812a8SEvalZero#if defined(__STARTUP_CONFIG) 55*150812a8SEvalZero .equ Heap_Size, __STARTUP_CONFIG_HEAP_SIZE 56*150812a8SEvalZero#elif defined(__HEAP_SIZE) 57*150812a8SEvalZero .equ Heap_Size, __HEAP_SIZE 58*150812a8SEvalZero#else 59*150812a8SEvalZero .equ Heap_Size, 2048 60*150812a8SEvalZero#endif 61*150812a8SEvalZero .globl __HeapBase 62*150812a8SEvalZero .globl __HeapLimit 63*150812a8SEvalZero__HeapBase: 64*150812a8SEvalZero .if Heap_Size 65*150812a8SEvalZero .space Heap_Size 66*150812a8SEvalZero .endif 67*150812a8SEvalZero .size __HeapBase, . - __HeapBase 68*150812a8SEvalZero__HeapLimit: 69*150812a8SEvalZero .size __HeapLimit, . - __HeapLimit 70*150812a8SEvalZero 71*150812a8SEvalZero .section .isr_vector 72*150812a8SEvalZero .align 2 73*150812a8SEvalZero .globl __isr_vector 74*150812a8SEvalZero__isr_vector: 75*150812a8SEvalZero .long __StackTop /* Top of Stack */ 76*150812a8SEvalZero .long Reset_Handler 77*150812a8SEvalZero .long NMI_Handler 78*150812a8SEvalZero .long HardFault_Handler 79*150812a8SEvalZero .long 0 /*Reserved */ 80*150812a8SEvalZero .long 0 /*Reserved */ 81*150812a8SEvalZero .long 0 /*Reserved */ 82*150812a8SEvalZero .long 0 /*Reserved */ 83*150812a8SEvalZero .long 0 /*Reserved */ 84*150812a8SEvalZero .long 0 /*Reserved */ 85*150812a8SEvalZero .long 0 /*Reserved */ 86*150812a8SEvalZero .long SVC_Handler 87*150812a8SEvalZero .long 0 /*Reserved */ 88*150812a8SEvalZero .long 0 /*Reserved */ 89*150812a8SEvalZero .long PendSV_Handler 90*150812a8SEvalZero .long SysTick_Handler 91*150812a8SEvalZero 92*150812a8SEvalZero /* External Interrupts */ 93*150812a8SEvalZero .long POWER_CLOCK_IRQHandler 94*150812a8SEvalZero .long RADIO_IRQHandler 95*150812a8SEvalZero .long UART0_IRQHandler 96*150812a8SEvalZero .long SPI0_TWI0_IRQHandler 97*150812a8SEvalZero .long SPI1_TWI1_IRQHandler 98*150812a8SEvalZero .long 0 /*Reserved */ 99*150812a8SEvalZero .long GPIOTE_IRQHandler 100*150812a8SEvalZero .long ADC_IRQHandler 101*150812a8SEvalZero .long TIMER0_IRQHandler 102*150812a8SEvalZero .long TIMER1_IRQHandler 103*150812a8SEvalZero .long TIMER2_IRQHandler 104*150812a8SEvalZero .long RTC0_IRQHandler 105*150812a8SEvalZero .long TEMP_IRQHandler 106*150812a8SEvalZero .long RNG_IRQHandler 107*150812a8SEvalZero .long ECB_IRQHandler 108*150812a8SEvalZero .long CCM_AAR_IRQHandler 109*150812a8SEvalZero .long WDT_IRQHandler 110*150812a8SEvalZero .long RTC1_IRQHandler 111*150812a8SEvalZero .long QDEC_IRQHandler 112*150812a8SEvalZero .long LPCOMP_IRQHandler 113*150812a8SEvalZero .long SWI0_IRQHandler 114*150812a8SEvalZero .long SWI1_IRQHandler 115*150812a8SEvalZero .long SWI2_IRQHandler 116*150812a8SEvalZero .long SWI3_IRQHandler 117*150812a8SEvalZero .long SWI4_IRQHandler 118*150812a8SEvalZero .long SWI5_IRQHandler 119*150812a8SEvalZero .long 0 /*Reserved */ 120*150812a8SEvalZero .long 0 /*Reserved */ 121*150812a8SEvalZero .long 0 /*Reserved */ 122*150812a8SEvalZero .long 0 /*Reserved */ 123*150812a8SEvalZero .long 0 /*Reserved */ 124*150812a8SEvalZero .long 0 /*Reserved */ 125*150812a8SEvalZero 126*150812a8SEvalZero .size __isr_vector, . - __isr_vector 127*150812a8SEvalZero 128*150812a8SEvalZero/* Reset Handler */ 129*150812a8SEvalZero 130*150812a8SEvalZero .equ NRF_POWER_RAMON_ADDRESS, 0x40000524 131*150812a8SEvalZero .equ NRF_POWER_RAMONB_ADDRESS, 0x40000554 132*150812a8SEvalZero .equ NRF_POWER_RAMONx_RAMxON_ONMODE_Msk, 0x3 133*150812a8SEvalZero 134*150812a8SEvalZero .text 135*150812a8SEvalZero .thumb 136*150812a8SEvalZero .thumb_func 137*150812a8SEvalZero .align 1 138*150812a8SEvalZero .globl Reset_Handler 139*150812a8SEvalZero .type Reset_Handler, %function 140*150812a8SEvalZeroReset_Handler: 141*150812a8SEvalZero 142*150812a8SEvalZero MOVS R1, #NRF_POWER_RAMONx_RAMxON_ONMODE_Msk 143*150812a8SEvalZero 144*150812a8SEvalZero LDR R0, =NRF_POWER_RAMON_ADDRESS 145*150812a8SEvalZero LDR R2, [R0] 146*150812a8SEvalZero ORRS R2, R1 147*150812a8SEvalZero STR R2, [R0] 148*150812a8SEvalZero 149*150812a8SEvalZero LDR R0, =NRF_POWER_RAMONB_ADDRESS 150*150812a8SEvalZero LDR R2, [R0] 151*150812a8SEvalZero ORRS R2, R1 152*150812a8SEvalZero STR R2, [R0] 153*150812a8SEvalZero 154*150812a8SEvalZero/* Loop to copy data from read only memory to RAM. 155*150812a8SEvalZero * The ranges of copy from/to are specified by following symbols: 156*150812a8SEvalZero * __etext: LMA of start of the section to copy from. Usually end of text 157*150812a8SEvalZero * __data_start__: VMA of start of the section to copy to. 158*150812a8SEvalZero * __bss_start__: VMA of end of the section to copy to. Normally __data_end__ is used, but by using __bss_start__ 159*150812a8SEvalZero * the user can add their own initialized data section before BSS section with the INTERT AFTER command. 160*150812a8SEvalZero * 161*150812a8SEvalZero * All addresses must be aligned to 4 bytes boundary. 162*150812a8SEvalZero */ 163*150812a8SEvalZero ldr r1, =__etext 164*150812a8SEvalZero ldr r2, =__data_start__ 165*150812a8SEvalZero ldr r3, =__bss_start__ 166*150812a8SEvalZero 167*150812a8SEvalZero subs r3, r3, r2 168*150812a8SEvalZero ble .L_loop1_done 169*150812a8SEvalZero 170*150812a8SEvalZero.L_loop1: 171*150812a8SEvalZero subs r3, r3, #4 172*150812a8SEvalZero ldr r0, [r1,r3] 173*150812a8SEvalZero str r0, [r2,r3] 174*150812a8SEvalZero bgt .L_loop1 175*150812a8SEvalZero 176*150812a8SEvalZero.L_loop1_done: 177*150812a8SEvalZero 178*150812a8SEvalZero/* This part of work usually is done in C library startup code. Otherwise, 179*150812a8SEvalZero * define __STARTUP_CLEAR_BSS to enable it in this startup. This section 180*150812a8SEvalZero * clears the RAM where BSS data is located. 181*150812a8SEvalZero * 182*150812a8SEvalZero * The BSS section is specified by following symbols 183*150812a8SEvalZero * __bss_start__: start of the BSS section. 184*150812a8SEvalZero * __bss_end__: end of the BSS section. 185*150812a8SEvalZero * 186*150812a8SEvalZero * All addresses must be aligned to 4 bytes boundary. 187*150812a8SEvalZero */ 188*150812a8SEvalZero#ifdef __STARTUP_CLEAR_BSS 189*150812a8SEvalZero ldr r1, =__bss_start__ 190*150812a8SEvalZero ldr r2, =__bss_end__ 191*150812a8SEvalZero 192*150812a8SEvalZero movs r0, 0 193*150812a8SEvalZero 194*150812a8SEvalZero subs r2, r2, r1 195*150812a8SEvalZero ble .L_loop3_done 196*150812a8SEvalZero 197*150812a8SEvalZero.L_loop3: 198*150812a8SEvalZero subs r2, r2, #4 199*150812a8SEvalZero str r0, [r1, r2] 200*150812a8SEvalZero bgt .L_loop3 201*150812a8SEvalZero 202*150812a8SEvalZero.L_loop3_done: 203*150812a8SEvalZero#endif /* __STARTUP_CLEAR_BSS */ 204*150812a8SEvalZero 205*150812a8SEvalZero/* Execute SystemInit function. */ 206*150812a8SEvalZero bl SystemInit 207*150812a8SEvalZero 208*150812a8SEvalZero/* Call _start function provided by libraries. 209*150812a8SEvalZero * If those libraries are not accessible, define __START as your entry point. 210*150812a8SEvalZero */ 211*150812a8SEvalZero#ifndef __START 212*150812a8SEvalZero#define __START _start 213*150812a8SEvalZero#endif 214*150812a8SEvalZero bl __START 215*150812a8SEvalZero 216*150812a8SEvalZero .pool 217*150812a8SEvalZero .size Reset_Handler,.-Reset_Handler 218*150812a8SEvalZero 219*150812a8SEvalZero .section ".text" 220*150812a8SEvalZero 221*150812a8SEvalZero 222*150812a8SEvalZero/* Dummy Exception Handlers (infinite loops which can be modified) */ 223*150812a8SEvalZero 224*150812a8SEvalZero .weak NMI_Handler 225*150812a8SEvalZero .type NMI_Handler, %function 226*150812a8SEvalZeroNMI_Handler: 227*150812a8SEvalZero b . 228*150812a8SEvalZero .size NMI_Handler, . - NMI_Handler 229*150812a8SEvalZero 230*150812a8SEvalZero 231*150812a8SEvalZero .weak HardFault_Handler 232*150812a8SEvalZero .type HardFault_Handler, %function 233*150812a8SEvalZeroHardFault_Handler: 234*150812a8SEvalZero b . 235*150812a8SEvalZero .size HardFault_Handler, . - HardFault_Handler 236*150812a8SEvalZero 237*150812a8SEvalZero 238*150812a8SEvalZero .weak SVC_Handler 239*150812a8SEvalZero .type SVC_Handler, %function 240*150812a8SEvalZeroSVC_Handler: 241*150812a8SEvalZero b . 242*150812a8SEvalZero .size SVC_Handler, . - SVC_Handler 243*150812a8SEvalZero 244*150812a8SEvalZero 245*150812a8SEvalZero .weak PendSV_Handler 246*150812a8SEvalZero .type PendSV_Handler, %function 247*150812a8SEvalZeroPendSV_Handler: 248*150812a8SEvalZero b . 249*150812a8SEvalZero .size PendSV_Handler, . - PendSV_Handler 250*150812a8SEvalZero 251*150812a8SEvalZero 252*150812a8SEvalZero .weak SysTick_Handler 253*150812a8SEvalZero .type SysTick_Handler, %function 254*150812a8SEvalZeroSysTick_Handler: 255*150812a8SEvalZero b . 256*150812a8SEvalZero .size SysTick_Handler, . - SysTick_Handler 257*150812a8SEvalZero 258*150812a8SEvalZero 259*150812a8SEvalZero/* IRQ Handlers */ 260*150812a8SEvalZero 261*150812a8SEvalZero .globl Default_Handler 262*150812a8SEvalZero .type Default_Handler, %function 263*150812a8SEvalZeroDefault_Handler: 264*150812a8SEvalZero b . 265*150812a8SEvalZero .size Default_Handler, . - Default_Handler 266*150812a8SEvalZero 267*150812a8SEvalZero .macro IRQ handler 268*150812a8SEvalZero .weak \handler 269*150812a8SEvalZero .set \handler, Default_Handler 270*150812a8SEvalZero .endm 271*150812a8SEvalZero 272*150812a8SEvalZero IRQ POWER_CLOCK_IRQHandler 273*150812a8SEvalZero IRQ RADIO_IRQHandler 274*150812a8SEvalZero IRQ UART0_IRQHandler 275*150812a8SEvalZero IRQ SPI0_TWI0_IRQHandler 276*150812a8SEvalZero IRQ SPI1_TWI1_IRQHandler 277*150812a8SEvalZero IRQ GPIOTE_IRQHandler 278*150812a8SEvalZero IRQ ADC_IRQHandler 279*150812a8SEvalZero IRQ TIMER0_IRQHandler 280*150812a8SEvalZero IRQ TIMER1_IRQHandler 281*150812a8SEvalZero IRQ TIMER2_IRQHandler 282*150812a8SEvalZero IRQ RTC0_IRQHandler 283*150812a8SEvalZero IRQ TEMP_IRQHandler 284*150812a8SEvalZero IRQ RNG_IRQHandler 285*150812a8SEvalZero IRQ ECB_IRQHandler 286*150812a8SEvalZero IRQ CCM_AAR_IRQHandler 287*150812a8SEvalZero IRQ WDT_IRQHandler 288*150812a8SEvalZero IRQ RTC1_IRQHandler 289*150812a8SEvalZero IRQ QDEC_IRQHandler 290*150812a8SEvalZero IRQ LPCOMP_IRQHandler 291*150812a8SEvalZero IRQ SWI0_IRQHandler 292*150812a8SEvalZero IRQ SWI1_IRQHandler 293*150812a8SEvalZero IRQ SWI2_IRQHandler 294*150812a8SEvalZero IRQ SWI3_IRQHandler 295*150812a8SEvalZero IRQ SWI4_IRQHandler 296*150812a8SEvalZero IRQ SWI5_IRQHandler 297*150812a8SEvalZero 298*150812a8SEvalZero .end 299