1; Copyright (c) 2009-2018 ARM Limited. All rights reserved. 2; 3; SPDX-License-Identifier: Apache-2.0 4; 5; Licensed under the Apache License, Version 2.0 (the License); you may 6; not use this file except in compliance with the License. 7; You may obtain a copy of the License at 8; 9; www.apache.org/licenses/LICENSE-2.0 10; 11; Unless required by applicable law or agreed to in writing, software 12; distributed under the License is distributed on an AS IS BASIS, WITHOUT 13; WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 14; See the License for the specific language governing permissions and 15; limitations under the License. 16; 17; NOTICE: This file has been modified by Nordic Semiconductor ASA. 18 19 IF :DEF: __STARTUP_CONFIG 20#ifdef __STARTUP_CONFIG 21#include "startup_config.h" 22#ifndef __STARTUP_CONFIG_STACK_ALIGNEMENT 23#define __STARTUP_CONFIG_STACK_ALIGNEMENT 3 24#endif 25#endif 26 ENDIF 27 28 IF :DEF: __STARTUP_CONFIG 29Stack_Size EQU __STARTUP_CONFIG_STACK_SIZE 30 ELIF :DEF: __STACK_SIZE 31Stack_Size EQU __STACK_SIZE 32 ELSE 33Stack_Size EQU 8192 34 ENDIF 35 36 IF :DEF: __STARTUP_CONFIG 37Stack_Align EQU __STARTUP_CONFIG_STACK_ALIGNEMENT 38 ELSE 39Stack_Align EQU 3 40 ENDIF 41 42 AREA STACK, NOINIT, READWRITE, ALIGN=Stack_Align 43Stack_Mem SPACE Stack_Size 44__initial_sp 45 46 IF :DEF: __STARTUP_CONFIG 47Heap_Size EQU __STARTUP_CONFIG_HEAP_SIZE 48 ELIF :DEF: __HEAP_SIZE 49Heap_Size EQU __HEAP_SIZE 50 ELSE 51Heap_Size EQU 8192 52 ENDIF 53 54 AREA HEAP, NOINIT, READWRITE, ALIGN=3 55__heap_base 56Heap_Mem SPACE Heap_Size 57__heap_limit 58 59 PRESERVE8 60 THUMB 61 62; Vector Table Mapped to Address 0 at Reset 63 64 AREA RESET, DATA, READONLY 65 EXPORT __Vectors 66 EXPORT __Vectors_End 67 EXPORT __Vectors_Size 68 69__Vectors DCD __initial_sp ; Top of Stack 70 DCD Reset_Handler 71 DCD NMI_Handler 72 DCD HardFault_Handler 73 DCD MemoryManagement_Handler 74 DCD BusFault_Handler 75 DCD UsageFault_Handler 76 DCD SecureFault_Handler 77 DCD 0 ; Reserved 78 DCD 0 ; Reserved 79 DCD 0 ; Reserved 80 DCD SVC_Handler 81 DCD DebugMon_Handler 82 DCD 0 ; Reserved 83 DCD PendSV_Handler 84 DCD SysTick_Handler 85 86 ; External Interrupts 87 DCD 0 ; Reserved 88 DCD 0 ; Reserved 89 DCD 0 ; Reserved 90 DCD SPU_IRQHandler 91 DCD 0 ; Reserved 92 DCD CLOCK_POWER_IRQHandler 93 DCD 0 ; Reserved 94 DCD 0 ; Reserved 95 DCD UARTE0_SPIM0_SPIS0_TWIM0_TWIS0_IRQHandler 96 DCD UARTE1_SPIM1_SPIS1_TWIM1_TWIS1_IRQHandler 97 DCD UARTE2_SPIM2_SPIS2_TWIM2_TWIS2_IRQHandler 98 DCD UARTE3_SPIM3_SPIS3_TWIM3_TWIS3_IRQHandler 99 DCD 0 ; Reserved 100 DCD GPIOTE0_IRQHandler 101 DCD SAADC_IRQHandler 102 DCD TIMER0_IRQHandler 103 DCD TIMER1_IRQHandler 104 DCD TIMER2_IRQHandler 105 DCD 0 ; Reserved 106 DCD 0 ; Reserved 107 DCD RTC0_IRQHandler 108 DCD RTC1_IRQHandler 109 DCD 0 ; Reserved 110 DCD 0 ; Reserved 111 DCD WDT_IRQHandler 112 DCD 0 ; Reserved 113 DCD 0 ; Reserved 114 DCD EGU0_IRQHandler 115 DCD EGU1_IRQHandler 116 DCD EGU2_IRQHandler 117 DCD EGU3_IRQHandler 118 DCD EGU4_IRQHandler 119 DCD EGU5_IRQHandler 120 DCD PWM0_IRQHandler 121 DCD PWM1_IRQHandler 122 DCD PWM2_IRQHandler 123 DCD PWM3_IRQHandler 124 DCD 0 ; Reserved 125 DCD PDM_IRQHandler 126 DCD 0 ; Reserved 127 DCD I2S_IRQHandler 128 DCD 0 ; Reserved 129 DCD IPC_IRQHandler 130 DCD 0 ; Reserved 131 DCD FPU_IRQHandler 132 DCD 0 ; Reserved 133 DCD 0 ; Reserved 134 DCD 0 ; Reserved 135 DCD 0 ; Reserved 136 DCD GPIOTE1_IRQHandler 137 DCD 0 ; Reserved 138 DCD 0 ; Reserved 139 DCD 0 ; Reserved 140 DCD 0 ; Reserved 141 DCD 0 ; Reserved 142 DCD 0 ; Reserved 143 DCD 0 ; Reserved 144 DCD KMU_IRQHandler 145 DCD 0 ; Reserved 146 DCD 0 ; Reserved 147 DCD 0 ; Reserved 148 DCD 0 ; Reserved 149 DCD 0 ; Reserved 150 DCD 0 ; Reserved 151 DCD CRYPTOCELL_IRQHandler 152 DCD 0 ; Reserved 153 DCD 0 ; Reserved 154 DCD 0 ; Reserved 155 DCD 0 ; Reserved 156 DCD 0 ; Reserved 157 DCD 0 ; Reserved 158 DCD 0 ; Reserved 159 DCD 0 ; Reserved 160 DCD 0 ; Reserved 161 DCD 0 ; Reserved 162 DCD 0 ; Reserved 163 DCD 0 ; Reserved 164 DCD 0 ; Reserved 165 DCD 0 ; Reserved 166 DCD 0 ; Reserved 167 DCD 0 ; Reserved 168 DCD 0 ; Reserved 169 DCD 0 ; Reserved 170 DCD 0 ; Reserved 171 DCD 0 ; Reserved 172 DCD 0 ; Reserved 173 DCD 0 ; Reserved 174 DCD 0 ; Reserved 175 DCD 0 ; Reserved 176 DCD 0 ; Reserved 177 DCD 0 ; Reserved 178 DCD 0 ; Reserved 179 DCD 0 ; Reserved 180 DCD 0 ; Reserved 181 DCD 0 ; Reserved 182 DCD 0 ; Reserved 183 DCD 0 ; Reserved 184 DCD 0 ; Reserved 185 DCD 0 ; Reserved 186 DCD 0 ; Reserved 187 DCD 0 ; Reserved 188 DCD 0 ; Reserved 189 DCD 0 ; Reserved 190 DCD 0 ; Reserved 191 DCD 0 ; Reserved 192 DCD 0 ; Reserved 193 DCD 0 ; Reserved 194 DCD 0 ; Reserved 195 DCD 0 ; Reserved 196 DCD 0 ; Reserved 197 DCD 0 ; Reserved 198 DCD 0 ; Reserved 199 DCD 0 ; Reserved 200 DCD 0 ; Reserved 201 DCD 0 ; Reserved 202 DCD 0 ; Reserved 203 DCD 0 ; Reserved 204 DCD 0 ; Reserved 205 DCD 0 ; Reserved 206 DCD 0 ; Reserved 207 DCD 0 ; Reserved 208 DCD 0 ; Reserved 209 DCD 0 ; Reserved 210 DCD 0 ; Reserved 211 DCD 0 ; Reserved 212 DCD 0 ; Reserved 213 DCD 0 ; Reserved 214 DCD 0 ; Reserved 215 DCD 0 ; Reserved 216 DCD 0 ; Reserved 217 DCD 0 ; Reserved 218 DCD 0 ; Reserved 219 DCD 0 ; Reserved 220 DCD 0 ; Reserved 221 DCD 0 ; Reserved 222 DCD 0 ; Reserved 223 DCD 0 ; Reserved 224 DCD 0 ; Reserved 225 DCD 0 ; Reserved 226 DCD 0 ; Reserved 227 DCD 0 ; Reserved 228 DCD 0 ; Reserved 229 DCD 0 ; Reserved 230 DCD 0 ; Reserved 231 DCD 0 ; Reserved 232 DCD 0 ; Reserved 233 DCD 0 ; Reserved 234 DCD 0 ; Reserved 235 DCD 0 ; Reserved 236 DCD 0 ; Reserved 237 DCD 0 ; Reserved 238 DCD 0 ; Reserved 239 DCD 0 ; Reserved 240 DCD 0 ; Reserved 241 DCD 0 ; Reserved 242 DCD 0 ; Reserved 243 DCD 0 ; Reserved 244 DCD 0 ; Reserved 245 DCD 0 ; Reserved 246 DCD 0 ; Reserved 247 DCD 0 ; Reserved 248 DCD 0 ; Reserved 249 DCD 0 ; Reserved 250 DCD 0 ; Reserved 251 DCD 0 ; Reserved 252 DCD 0 ; Reserved 253 DCD 0 ; Reserved 254 DCD 0 ; Reserved 255 DCD 0 ; Reserved 256 DCD 0 ; Reserved 257 DCD 0 ; Reserved 258 DCD 0 ; Reserved 259 DCD 0 ; Reserved 260 DCD 0 ; Reserved 261 DCD 0 ; Reserved 262 DCD 0 ; Reserved 263 DCD 0 ; Reserved 264 DCD 0 ; Reserved 265 DCD 0 ; Reserved 266 DCD 0 ; Reserved 267 DCD 0 ; Reserved 268 DCD 0 ; Reserved 269 DCD 0 ; Reserved 270 DCD 0 ; Reserved 271 DCD 0 ; Reserved 272 DCD 0 ; Reserved 273 DCD 0 ; Reserved 274 DCD 0 ; Reserved 275 DCD 0 ; Reserved 276 DCD 0 ; Reserved 277 DCD 0 ; Reserved 278 DCD 0 ; Reserved 279 DCD 0 ; Reserved 280 DCD 0 ; Reserved 281 DCD 0 ; Reserved 282 DCD 0 ; Reserved 283 DCD 0 ; Reserved 284 DCD 0 ; Reserved 285 DCD 0 ; Reserved 286 DCD 0 ; Reserved 287 DCD 0 ; Reserved 288 DCD 0 ; Reserved 289 DCD 0 ; Reserved 290 DCD 0 ; Reserved 291 DCD 0 ; Reserved 292 DCD 0 ; Reserved 293 DCD 0 ; Reserved 294 DCD 0 ; Reserved 295 DCD 0 ; Reserved 296 DCD 0 ; Reserved 297 DCD 0 ; Reserved 298 DCD 0 ; Reserved 299 DCD 0 ; Reserved 300 DCD 0 ; Reserved 301 DCD 0 ; Reserved 302 DCD 0 ; Reserved 303 DCD 0 ; Reserved 304 DCD 0 ; Reserved 305 DCD 0 ; Reserved 306 DCD 0 ; Reserved 307 DCD 0 ; Reserved 308 DCD 0 ; Reserved 309 DCD 0 ; Reserved 310 DCD 0 ; Reserved 311 DCD 0 ; Reserved 312 DCD 0 ; Reserved 313 DCD 0 ; Reserved 314 DCD 0 ; Reserved 315 DCD 0 ; Reserved 316 DCD 0 ; Reserved 317 DCD 0 ; Reserved 318 DCD 0 ; Reserved 319 DCD 0 ; Reserved 320 DCD 0 ; Reserved 321 DCD 0 ; Reserved 322 DCD 0 ; Reserved 323 DCD 0 ; Reserved 324 DCD 0 ; Reserved 325 DCD 0 ; Reserved 326 DCD 0 ; Reserved 327 328__Vectors_End 329 330__Vectors_Size EQU __Vectors_End - __Vectors 331 332 AREA |.text|, CODE, READONLY 333 334; Reset Handler 335 336 337Reset_Handler PROC 338 EXPORT Reset_Handler [WEAK] 339 IMPORT SystemInit 340 IMPORT __main 341 342 343 LDR R0, =SystemInit 344 BLX R0 345 LDR R0, =__main 346 BX R0 347 ENDP 348 349; Dummy Exception Handlers (infinite loops which can be modified) 350 351NMI_Handler PROC 352 EXPORT NMI_Handler [WEAK] 353 B . 354 ENDP 355HardFault_Handler\ 356 PROC 357 EXPORT HardFault_Handler [WEAK] 358 B . 359 ENDP 360MemoryManagement_Handler\ 361 PROC 362 EXPORT MemoryManagement_Handler [WEAK] 363 B . 364 ENDP 365BusFault_Handler\ 366 PROC 367 EXPORT BusFault_Handler [WEAK] 368 B . 369 ENDP 370UsageFault_Handler\ 371 PROC 372 EXPORT UsageFault_Handler [WEAK] 373 B . 374 ENDP 375SecureFault_Handler\ 376 PROC 377 EXPORT SecureFault_Handler [WEAK] 378 B . 379 ENDP 380SVC_Handler PROC 381 EXPORT SVC_Handler [WEAK] 382 B . 383 ENDP 384DebugMon_Handler\ 385 PROC 386 EXPORT DebugMon_Handler [WEAK] 387 B . 388 ENDP 389PendSV_Handler PROC 390 EXPORT PendSV_Handler [WEAK] 391 B . 392 ENDP 393SysTick_Handler PROC 394 EXPORT SysTick_Handler [WEAK] 395 B . 396 ENDP 397 398Default_Handler PROC 399 400 EXPORT SPU_IRQHandler [WEAK] 401 EXPORT CLOCK_POWER_IRQHandler [WEAK] 402 EXPORT UARTE0_SPIM0_SPIS0_TWIM0_TWIS0_IRQHandler [WEAK] 403 EXPORT UARTE1_SPIM1_SPIS1_TWIM1_TWIS1_IRQHandler [WEAK] 404 EXPORT UARTE2_SPIM2_SPIS2_TWIM2_TWIS2_IRQHandler [WEAK] 405 EXPORT UARTE3_SPIM3_SPIS3_TWIM3_TWIS3_IRQHandler [WEAK] 406 EXPORT GPIOTE0_IRQHandler [WEAK] 407 EXPORT SAADC_IRQHandler [WEAK] 408 EXPORT TIMER0_IRQHandler [WEAK] 409 EXPORT TIMER1_IRQHandler [WEAK] 410 EXPORT TIMER2_IRQHandler [WEAK] 411 EXPORT RTC0_IRQHandler [WEAK] 412 EXPORT RTC1_IRQHandler [WEAK] 413 EXPORT WDT_IRQHandler [WEAK] 414 EXPORT EGU0_IRQHandler [WEAK] 415 EXPORT EGU1_IRQHandler [WEAK] 416 EXPORT EGU2_IRQHandler [WEAK] 417 EXPORT EGU3_IRQHandler [WEAK] 418 EXPORT EGU4_IRQHandler [WEAK] 419 EXPORT EGU5_IRQHandler [WEAK] 420 EXPORT PWM0_IRQHandler [WEAK] 421 EXPORT PWM1_IRQHandler [WEAK] 422 EXPORT PWM2_IRQHandler [WEAK] 423 EXPORT PWM3_IRQHandler [WEAK] 424 EXPORT PDM_IRQHandler [WEAK] 425 EXPORT I2S_IRQHandler [WEAK] 426 EXPORT IPC_IRQHandler [WEAK] 427 EXPORT FPU_IRQHandler [WEAK] 428 EXPORT GPIOTE1_IRQHandler [WEAK] 429 EXPORT KMU_IRQHandler [WEAK] 430 EXPORT CRYPTOCELL_IRQHandler [WEAK] 431SPU_IRQHandler 432CLOCK_POWER_IRQHandler 433UARTE0_SPIM0_SPIS0_TWIM0_TWIS0_IRQHandler 434UARTE1_SPIM1_SPIS1_TWIM1_TWIS1_IRQHandler 435UARTE2_SPIM2_SPIS2_TWIM2_TWIS2_IRQHandler 436UARTE3_SPIM3_SPIS3_TWIM3_TWIS3_IRQHandler 437GPIOTE0_IRQHandler 438SAADC_IRQHandler 439TIMER0_IRQHandler 440TIMER1_IRQHandler 441TIMER2_IRQHandler 442RTC0_IRQHandler 443RTC1_IRQHandler 444WDT_IRQHandler 445EGU0_IRQHandler 446EGU1_IRQHandler 447EGU2_IRQHandler 448EGU3_IRQHandler 449EGU4_IRQHandler 450EGU5_IRQHandler 451PWM0_IRQHandler 452PWM1_IRQHandler 453PWM2_IRQHandler 454PWM3_IRQHandler 455PDM_IRQHandler 456I2S_IRQHandler 457IPC_IRQHandler 458FPU_IRQHandler 459GPIOTE1_IRQHandler 460KMU_IRQHandler 461CRYPTOCELL_IRQHandler 462 B . 463 ENDP 464 ALIGN 465 466; User Initial Stack & Heap 467 468 IF :DEF:__MICROLIB 469 470 EXPORT __initial_sp 471 EXPORT __heap_base 472 EXPORT __heap_limit 473 474 ELSE 475 476 IMPORT __use_two_region_memory 477 EXPORT __user_initial_stackheap 478 479__user_initial_stackheap PROC 480 481 LDR R0, = Heap_Mem 482 LDR R1, = (Stack_Mem + Stack_Size) 483 LDR R2, = (Heap_Mem + Heap_Size) 484 LDR R3, = Stack_Mem 485 BX LR 486 ENDP 487 488 ALIGN 489 490 ENDIF 491 492 END 493