1; Copyright (c) 2009-2018 ARM Limited. All rights reserved. 2; 3; SPDX-License-Identifier: Apache-2.0 4; 5; Licensed under the Apache License, Version 2.0 (the License); you may 6; not use this file except in compliance with the License. 7; You may obtain a copy of the License at 8; 9; www.apache.org/licenses/LICENSE-2.0 10; 11; Unless required by applicable law or agreed to in writing, software 12; distributed under the License is distributed on an AS IS BASIS, WITHOUT 13; WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 14; See the License for the specific language governing permissions and 15; limitations under the License. 16; 17; NOTICE: This file has been modified by Nordic Semiconductor ASA. 18 19 IF :DEF: __STARTUP_CONFIG 20#ifdef __STARTUP_CONFIG 21#include "startup_config.h" 22#ifndef __STARTUP_CONFIG_STACK_ALIGNEMENT 23#define __STARTUP_CONFIG_STACK_ALIGNEMENT 3 24#endif 25#endif 26 ENDIF 27 28 IF :DEF: __STARTUP_CONFIG 29Stack_Size EQU __STARTUP_CONFIG_STACK_SIZE 30 ELIF :DEF: __STACK_SIZE 31Stack_Size EQU __STACK_SIZE 32 ELSE 33Stack_Size EQU 8192 34 ENDIF 35 36 IF :DEF: __STARTUP_CONFIG 37Stack_Align EQU __STARTUP_CONFIG_STACK_ALIGNEMENT 38 ELSE 39Stack_Align EQU 3 40 ENDIF 41 42 AREA STACK, NOINIT, READWRITE, ALIGN=Stack_Align 43Stack_Mem SPACE Stack_Size 44__initial_sp 45 46 IF :DEF: __STARTUP_CONFIG 47Heap_Size EQU __STARTUP_CONFIG_HEAP_SIZE 48 ELIF :DEF: __HEAP_SIZE 49Heap_Size EQU __HEAP_SIZE 50 ELSE 51Heap_Size EQU 8192 52 ENDIF 53 54 AREA HEAP, NOINIT, READWRITE, ALIGN=3 55__heap_base 56Heap_Mem SPACE Heap_Size 57__heap_limit 58 59 PRESERVE8 60 THUMB 61 62; Vector Table Mapped to Address 0 at Reset 63 64 AREA RESET, DATA, READONLY 65 EXPORT __Vectors 66 EXPORT __Vectors_End 67 EXPORT __Vectors_Size 68 69__Vectors DCD __initial_sp ; Top of Stack 70 DCD Reset_Handler 71 DCD NMI_Handler 72 DCD HardFault_Handler 73 DCD MemoryManagement_Handler 74 DCD BusFault_Handler 75 DCD UsageFault_Handler 76 DCD 0 ; Reserved 77 DCD 0 ; Reserved 78 DCD 0 ; Reserved 79 DCD 0 ; Reserved 80 DCD SVC_Handler 81 DCD DebugMon_Handler 82 DCD 0 ; Reserved 83 DCD PendSV_Handler 84 DCD SysTick_Handler 85 86 ; External Interrupts 87 DCD POWER_CLOCK_IRQHandler 88 DCD RADIO_IRQHandler 89 DCD UARTE0_UART0_IRQHandler 90 DCD SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler 91 DCD SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler 92 DCD NFCT_IRQHandler 93 DCD GPIOTE_IRQHandler 94 DCD SAADC_IRQHandler 95 DCD TIMER0_IRQHandler 96 DCD TIMER1_IRQHandler 97 DCD TIMER2_IRQHandler 98 DCD RTC0_IRQHandler 99 DCD TEMP_IRQHandler 100 DCD RNG_IRQHandler 101 DCD ECB_IRQHandler 102 DCD CCM_AAR_IRQHandler 103 DCD WDT_IRQHandler 104 DCD RTC1_IRQHandler 105 DCD QDEC_IRQHandler 106 DCD COMP_LPCOMP_IRQHandler 107 DCD SWI0_EGU0_IRQHandler 108 DCD SWI1_EGU1_IRQHandler 109 DCD SWI2_EGU2_IRQHandler 110 DCD SWI3_EGU3_IRQHandler 111 DCD SWI4_EGU4_IRQHandler 112 DCD SWI5_EGU5_IRQHandler 113 DCD TIMER3_IRQHandler 114 DCD TIMER4_IRQHandler 115 DCD PWM0_IRQHandler 116 DCD PDM_IRQHandler 117 DCD 0 ; Reserved 118 DCD 0 ; Reserved 119 DCD MWU_IRQHandler 120 DCD PWM1_IRQHandler 121 DCD PWM2_IRQHandler 122 DCD SPIM2_SPIS2_SPI2_IRQHandler 123 DCD RTC2_IRQHandler 124 DCD I2S_IRQHandler 125 DCD FPU_IRQHandler 126 DCD USBD_IRQHandler 127 DCD UARTE1_IRQHandler 128 DCD QSPI_IRQHandler 129 DCD CRYPTOCELL_IRQHandler 130 DCD 0 ; Reserved 131 DCD 0 ; Reserved 132 DCD PWM3_IRQHandler 133 DCD 0 ; Reserved 134 DCD SPIM3_IRQHandler 135 DCD 0 ; Reserved 136 DCD 0 ; Reserved 137 DCD 0 ; Reserved 138 DCD 0 ; Reserved 139 DCD 0 ; Reserved 140 DCD 0 ; Reserved 141 DCD 0 ; Reserved 142 DCD 0 ; Reserved 143 DCD 0 ; Reserved 144 DCD 0 ; Reserved 145 DCD 0 ; Reserved 146 DCD 0 ; Reserved 147 DCD 0 ; Reserved 148 DCD 0 ; Reserved 149 DCD 0 ; Reserved 150 DCD 0 ; Reserved 151 DCD 0 ; Reserved 152 DCD 0 ; Reserved 153 DCD 0 ; Reserved 154 DCD 0 ; Reserved 155 DCD 0 ; Reserved 156 DCD 0 ; Reserved 157 DCD 0 ; Reserved 158 DCD 0 ; Reserved 159 DCD 0 ; Reserved 160 DCD 0 ; Reserved 161 DCD 0 ; Reserved 162 DCD 0 ; Reserved 163 DCD 0 ; Reserved 164 DCD 0 ; Reserved 165 DCD 0 ; Reserved 166 DCD 0 ; Reserved 167 DCD 0 ; Reserved 168 DCD 0 ; Reserved 169 DCD 0 ; Reserved 170 DCD 0 ; Reserved 171 DCD 0 ; Reserved 172 DCD 0 ; Reserved 173 DCD 0 ; Reserved 174 DCD 0 ; Reserved 175 DCD 0 ; Reserved 176 DCD 0 ; Reserved 177 DCD 0 ; Reserved 178 DCD 0 ; Reserved 179 DCD 0 ; Reserved 180 DCD 0 ; Reserved 181 DCD 0 ; Reserved 182 DCD 0 ; Reserved 183 DCD 0 ; Reserved 184 DCD 0 ; Reserved 185 DCD 0 ; Reserved 186 DCD 0 ; Reserved 187 DCD 0 ; Reserved 188 DCD 0 ; Reserved 189 DCD 0 ; Reserved 190 DCD 0 ; Reserved 191 DCD 0 ; Reserved 192 DCD 0 ; Reserved 193 DCD 0 ; Reserved 194 DCD 0 ; Reserved 195 DCD 0 ; Reserved 196 DCD 0 ; Reserved 197 DCD 0 ; Reserved 198 DCD 0 ; Reserved 199 200__Vectors_End 201 202__Vectors_Size EQU __Vectors_End - __Vectors 203 204 AREA |.text|, CODE, READONLY 205 206; Reset Handler 207 208 209Reset_Handler PROC 210 EXPORT Reset_Handler [WEAK] 211 IMPORT SystemInit 212 IMPORT __main 213 214 215 LDR R0, =SystemInit 216 BLX R0 217 LDR R0, =__main 218 BX R0 219 ENDP 220 221; Dummy Exception Handlers (infinite loops which can be modified) 222 223NMI_Handler PROC 224 EXPORT NMI_Handler [WEAK] 225 B . 226 ENDP 227HardFault_Handler\ 228 PROC 229 EXPORT HardFault_Handler [WEAK] 230 B . 231 ENDP 232MemoryManagement_Handler\ 233 PROC 234 EXPORT MemoryManagement_Handler [WEAK] 235 B . 236 ENDP 237BusFault_Handler\ 238 PROC 239 EXPORT BusFault_Handler [WEAK] 240 B . 241 ENDP 242UsageFault_Handler\ 243 PROC 244 EXPORT UsageFault_Handler [WEAK] 245 B . 246 ENDP 247SVC_Handler PROC 248 EXPORT SVC_Handler [WEAK] 249 B . 250 ENDP 251DebugMon_Handler\ 252 PROC 253 EXPORT DebugMon_Handler [WEAK] 254 B . 255 ENDP 256PendSV_Handler PROC 257 EXPORT PendSV_Handler [WEAK] 258 B . 259 ENDP 260SysTick_Handler PROC 261 EXPORT SysTick_Handler [WEAK] 262 B . 263 ENDP 264 265Default_Handler PROC 266 267 EXPORT POWER_CLOCK_IRQHandler [WEAK] 268 EXPORT RADIO_IRQHandler [WEAK] 269 EXPORT UARTE0_UART0_IRQHandler [WEAK] 270 EXPORT SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler [WEAK] 271 EXPORT SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler [WEAK] 272 EXPORT NFCT_IRQHandler [WEAK] 273 EXPORT GPIOTE_IRQHandler [WEAK] 274 EXPORT SAADC_IRQHandler [WEAK] 275 EXPORT TIMER0_IRQHandler [WEAK] 276 EXPORT TIMER1_IRQHandler [WEAK] 277 EXPORT TIMER2_IRQHandler [WEAK] 278 EXPORT RTC0_IRQHandler [WEAK] 279 EXPORT TEMP_IRQHandler [WEAK] 280 EXPORT RNG_IRQHandler [WEAK] 281 EXPORT ECB_IRQHandler [WEAK] 282 EXPORT CCM_AAR_IRQHandler [WEAK] 283 EXPORT WDT_IRQHandler [WEAK] 284 EXPORT RTC1_IRQHandler [WEAK] 285 EXPORT QDEC_IRQHandler [WEAK] 286 EXPORT COMP_LPCOMP_IRQHandler [WEAK] 287 EXPORT SWI0_EGU0_IRQHandler [WEAK] 288 EXPORT SWI1_EGU1_IRQHandler [WEAK] 289 EXPORT SWI2_EGU2_IRQHandler [WEAK] 290 EXPORT SWI3_EGU3_IRQHandler [WEAK] 291 EXPORT SWI4_EGU4_IRQHandler [WEAK] 292 EXPORT SWI5_EGU5_IRQHandler [WEAK] 293 EXPORT TIMER3_IRQHandler [WEAK] 294 EXPORT TIMER4_IRQHandler [WEAK] 295 EXPORT PWM0_IRQHandler [WEAK] 296 EXPORT PDM_IRQHandler [WEAK] 297 EXPORT MWU_IRQHandler [WEAK] 298 EXPORT PWM1_IRQHandler [WEAK] 299 EXPORT PWM2_IRQHandler [WEAK] 300 EXPORT SPIM2_SPIS2_SPI2_IRQHandler [WEAK] 301 EXPORT RTC2_IRQHandler [WEAK] 302 EXPORT I2S_IRQHandler [WEAK] 303 EXPORT FPU_IRQHandler [WEAK] 304 EXPORT USBD_IRQHandler [WEAK] 305 EXPORT UARTE1_IRQHandler [WEAK] 306 EXPORT QSPI_IRQHandler [WEAK] 307 EXPORT CRYPTOCELL_IRQHandler [WEAK] 308 EXPORT PWM3_IRQHandler [WEAK] 309 EXPORT SPIM3_IRQHandler [WEAK] 310POWER_CLOCK_IRQHandler 311RADIO_IRQHandler 312UARTE0_UART0_IRQHandler 313SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler 314SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler 315NFCT_IRQHandler 316GPIOTE_IRQHandler 317SAADC_IRQHandler 318TIMER0_IRQHandler 319TIMER1_IRQHandler 320TIMER2_IRQHandler 321RTC0_IRQHandler 322TEMP_IRQHandler 323RNG_IRQHandler 324ECB_IRQHandler 325CCM_AAR_IRQHandler 326WDT_IRQHandler 327RTC1_IRQHandler 328QDEC_IRQHandler 329COMP_LPCOMP_IRQHandler 330SWI0_EGU0_IRQHandler 331SWI1_EGU1_IRQHandler 332SWI2_EGU2_IRQHandler 333SWI3_EGU3_IRQHandler 334SWI4_EGU4_IRQHandler 335SWI5_EGU5_IRQHandler 336TIMER3_IRQHandler 337TIMER4_IRQHandler 338PWM0_IRQHandler 339PDM_IRQHandler 340MWU_IRQHandler 341PWM1_IRQHandler 342PWM2_IRQHandler 343SPIM2_SPIS2_SPI2_IRQHandler 344RTC2_IRQHandler 345I2S_IRQHandler 346FPU_IRQHandler 347USBD_IRQHandler 348UARTE1_IRQHandler 349QSPI_IRQHandler 350CRYPTOCELL_IRQHandler 351PWM3_IRQHandler 352SPIM3_IRQHandler 353 B . 354 ENDP 355 ALIGN 356 357; User Initial Stack & Heap 358 359 IF :DEF:__MICROLIB 360 361 EXPORT __initial_sp 362 EXPORT __heap_base 363 EXPORT __heap_limit 364 365 ELSE 366 367 IMPORT __use_two_region_memory 368 EXPORT __user_initial_stackheap 369 370__user_initial_stackheap PROC 371 372 LDR R0, = Heap_Mem 373 LDR R1, = (Stack_Mem + Stack_Size) 374 LDR R2, = (Heap_Mem + Heap_Size) 375 LDR R3, = Stack_Mem 376 BX LR 377 ENDP 378 379 ALIGN 380 381 ENDIF 382 383 END 384