1 /*
2 * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are met:
7 *
8 * 1. Redistributions of source code must retain the above copyright notice, this
9 * list of conditions and the following disclaimer.
10 *
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * 3. Neither the name of the copyright holder nor the names of its
16 * contributors may be used to endorse or promote products derived from this
17 * software without specific prior written permission.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
23 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32 #ifndef NRF_WDT_H__
33 #define NRF_WDT_H__
34
35 #include <nrfx.h>
36
37 #ifdef __cplusplus
38 extern "C" {
39 #endif
40
41 /**
42 * @defgroup nrf_wdt_hal WDT HAL
43 * @{
44 * @ingroup nrf_wdt
45 * @brief Hardware access layer for managing the Watchdog Timer (WDT) peripheral.
46 */
47
48 #define NRF_WDT_CHANNEL_NUMBER 0x8UL
49 #define NRF_WDT_RR_VALUE 0x6E524635UL /* Fixed value, shouldn't be modified.*/
50
51 #define NRF_WDT_TASK_SET 1UL
52 #define NRF_WDT_EVENT_CLEAR 0UL
53
54 /**
55 * @enum nrf_wdt_task_t
56 * @brief WDT tasks.
57 */
58 typedef enum
59 {
60 /*lint -save -e30 -esym(628,__INTADDR__)*/
61 NRF_WDT_TASK_START = offsetof(NRF_WDT_Type, TASKS_START), /**< Task for starting WDT. */
62 /*lint -restore*/
63 } nrf_wdt_task_t;
64
65 /**
66 * @enum nrf_wdt_event_t
67 * @brief WDT events.
68 */
69 typedef enum
70 {
71 /*lint -save -e30*/
72 NRF_WDT_EVENT_TIMEOUT = offsetof(NRF_WDT_Type, EVENTS_TIMEOUT), /**< Event from WDT time-out. */
73 /*lint -restore*/
74 } nrf_wdt_event_t;
75
76 /**
77 * @enum nrf_wdt_behaviour_t
78 * @brief WDT behavior in CPU SLEEP or HALT mode.
79 */
80 typedef enum
81 {
82 NRF_WDT_BEHAVIOUR_RUN_SLEEP = WDT_CONFIG_SLEEP_Msk, /**< WDT will run when CPU is in SLEEP mode. */
83 NRF_WDT_BEHAVIOUR_RUN_HALT = WDT_CONFIG_HALT_Msk, /**< WDT will run when CPU is in HALT mode. */
84 NRF_WDT_BEHAVIOUR_RUN_SLEEP_HALT = WDT_CONFIG_SLEEP_Msk | WDT_CONFIG_HALT_Msk, /**< WDT will run when CPU is in SLEEP or HALT mode. */
85 NRF_WDT_BEHAVIOUR_PAUSE_SLEEP_HALT = 0, /**< WDT will be paused when CPU is in SLEEP or HALT mode. */
86 } nrf_wdt_behaviour_t;
87
88 /**
89 * @enum nrf_wdt_rr_register_t
90 * @brief WDT reload request registers.
91 */
92 typedef enum
93 {
94 NRF_WDT_RR0 = 0, /**< Reload request register 0. */
95 NRF_WDT_RR1, /**< Reload request register 1. */
96 NRF_WDT_RR2, /**< Reload request register 2. */
97 NRF_WDT_RR3, /**< Reload request register 3. */
98 NRF_WDT_RR4, /**< Reload request register 4. */
99 NRF_WDT_RR5, /**< Reload request register 5. */
100 NRF_WDT_RR6, /**< Reload request register 6. */
101 NRF_WDT_RR7 /**< Reload request register 7. */
102 } nrf_wdt_rr_register_t;
103
104 /**
105 * @enum nrf_wdt_int_mask_t
106 * @brief WDT interrupts.
107 */
108 typedef enum
109 {
110 NRF_WDT_INT_TIMEOUT_MASK = WDT_INTENSET_TIMEOUT_Msk, /**< WDT interrupt from time-out event. */
111 } nrf_wdt_int_mask_t;
112
113 /**
114 * @brief Function for configuring the watchdog behavior when the CPU is sleeping or halted.
115 *
116 * @param behaviour Watchdog behavior when CPU is in SLEEP or HALT mode.
117 */
118 __STATIC_INLINE void nrf_wdt_behaviour_set(nrf_wdt_behaviour_t behaviour);
119
120 /**
121 * @brief Function for starting the WDT task.
122 *
123 * @param[in] task Task.
124 */
125 __STATIC_INLINE void nrf_wdt_task_trigger(nrf_wdt_task_t task);
126
127 /**
128 * @brief Function for clearing the WDT event.
129 *
130 * @param[in] event Event.
131 */
132 __STATIC_INLINE void nrf_wdt_event_clear(nrf_wdt_event_t event);
133
134 /**
135 * @brief Function for retrieving the state of the WDT event.
136 *
137 * @param[in] event Event.
138 *
139 * @retval true If the event is set.
140 * @retval false If the event is not set.
141 */
142 __STATIC_INLINE bool nrf_wdt_event_check(nrf_wdt_event_t event);
143
144 /**
145 * @brief Function for enabling a specific interrupt.
146 *
147 * @param[in] int_mask Interrupt.
148 */
149 __STATIC_INLINE void nrf_wdt_int_enable(uint32_t int_mask);
150
151 /**
152 * @brief Function for retrieving the state of given interrupt.
153 *
154 * @param[in] int_mask Interrupt.
155 *
156 * @retval true Interrupt is enabled.
157 * @retval false Interrupt is not enabled.
158 */
159 __STATIC_INLINE bool nrf_wdt_int_enable_check(uint32_t int_mask);
160
161 /**
162 * @brief Function for disabling a specific interrupt.
163 *
164 * @param[in] int_mask Interrupt.
165 */
166 __STATIC_INLINE void nrf_wdt_int_disable(uint32_t int_mask);
167
168 #if defined(DPPI_PRESENT) || defined(__NRFX_DOXYGEN__)
169 /**
170 * @brief Function for setting the subscribe configuration for a given
171 * WDT task.
172 *
173 * @param[in] task Task for which to set the configuration.
174 * @param[in] channel Channel through which to subscribe events.
175 */
176 __STATIC_INLINE void nrf_wdt_subscribe_set(nrf_wdt_task_t task,
177 uint8_t channel);
178
179 /**
180 * @brief Function for clearing the subscribe configuration for a given
181 * WDT task.
182 *
183 * @param[in] task Task for which to clear the configuration.
184 */
185 __STATIC_INLINE void nrf_wdt_subscribe_clear(nrf_wdt_task_t task);
186
187 /**
188 * @brief Function for setting the publish configuration for a given
189 * WDT event.
190 *
191 * @param[in] event Event for which to set the configuration.
192 * @param[in] channel Channel through which to publish the event.
193 */
194 __STATIC_INLINE void nrf_wdt_publish_set(nrf_wdt_event_t event,
195 uint8_t channel);
196
197 /**
198 * @brief Function for clearing the publish configuration for a given
199 * WDT event.
200 *
201 * @param[in] event Event for which to clear the configuration.
202 */
203 __STATIC_INLINE void nrf_wdt_publish_clear(nrf_wdt_event_t event);
204 #endif // defined(DPPI_PRESENT) || defined(__NRFX_DOXYGEN__)
205
206 /**
207 * @brief Function for returning the address of a specific WDT task register.
208 *
209 * @param[in] task Task.
210 */
211 __STATIC_INLINE uint32_t nrf_wdt_task_address_get(nrf_wdt_task_t task);
212
213 /**
214 * @brief Function for returning the address of a specific WDT event register.
215 *
216 * @param[in] event Event.
217 *
218 * @retval address of requested event register
219 */
220 __STATIC_INLINE uint32_t nrf_wdt_event_address_get(nrf_wdt_event_t event);
221
222 /**
223 * @brief Function for retrieving the watchdog status.
224 *
225 * @retval true If the watchdog is started.
226 * @retval false If the watchdog is not started.
227 */
228 __STATIC_INLINE bool nrf_wdt_started(void);
229
230 /**
231 * @brief Function for retrieving the watchdog reload request status.
232 *
233 * @param[in] rr_register Reload request register to check.
234 *
235 * @retval true If a reload request is running.
236 * @retval false If no reload request is running.
237 */
238 __STATIC_INLINE bool nrf_wdt_request_status(nrf_wdt_rr_register_t rr_register);
239
240 /**
241 * @brief Function for setting the watchdog reload value.
242 *
243 * @param[in] reload_value Watchdog counter initial value.
244 */
245 __STATIC_INLINE void nrf_wdt_reload_value_set(uint32_t reload_value);
246
247 /**
248 * @brief Function for retrieving the watchdog reload value.
249 *
250 * @retval Reload value.
251 */
252 __STATIC_INLINE uint32_t nrf_wdt_reload_value_get(void);
253
254 /**
255 * @brief Function for enabling a specific reload request register.
256 *
257 * @param[in] rr_register Reload request register to enable.
258 */
259 __STATIC_INLINE void nrf_wdt_reload_request_enable(nrf_wdt_rr_register_t rr_register);
260
261 /**
262 * @brief Function for disabling a specific reload request register.
263 *
264 * @param[in] rr_register Reload request register to disable.
265 */
266 __STATIC_INLINE void nrf_wdt_reload_request_disable(nrf_wdt_rr_register_t rr_register);
267
268 /**
269 * @brief Function for retrieving the status of a specific reload request register.
270 *
271 * @param[in] rr_register Reload request register to check.
272 *
273 * @retval true If the reload request register is enabled.
274 * @retval false If the reload request register is not enabled.
275 */
276 __STATIC_INLINE bool nrf_wdt_reload_request_is_enabled(nrf_wdt_rr_register_t rr_register);
277
278 /**
279 * @brief Function for setting a specific reload request register.
280 *
281 * @param[in] rr_register Reload request register to set.
282 */
283 __STATIC_INLINE void nrf_wdt_reload_request_set(nrf_wdt_rr_register_t rr_register);
284
285 #ifndef SUPPRESS_INLINE_IMPLEMENTATION
286
nrf_wdt_behaviour_set(nrf_wdt_behaviour_t behaviour)287 __STATIC_INLINE void nrf_wdt_behaviour_set(nrf_wdt_behaviour_t behaviour)
288 {
289 NRF_WDT->CONFIG = behaviour;
290 }
291
nrf_wdt_task_trigger(nrf_wdt_task_t task)292 __STATIC_INLINE void nrf_wdt_task_trigger(nrf_wdt_task_t task)
293 {
294 *((volatile uint32_t *)((uint8_t *)NRF_WDT + task)) = NRF_WDT_TASK_SET;
295 }
296
nrf_wdt_event_clear(nrf_wdt_event_t event)297 __STATIC_INLINE void nrf_wdt_event_clear(nrf_wdt_event_t event)
298 {
299 *((volatile uint32_t *)((uint8_t *)NRF_WDT + (uint32_t)event)) = NRF_WDT_EVENT_CLEAR;
300 #if __CORTEX_M == 0x04
301 volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)NRF_WDT + (uint32_t)event));
302 (void)dummy;
303 #endif
304 }
305
nrf_wdt_event_check(nrf_wdt_event_t event)306 __STATIC_INLINE bool nrf_wdt_event_check(nrf_wdt_event_t event)
307 {
308 return (bool)*((volatile uint32_t *)((uint8_t *)NRF_WDT + event));
309 }
310
nrf_wdt_int_enable(uint32_t int_mask)311 __STATIC_INLINE void nrf_wdt_int_enable(uint32_t int_mask)
312 {
313 NRF_WDT->INTENSET = int_mask;
314 }
315
nrf_wdt_int_enable_check(uint32_t int_mask)316 __STATIC_INLINE bool nrf_wdt_int_enable_check(uint32_t int_mask)
317 {
318 return (bool)(NRF_WDT->INTENSET & int_mask);
319 }
320
nrf_wdt_int_disable(uint32_t int_mask)321 __STATIC_INLINE void nrf_wdt_int_disable(uint32_t int_mask)
322 {
323 NRF_WDT->INTENCLR = int_mask;
324 }
325
326 #if defined(DPPI_PRESENT)
nrf_wdt_subscribe_set(nrf_wdt_task_t task,uint8_t channel)327 __STATIC_INLINE void nrf_wdt_subscribe_set(nrf_wdt_task_t task,
328 uint8_t channel)
329 {
330 *((volatile uint32_t *) ((uint8_t *) NRF_WDT + (uint32_t) task + 0x80uL)) =
331 ((uint32_t)channel | WDT_SUBSCRIBE_START_EN_Msk);
332 }
333
nrf_wdt_subscribe_clear(nrf_wdt_task_t task)334 __STATIC_INLINE void nrf_wdt_subscribe_clear(nrf_wdt_task_t task)
335 {
336 *((volatile uint32_t *) ((uint8_t *) NRF_WDT + (uint32_t) task + 0x80uL)) = 0;
337 }
338
nrf_wdt_publish_set(nrf_wdt_event_t event,uint8_t channel)339 __STATIC_INLINE void nrf_wdt_publish_set(nrf_wdt_event_t event,
340 uint8_t channel)
341 {
342 *((volatile uint32_t *) ((uint8_t *) NRF_WDT + (uint32_t) event + 0x80uL)) =
343 ((uint32_t)channel | WDT_PUBLISH_TIMEOUT_EN_Msk);
344 }
345
nrf_wdt_publish_clear(nrf_wdt_event_t event)346 __STATIC_INLINE void nrf_wdt_publish_clear(nrf_wdt_event_t event)
347 {
348 *((volatile uint32_t *) ((uint8_t *) NRF_WDT + (uint32_t) event + 0x80uL)) = 0;
349 }
350 #endif // defined(DPPI_PRESENT)
351
nrf_wdt_task_address_get(nrf_wdt_task_t task)352 __STATIC_INLINE uint32_t nrf_wdt_task_address_get(nrf_wdt_task_t task)
353 {
354 return ((uint32_t)NRF_WDT + task);
355 }
356
nrf_wdt_event_address_get(nrf_wdt_event_t event)357 __STATIC_INLINE uint32_t nrf_wdt_event_address_get(nrf_wdt_event_t event)
358 {
359 return ((uint32_t)NRF_WDT + event);
360 }
361
nrf_wdt_started(void)362 __STATIC_INLINE bool nrf_wdt_started(void)
363 {
364 return (bool)(NRF_WDT->RUNSTATUS);
365 }
366
nrf_wdt_request_status(nrf_wdt_rr_register_t rr_register)367 __STATIC_INLINE bool nrf_wdt_request_status(nrf_wdt_rr_register_t rr_register)
368 {
369 return (bool)(((NRF_WDT->REQSTATUS) >> rr_register) & 0x1UL);
370 }
371
nrf_wdt_reload_value_set(uint32_t reload_value)372 __STATIC_INLINE void nrf_wdt_reload_value_set(uint32_t reload_value)
373 {
374 NRF_WDT->CRV = reload_value;
375 }
376
nrf_wdt_reload_value_get(void)377 __STATIC_INLINE uint32_t nrf_wdt_reload_value_get(void)
378 {
379 return (uint32_t)NRF_WDT->CRV;
380 }
381
nrf_wdt_reload_request_enable(nrf_wdt_rr_register_t rr_register)382 __STATIC_INLINE void nrf_wdt_reload_request_enable(nrf_wdt_rr_register_t rr_register)
383 {
384 NRF_WDT->RREN |= 0x1UL << rr_register;
385 }
386
nrf_wdt_reload_request_disable(nrf_wdt_rr_register_t rr_register)387 __STATIC_INLINE void nrf_wdt_reload_request_disable(nrf_wdt_rr_register_t rr_register)
388 {
389 NRF_WDT->RREN &= ~(0x1UL << rr_register);
390 }
391
nrf_wdt_reload_request_is_enabled(nrf_wdt_rr_register_t rr_register)392 __STATIC_INLINE bool nrf_wdt_reload_request_is_enabled(nrf_wdt_rr_register_t rr_register)
393 {
394 return (bool)(NRF_WDT->RREN & (0x1UL << rr_register));
395 }
396
nrf_wdt_reload_request_set(nrf_wdt_rr_register_t rr_register)397 __STATIC_INLINE void nrf_wdt_reload_request_set(nrf_wdt_rr_register_t rr_register)
398 {
399 NRF_WDT->RR[rr_register] = NRF_WDT_RR_VALUE;
400 }
401
402 #endif // SUPPRESS_INLINE_IMPLEMENTATION
403
404 /** @} */
405
406 #ifdef __cplusplus
407 }
408 #endif
409
410 #endif // NRF_WDT_H__
411