1 /*
2 * Copyright (c) 2018, Nordic Semiconductor ASA
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are met:
7 *
8 * 1. Redistributions of source code must retain the above copyright notice, this
9 * list of conditions and the following disclaimer.
10 *
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * 3. Neither the name of the copyright holder nor the names of its
16 * contributors may be used to endorse or promote products derived from this
17 * software without specific prior written permission.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
23 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32 #ifndef NRF_VMC_H__
33 #define NRF_VMC_H__
34
35 #include <nrfx.h>
36
37 #ifdef __cplusplus
38 extern "C" {
39 #endif
40
41 /**
42 * @defgroup nrf_vmc_hal VMC HAL
43 * @{
44 * @ingroup nrf_vmc
45 * @brief Hardware access layer for managing the Volatile Memory Controller (VMC) peripheral.
46 */
47
48 /** @brief Power configuration bits for each section in particular RAM block. */
49 typedef enum
50 {
51 NRF_VMC_POWER_S0 = VMC_RAM_POWER_S0POWER_Msk, ///< Keep retention on RAM section S0 of the particular RAM block when RAM section is switched off.
52 NRF_VMC_POWER_S1 = VMC_RAM_POWER_S1POWER_Msk, ///< Keep retention on RAM section S1 of the particular RAM block when RAM section is switched off.
53 NRF_VMC_POWER_S2 = VMC_RAM_POWER_S2POWER_Msk, ///< Keep retention on RAM section S2 of the particular RAM block when RAM section is switched off.
54 NRF_VMC_POWER_S3 = VMC_RAM_POWER_S3POWER_Msk, ///< Keep retention on RAM section S3 of the particular RAM block when RAM section is switched off.
55 } nrf_vmc_power_t;
56
57 /** @brief Retention configuration bits for each section in particular RAM block. */
58 typedef enum
59 {
60 NRF_VMC_RETENTION_S0 = VMC_RAM_POWER_S0RETENTION_Msk, ///< Keep RAM section S0 of the particular RAM block on or off in System ON mode.
61 NRF_VMC_RETENTION_S1 = VMC_RAM_POWER_S1RETENTION_Msk, ///< Keep RAM section S1 of the particular RAM block on or off in System ON mode.
62 NRF_VMC_RETENTION_S2 = VMC_RAM_POWER_S2RETENTION_Msk, ///< Keep RAM section S2 of the particular RAM block on or off in System ON mode.
63 NRF_VMC_RETENTION_S3 = VMC_RAM_POWER_S3RETENTION_Msk, ///< Keep RAM section S3 of the particular RAM block on or off in System ON mode.
64 } nrf_vmc_retention_t;
65
66 /**
67 * @brief Function for setting power configuration for the particular RAM block.
68 *
69 * @note Overrides current configuration.
70 *
71 * @param[in] p_reg Pointer to the peripheral registers structure.
72 * @param[in] ram_block_num RAM block number.
73 * @param[in] power_mask Bitmask with sections configuration of particular RAM block.
74 * @ref nrf_vmc_power_t should be use to prepare this bitmask.
75 * @param[in] retention_mask Bitmask with sections configuration of particular RAM block.
76 * @ref nrf_vmc_retention_t should be use to prepare this bitmask.
77 */
78 __STATIC_INLINE void nrf_vmc_ram_block_config(NRF_VMC_Type * p_reg,
79 uint8_t ram_block_num,
80 uint32_t power_mask,
81 uint32_t retention_mask);
82
83 /**
84 * @brief Function for clearing power configuration for the particular RAM block.
85 *
86 * @param[in] p_reg Pointer to the peripheral registers structure.
87 * @param[in] ram_block_num RAM block number.
88 */
89 __STATIC_INLINE void nrf_vmc_ram_block_clear(NRF_VMC_Type * p_reg, uint8_t ram_block_num);
90
91 /**
92 * @brief Function for setting power configuration for the particular RAM block.
93 *
94 * @param[in] p_reg Pointer to the peripheral registers structure.
95 * @param[in] ram_block_num RAM block number.
96 * @param[in] sect_power Paricular section of the RAM block.
97 */
98 __STATIC_INLINE void nrf_vmc_ram_block_power_set(NRF_VMC_Type * p_reg,
99 uint8_t ram_block_num,
100 nrf_vmc_power_t sect_power);
101
102 /**
103 * @brief Function for clearing power configuration for the particular RAM block.
104 *
105 * @param[in] p_reg Pointer to the peripheral registers structure.
106 * @param[in] ram_block_num RAM block number.
107 * @param[in] sect_power Paricular section of the RAM block.
108 */
109 __STATIC_INLINE void nrf_vmc_ram_block_power_clear(NRF_VMC_Type * p_reg,
110 uint8_t ram_block_num,
111 nrf_vmc_power_t sect_power);
112
113 /**
114 * @brief Function for getting power configuration of the particular RAM block.
115 *
116 * @param[in] p_reg Pointer to the peripheral registers structure.
117 * @param[in] ram_block_num RAM block number.
118 *
119 * @return Bitmask with power configuration of sections of particular RAM block.
120 */
121 __STATIC_INLINE uint32_t nrf_vmc_ram_block_power_mask_get(NRF_VMC_Type const * p_reg,
122 uint8_t ram_block_num);
123
124 /**
125 * @brief Function for setting retention configuration for the particular RAM block.
126 *
127 * @param[in] p_reg Pointer to the peripheral registers structure.
128 * @param[in] ram_block_num RAM block number.
129 * @param[in] sect_retention Paricular section of the RAM block.
130 */
131 __STATIC_INLINE void nrf_vmc_ram_block_retention_set(NRF_VMC_Type * p_reg,
132 uint8_t ram_block_num,
133 nrf_vmc_retention_t sect_retention);
134
135 /**
136 * @brief Function for clearing retention configuration for the particular RAM block.
137 *
138 * @param[in] p_reg Pointer to the peripheral registers structure.
139 * @param[in] ram_block_num RAM block number.
140 * @param[in] sect_retention Paricular section of the RAM block.
141 */
142 __STATIC_INLINE void nrf_vmc_ram_block_retention_clear(NRF_VMC_Type * p_reg,
143 uint8_t ram_block_num,
144 nrf_vmc_retention_t sect_retention);
145
146 /**
147 * @brief Function for getting retention configuration of the particular RAM block.
148 *
149 * @param[in] p_reg Pointer to the peripheral registers structure.
150 * @param[in] ram_block_num RAM block number.
151 *
152 * @return Bitmask with retention configuration of sections of particular RAM block
153 */
154 __STATIC_INLINE uint32_t nrf_vmc_ram_block_retention_mask_get(NRF_VMC_Type const * p_reg,
155 uint8_t ram_block_num);
156
157 #ifndef SUPPRESS_INLINE_IMPLEMENTATION
158
nrf_vmc_ram_block_config(NRF_VMC_Type * p_reg,uint8_t ram_block_num,uint32_t power_mask,uint32_t retention_mask)159 __STATIC_INLINE void nrf_vmc_ram_block_config(NRF_VMC_Type * p_reg,
160 uint8_t ram_block_num,
161 uint32_t power_mask,
162 uint32_t retention_mask)
163 {
164 p_reg->RAM[ram_block_num].POWER =
165 (power_mask & (
166 VMC_RAM_POWER_S0POWER_Msk |
167 VMC_RAM_POWER_S1POWER_Msk |
168 VMC_RAM_POWER_S2POWER_Msk |
169 VMC_RAM_POWER_S3POWER_Msk)) |
170 (retention_mask & (
171 VMC_RAM_POWER_S0RETENTION_Msk |
172 VMC_RAM_POWER_S1RETENTION_Msk |
173 VMC_RAM_POWER_S2RETENTION_Msk |
174 VMC_RAM_POWER_S3RETENTION_Msk));
175 // Perform dummy read of the POWER register to ensure that configuration of sections was
176 // written to the VMC peripheral.
177 volatile uint32_t dummy = p_reg->RAM[ram_block_num].POWER;
178 (void)dummy;
179 }
180
nrf_vmc_ram_block_clear(NRF_VMC_Type * p_reg,uint8_t ram_block_num)181 __STATIC_INLINE void nrf_vmc_ram_block_clear(NRF_VMC_Type * p_reg, uint8_t ram_block_num)
182 {
183 p_reg->RAM[ram_block_num].POWER = 0;
184 }
185
nrf_vmc_ram_block_power_set(NRF_VMC_Type * p_reg,uint8_t ram_block_num,nrf_vmc_power_t sect_power)186 __STATIC_INLINE void nrf_vmc_ram_block_power_set(NRF_VMC_Type * p_reg,
187 uint8_t ram_block_num,
188 nrf_vmc_power_t sect_power)
189 {
190 p_reg->RAM[ram_block_num].POWERSET = (uint32_t)sect_power;
191 // Perform dummy read of the POWERSET register to ensure that configuration of sections was
192 // written to the VMC peripheral.
193 volatile uint32_t dummy = p_reg->RAM[ram_block_num].POWERSET;
194 (void)dummy;
195 }
196
nrf_vmc_ram_block_power_clear(NRF_VMC_Type * p_reg,uint8_t ram_block_num,nrf_vmc_power_t sect_power)197 __STATIC_INLINE void nrf_vmc_ram_block_power_clear(NRF_VMC_Type * p_reg,
198 uint8_t ram_block_num,
199 nrf_vmc_power_t sect_power)
200 {
201 p_reg->RAM[ram_block_num].POWERCLR = (uint32_t)sect_power;
202 }
203
nrf_vmc_ram_block_power_mask_get(NRF_VMC_Type const * p_reg,uint8_t ram_block_num)204 __STATIC_INLINE uint32_t nrf_vmc_ram_block_power_mask_get(NRF_VMC_Type const * p_reg,
205 uint8_t ram_block_num)
206 {
207 return p_reg->RAM[ram_block_num].POWER & (
208 VMC_RAM_POWER_S0POWER_Msk |
209 VMC_RAM_POWER_S1POWER_Msk |
210 VMC_RAM_POWER_S2POWER_Msk |
211 VMC_RAM_POWER_S3POWER_Msk);
212 }
213
nrf_vmc_ram_block_retention_set(NRF_VMC_Type * p_reg,uint8_t ram_block_num,nrf_vmc_retention_t sect_retention)214 __STATIC_INLINE void nrf_vmc_ram_block_retention_set(NRF_VMC_Type * p_reg,
215 uint8_t ram_block_num,
216 nrf_vmc_retention_t sect_retention)
217 {
218 p_reg->RAM[ram_block_num].POWERSET = (uint32_t)sect_retention;
219 // Perform dummy read of the POWERSET register to ensure that configuration of sections was
220 // written to the VMC peripheral.
221 volatile uint32_t dummy = p_reg->RAM[ram_block_num].POWERSET;
222 (void)dummy;
223 }
224
nrf_vmc_ram_block_retention_clear(NRF_VMC_Type * p_reg,uint8_t ram_block_num,nrf_vmc_retention_t sect_retention)225 __STATIC_INLINE void nrf_vmc_ram_block_retention_clear(NRF_VMC_Type * p_reg,
226 uint8_t ram_block_num,
227 nrf_vmc_retention_t sect_retention)
228 {
229 p_reg->RAM[ram_block_num].POWERCLR = (uint32_t)sect_retention;
230 }
231
nrf_vmc_ram_block_retention_mask_get(NRF_VMC_Type const * p_reg,uint8_t ram_block_num)232 __STATIC_INLINE uint32_t nrf_vmc_ram_block_retention_mask_get(NRF_VMC_Type const * p_reg,
233 uint8_t ram_block_num)
234 {
235 return p_reg->RAM[ram_block_num].POWER & (
236 VMC_RAM_POWER_S0RETENTION_Msk |
237 VMC_RAM_POWER_S1RETENTION_Msk |
238 VMC_RAM_POWER_S2RETENTION_Msk |
239 VMC_RAM_POWER_S3RETENTION_Msk);
240 }
241
242 #endif // SUPPRESS_INLINE_IMPLEMENTATION
243
244 /** @} */
245
246 #ifdef __cplusplus
247 }
248 #endif
249
250 #endif // NRF_VMC_H__
251