xref: /nrf52832-nimble/nordic/nrfx/hal/nrf_systick.h (revision 150812a83cab50279bd772ef6db1bfaf255f2c5b)
1*150812a8SEvalZero /*
2*150812a8SEvalZero  * Copyright (c) 2016 - 2018, Nordic Semiconductor ASA
3*150812a8SEvalZero  * All rights reserved.
4*150812a8SEvalZero  *
5*150812a8SEvalZero  * Redistribution and use in source and binary forms, with or without
6*150812a8SEvalZero  * modification, are permitted provided that the following conditions are met:
7*150812a8SEvalZero  *
8*150812a8SEvalZero  * 1. Redistributions of source code must retain the above copyright notice, this
9*150812a8SEvalZero  *    list of conditions and the following disclaimer.
10*150812a8SEvalZero  *
11*150812a8SEvalZero  * 2. Redistributions in binary form must reproduce the above copyright
12*150812a8SEvalZero  *    notice, this list of conditions and the following disclaimer in the
13*150812a8SEvalZero  *    documentation and/or other materials provided with the distribution.
14*150812a8SEvalZero  *
15*150812a8SEvalZero  * 3. Neither the name of the copyright holder nor the names of its
16*150812a8SEvalZero  *    contributors may be used to endorse or promote products derived from this
17*150812a8SEvalZero  *    software without specific prior written permission.
18*150812a8SEvalZero  *
19*150812a8SEvalZero  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20*150812a8SEvalZero  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21*150812a8SEvalZero  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22*150812a8SEvalZero  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
23*150812a8SEvalZero  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24*150812a8SEvalZero  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25*150812a8SEvalZero  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26*150812a8SEvalZero  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27*150812a8SEvalZero  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28*150812a8SEvalZero  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29*150812a8SEvalZero  * POSSIBILITY OF SUCH DAMAGE.
30*150812a8SEvalZero  */
31*150812a8SEvalZero 
32*150812a8SEvalZero #ifndef NRF_SYSTICK_H__
33*150812a8SEvalZero #define NRF_SYSTICK_H__
34*150812a8SEvalZero 
35*150812a8SEvalZero #include <nrfx.h>
36*150812a8SEvalZero 
37*150812a8SEvalZero #ifdef __cplusplus
38*150812a8SEvalZero extern "C" {
39*150812a8SEvalZero #endif
40*150812a8SEvalZero 
41*150812a8SEvalZero /**
42*150812a8SEvalZero  * @defgroup nrf_systick_hal SYSTICK HAL
43*150812a8SEvalZero  * @{
44*150812a8SEvalZero  * @ingroup nrf_systick
45*150812a8SEvalZero  * @brief   Hardware access layer for managing the SYSTICK peripheral.
46*150812a8SEvalZero  *
47*150812a8SEvalZero  * SYSTICK is ARM peripheral, not Nordic design.
48*150812a8SEvalZero  * It means that it has no Nordic-typical interface with Tasks and Events.
49*150812a8SEvalZero  *
50*150812a8SEvalZero  * Its usage is limited here to implement simple delays.
51*150812a8SEvalZero  * Also keep in mind that this timer would be stopped when CPU is sleeping
52*150812a8SEvalZero  * (WFE/WFI instruction is successfully executed).
53*150812a8SEvalZero  */
54*150812a8SEvalZero 
55*150812a8SEvalZero /**
56*150812a8SEvalZero  * @brief Mask of usable bits in the SysTick value
57*150812a8SEvalZero  */
58*150812a8SEvalZero #define NRF_SYSTICK_VAL_MASK SysTick_VAL_CURRENT_Msk
59*150812a8SEvalZero 
60*150812a8SEvalZero /**
61*150812a8SEvalZero  * @brief Flags used by SysTick configuration.
62*150812a8SEvalZero  *
63*150812a8SEvalZero  * @sa nrf_systick_csr_set
64*150812a8SEvalZero  * @sa nrf_systick_csr_get
65*150812a8SEvalZero  */
66*150812a8SEvalZero typedef enum {
67*150812a8SEvalZero     NRF_SYSTICK_CSR_COUNTFLAG_MASK  = SysTick_CTRL_COUNTFLAG_Msk,       /**< Status flag: Returns 1 if timer counted to 0 since the last read of this register. */
68*150812a8SEvalZero 
69*150812a8SEvalZero     NRF_SYSTICK_CSR_CLKSOURCE_MASK  = SysTick_CTRL_CLKSOURCE_Msk,       /**< Configuration bit: Select the SysTick clock source. */
70*150812a8SEvalZero     NRF_SYSTICK_CSR_CLKSOURCE_REF   = 0U << SysTick_CTRL_CLKSOURCE_Pos, /**< Configuration value: Select reference clock. */
71*150812a8SEvalZero     NRF_SYSTICK_CSR_CLKSOURCE_CPU   = 1U << SysTick_CTRL_CLKSOURCE_Pos, /**< Configuration value: Select CPU clock. */
72*150812a8SEvalZero 
73*150812a8SEvalZero     NRF_SYSTICK_CSR_TICKINT_MASK    = SysTick_CTRL_TICKINT_Msk,         /**< Configuration bit: Enables SysTick exception request. */
74*150812a8SEvalZero     NRF_SYSTICK_CSR_TICKINT_ENABLE  = 1U << SysTick_CTRL_TICKINT_Pos,   /**< Configuration value: Counting down to zero does not assert the SysTick exception request. */
75*150812a8SEvalZero     NRF_SYSTICK_CSR_TICKINT_DISABLE = 0U << SysTick_CTRL_TICKINT_Pos,   /**< Configuration value: Counting down to zero to asserts the SysTick exception request. */
76*150812a8SEvalZero 
77*150812a8SEvalZero     NRF_SYSTICK_CSR_ENABLE_MASK     = SysTick_CTRL_ENABLE_Msk,          /**< Configuration bit: Enable the SysTick timer. */
78*150812a8SEvalZero     NRF_SYSTICK_CSR_ENABLE          = 1U << SysTick_CTRL_ENABLE_Pos,    /**< Configuration value: Counter enabled. */
79*150812a8SEvalZero     NRF_SYSTICK_CSR_DISABLE         = 0U << SysTick_CTRL_ENABLE_Pos     /**< Configuration value: Counter disabled. */
80*150812a8SEvalZero } nrf_systick_csr_flags_t;
81*150812a8SEvalZero 
82*150812a8SEvalZero /**
83*150812a8SEvalZero  * @brief Get Configuration and Status Register
84*150812a8SEvalZero  *
85*150812a8SEvalZero  * @return Values composed by @ref nrf_systick_csr_flags_t.
86*150812a8SEvalZero  * @note The @ref NRF_SYSTICK_CSR_COUNTFLAG_MASK value is cleared when CSR register is read.
87*150812a8SEvalZero  */
88*150812a8SEvalZero __STATIC_INLINE uint32_t nrf_systick_csr_get(void);
89*150812a8SEvalZero 
90*150812a8SEvalZero /**
91*150812a8SEvalZero  * @brief Set Configuration and Status Register
92*150812a8SEvalZero  *
93*150812a8SEvalZero  * @param[in] val The value composed from @ref nrf_systick_csr_flags_t.
94*150812a8SEvalZero  */
95*150812a8SEvalZero __STATIC_INLINE void nrf_systick_csr_set(uint32_t val);
96*150812a8SEvalZero 
97*150812a8SEvalZero /**
98*150812a8SEvalZero  * @brief Get the current reload value.
99*150812a8SEvalZero  *
100*150812a8SEvalZero  * @return The reload register value.
101*150812a8SEvalZero  */
102*150812a8SEvalZero __STATIC_INLINE uint32_t nrf_systick_load_get(void);
103*150812a8SEvalZero 
104*150812a8SEvalZero /**
105*150812a8SEvalZero  * @brief Configure the reload value.
106*150812a8SEvalZero  *
107*150812a8SEvalZero  * @param[in] val The value to set in the reload register.
108*150812a8SEvalZero  */
109*150812a8SEvalZero __STATIC_INLINE void nrf_systick_load_set(uint32_t val);
110*150812a8SEvalZero 
111*150812a8SEvalZero /**
112*150812a8SEvalZero  * @brief Read the SysTick current value
113*150812a8SEvalZero  *
114*150812a8SEvalZero  * @return The current SysTick value
115*150812a8SEvalZero  * @sa NRF_SYSTICK_VAL_MASK
116*150812a8SEvalZero  */
117*150812a8SEvalZero __STATIC_INLINE uint32_t nrf_systick_val_get(void);
118*150812a8SEvalZero 
119*150812a8SEvalZero /**
120*150812a8SEvalZero  * @brief Clear the SysTick current value
121*150812a8SEvalZero  *
122*150812a8SEvalZero  * @note The SysTick does not allow setting current value.
123*150812a8SEvalZero  *       Any write to VAL register would clear the timer.
124*150812a8SEvalZero  */
125*150812a8SEvalZero __STATIC_INLINE void nrf_systick_val_clear(void);
126*150812a8SEvalZero 
127*150812a8SEvalZero /**
128*150812a8SEvalZero  * @brief Read the calibration register
129*150812a8SEvalZero  *
130*150812a8SEvalZero  * @return The calibration register value
131*150812a8SEvalZero  */
132*150812a8SEvalZero __STATIC_INLINE uint32_t nrf_systick_calib_get(void);
133*150812a8SEvalZero 
134*150812a8SEvalZero 
135*150812a8SEvalZero 
136*150812a8SEvalZero #ifndef SUPPRESS_INLINE_IMPLEMENTATION
137*150812a8SEvalZero 
nrf_systick_csr_get(void)138*150812a8SEvalZero __STATIC_INLINE uint32_t nrf_systick_csr_get(void)
139*150812a8SEvalZero {
140*150812a8SEvalZero     return SysTick->CTRL;
141*150812a8SEvalZero }
142*150812a8SEvalZero 
nrf_systick_csr_set(uint32_t val)143*150812a8SEvalZero __STATIC_INLINE void nrf_systick_csr_set(uint32_t val)
144*150812a8SEvalZero {
145*150812a8SEvalZero     SysTick->CTRL = val;
146*150812a8SEvalZero }
147*150812a8SEvalZero 
nrf_systick_load_get(void)148*150812a8SEvalZero __STATIC_INLINE uint32_t nrf_systick_load_get(void)
149*150812a8SEvalZero {
150*150812a8SEvalZero     return SysTick->LOAD;
151*150812a8SEvalZero }
152*150812a8SEvalZero 
nrf_systick_load_set(uint32_t val)153*150812a8SEvalZero __STATIC_INLINE void nrf_systick_load_set(uint32_t val)
154*150812a8SEvalZero {
155*150812a8SEvalZero     SysTick->LOAD = val;
156*150812a8SEvalZero }
157*150812a8SEvalZero 
nrf_systick_val_get(void)158*150812a8SEvalZero __STATIC_INLINE uint32_t nrf_systick_val_get(void)
159*150812a8SEvalZero {
160*150812a8SEvalZero     return SysTick->VAL;
161*150812a8SEvalZero }
162*150812a8SEvalZero 
nrf_systick_val_clear(void)163*150812a8SEvalZero __STATIC_INLINE void nrf_systick_val_clear(void)
164*150812a8SEvalZero {
165*150812a8SEvalZero     SysTick->VAL = 0;
166*150812a8SEvalZero }
167*150812a8SEvalZero 
nrf_systick_calib_get(void)168*150812a8SEvalZero __STATIC_INLINE uint32_t nrf_systick_calib_get(void)
169*150812a8SEvalZero {
170*150812a8SEvalZero     return SysTick->CALIB;
171*150812a8SEvalZero }
172*150812a8SEvalZero 
173*150812a8SEvalZero #endif /* SUPPRESS_INLINE_IMPLEMENTATION */
174*150812a8SEvalZero 
175*150812a8SEvalZero /** @} */
176*150812a8SEvalZero 
177*150812a8SEvalZero #ifdef __cplusplus
178*150812a8SEvalZero }
179*150812a8SEvalZero #endif
180*150812a8SEvalZero 
181*150812a8SEvalZero #endif /* NRF_SYSTICK_H__ */
182