1*150812a8SEvalZero /*
2*150812a8SEvalZero * Copyright (c) 2014 - 2018, Nordic Semiconductor ASA
3*150812a8SEvalZero * All rights reserved.
4*150812a8SEvalZero *
5*150812a8SEvalZero * Redistribution and use in source and binary forms, with or without
6*150812a8SEvalZero * modification, are permitted provided that the following conditions are met:
7*150812a8SEvalZero *
8*150812a8SEvalZero * 1. Redistributions of source code must retain the above copyright notice, this
9*150812a8SEvalZero * list of conditions and the following disclaimer.
10*150812a8SEvalZero *
11*150812a8SEvalZero * 2. Redistributions in binary form must reproduce the above copyright
12*150812a8SEvalZero * notice, this list of conditions and the following disclaimer in the
13*150812a8SEvalZero * documentation and/or other materials provided with the distribution.
14*150812a8SEvalZero *
15*150812a8SEvalZero * 3. Neither the name of the copyright holder nor the names of its
16*150812a8SEvalZero * contributors may be used to endorse or promote products derived from this
17*150812a8SEvalZero * software without specific prior written permission.
18*150812a8SEvalZero *
19*150812a8SEvalZero * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20*150812a8SEvalZero * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21*150812a8SEvalZero * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22*150812a8SEvalZero * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
23*150812a8SEvalZero * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24*150812a8SEvalZero * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25*150812a8SEvalZero * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26*150812a8SEvalZero * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27*150812a8SEvalZero * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28*150812a8SEvalZero * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29*150812a8SEvalZero * POSSIBILITY OF SUCH DAMAGE.
30*150812a8SEvalZero */
31*150812a8SEvalZero
32*150812a8SEvalZero #ifndef NRF_RTC_H
33*150812a8SEvalZero #define NRF_RTC_H
34*150812a8SEvalZero
35*150812a8SEvalZero #include <nrfx.h>
36*150812a8SEvalZero
37*150812a8SEvalZero #ifdef __cplusplus
38*150812a8SEvalZero extern "C" {
39*150812a8SEvalZero #endif
40*150812a8SEvalZero
41*150812a8SEvalZero /**
42*150812a8SEvalZero * @defgroup nrf_rtc_hal RTC HAL
43*150812a8SEvalZero * @{
44*150812a8SEvalZero * @ingroup nrf_rtc
45*150812a8SEvalZero * @brief Hardware access layer for managing the Real Time Counter (RTC) peripheral.
46*150812a8SEvalZero */
47*150812a8SEvalZero
48*150812a8SEvalZero /** @brief Macro for getting the number of compare channels available in a given RTC instance. */
49*150812a8SEvalZero #define NRF_RTC_CC_CHANNEL_COUNT(id) NRFX_CONCAT_3(RTC, id, _CC_NUM)
50*150812a8SEvalZero
51*150812a8SEvalZero #define RTC_INPUT_FREQ 32768 /**< Input frequency of the RTC instance. */
52*150812a8SEvalZero
53*150812a8SEvalZero /** @brief Macro for converting expected frequency to prescaler setting. */
54*150812a8SEvalZero #define RTC_FREQ_TO_PRESCALER(FREQ) (uint16_t)(((RTC_INPUT_FREQ) / (FREQ)) - 1)
55*150812a8SEvalZero
56*150812a8SEvalZero /**< Macro for wrapping values to RTC capacity. */
57*150812a8SEvalZero #define RTC_WRAP(val) ((val) & RTC_COUNTER_COUNTER_Msk)
58*150812a8SEvalZero
59*150812a8SEvalZero #define RTC_CHANNEL_INT_MASK(ch) \
60*150812a8SEvalZero ((uint32_t)(NRF_RTC_INT_COMPARE0_MASK) << (ch))
61*150812a8SEvalZero
62*150812a8SEvalZero #define RTC_CHANNEL_EVENT_ADDR(ch) \
63*150812a8SEvalZero (nrf_rtc_event_t)((NRF_RTC_EVENT_COMPARE_0) + (ch) * sizeof(uint32_t))
64*150812a8SEvalZero
65*150812a8SEvalZero /** @brief RTC tasks. */
66*150812a8SEvalZero typedef enum
67*150812a8SEvalZero {
68*150812a8SEvalZero /*lint -save -e30*/
69*150812a8SEvalZero NRF_RTC_TASK_START = offsetof(NRF_RTC_Type,TASKS_START), /**< Start. */
70*150812a8SEvalZero NRF_RTC_TASK_STOP = offsetof(NRF_RTC_Type,TASKS_STOP), /**< Stop. */
71*150812a8SEvalZero NRF_RTC_TASK_CLEAR = offsetof(NRF_RTC_Type,TASKS_CLEAR), /**< Clear. */
72*150812a8SEvalZero NRF_RTC_TASK_TRIGGER_OVERFLOW = offsetof(NRF_RTC_Type,TASKS_TRIGOVRFLW),/**< Trigger overflow. */
73*150812a8SEvalZero /*lint -restore*/
74*150812a8SEvalZero } nrf_rtc_task_t;
75*150812a8SEvalZero
76*150812a8SEvalZero /** @brief RTC events. */
77*150812a8SEvalZero typedef enum
78*150812a8SEvalZero {
79*150812a8SEvalZero /*lint -save -e30*/
80*150812a8SEvalZero NRF_RTC_EVENT_TICK = offsetof(NRF_RTC_Type,EVENTS_TICK), /**< Tick event. */
81*150812a8SEvalZero NRF_RTC_EVENT_OVERFLOW = offsetof(NRF_RTC_Type,EVENTS_OVRFLW), /**< Overflow event. */
82*150812a8SEvalZero NRF_RTC_EVENT_COMPARE_0 = offsetof(NRF_RTC_Type,EVENTS_COMPARE[0]), /**< Compare 0 event. */
83*150812a8SEvalZero NRF_RTC_EVENT_COMPARE_1 = offsetof(NRF_RTC_Type,EVENTS_COMPARE[1]), /**< Compare 1 event. */
84*150812a8SEvalZero NRF_RTC_EVENT_COMPARE_2 = offsetof(NRF_RTC_Type,EVENTS_COMPARE[2]), /**< Compare 2 event. */
85*150812a8SEvalZero NRF_RTC_EVENT_COMPARE_3 = offsetof(NRF_RTC_Type,EVENTS_COMPARE[3]) /**< Compare 3 event. */
86*150812a8SEvalZero /*lint -restore*/
87*150812a8SEvalZero } nrf_rtc_event_t;
88*150812a8SEvalZero
89*150812a8SEvalZero /** @brief RTC interrupts. */
90*150812a8SEvalZero typedef enum
91*150812a8SEvalZero {
92*150812a8SEvalZero NRF_RTC_INT_TICK_MASK = RTC_INTENSET_TICK_Msk, /**< RTC interrupt from tick event. */
93*150812a8SEvalZero NRF_RTC_INT_OVERFLOW_MASK = RTC_INTENSET_OVRFLW_Msk, /**< RTC interrupt from overflow event. */
94*150812a8SEvalZero NRF_RTC_INT_COMPARE0_MASK = RTC_INTENSET_COMPARE0_Msk, /**< RTC interrupt from compare event on channel 0. */
95*150812a8SEvalZero NRF_RTC_INT_COMPARE1_MASK = RTC_INTENSET_COMPARE1_Msk, /**< RTC interrupt from compare event on channel 1. */
96*150812a8SEvalZero NRF_RTC_INT_COMPARE2_MASK = RTC_INTENSET_COMPARE2_Msk, /**< RTC interrupt from compare event on channel 2. */
97*150812a8SEvalZero NRF_RTC_INT_COMPARE3_MASK = RTC_INTENSET_COMPARE3_Msk /**< RTC interrupt from compare event on channel 3. */
98*150812a8SEvalZero } nrf_rtc_int_t;
99*150812a8SEvalZero
100*150812a8SEvalZero /**
101*150812a8SEvalZero * @brief Function for setting a compare value for a channel.
102*150812a8SEvalZero *
103*150812a8SEvalZero * @param[in] p_reg Pointer to the structure of registers of the peripheral.
104*150812a8SEvalZero * @param[in] ch Channel.
105*150812a8SEvalZero * @param[in] cc_val Compare value to set.
106*150812a8SEvalZero */
107*150812a8SEvalZero __STATIC_INLINE void nrf_rtc_cc_set(NRF_RTC_Type * p_reg, uint32_t ch, uint32_t cc_val);
108*150812a8SEvalZero
109*150812a8SEvalZero /**
110*150812a8SEvalZero * @brief Function for returning the compare value for a channel.
111*150812a8SEvalZero *
112*150812a8SEvalZero * @param[in] p_reg Pointer to the structure of registers of the peripheral.
113*150812a8SEvalZero * @param[in] ch Channel.
114*150812a8SEvalZero *
115*150812a8SEvalZero * @return COMPARE[ch] value.
116*150812a8SEvalZero */
117*150812a8SEvalZero __STATIC_INLINE uint32_t nrf_rtc_cc_get(NRF_RTC_Type * p_reg, uint32_t ch);
118*150812a8SEvalZero
119*150812a8SEvalZero /**
120*150812a8SEvalZero * @brief Function for enabling interrupts.
121*150812a8SEvalZero *
122*150812a8SEvalZero * @param[in] p_reg Pointer to the structure of registers of the peripheral.
123*150812a8SEvalZero * @param[in] mask Interrupt mask to be enabled.
124*150812a8SEvalZero */
125*150812a8SEvalZero __STATIC_INLINE void nrf_rtc_int_enable(NRF_RTC_Type * p_reg, uint32_t mask);
126*150812a8SEvalZero
127*150812a8SEvalZero /**
128*150812a8SEvalZero * @brief Function for disabling interrupts.
129*150812a8SEvalZero *
130*150812a8SEvalZero * @param[in] p_reg Pointer to the structure of registers of the peripheral.
131*150812a8SEvalZero * @param[in] mask Interrupt mask to be disabled.
132*150812a8SEvalZero */
133*150812a8SEvalZero __STATIC_INLINE void nrf_rtc_int_disable(NRF_RTC_Type * p_reg, uint32_t mask);
134*150812a8SEvalZero
135*150812a8SEvalZero /**
136*150812a8SEvalZero * @brief Function for checking if interrupts are enabled.
137*150812a8SEvalZero *
138*150812a8SEvalZero * @param[in] p_reg Pointer to the structure of registers of the peripheral.
139*150812a8SEvalZero * @param[in] mask Mask of interrupt flags to check.
140*150812a8SEvalZero *
141*150812a8SEvalZero * @return Mask with enabled interrupts.
142*150812a8SEvalZero */
143*150812a8SEvalZero __STATIC_INLINE uint32_t nrf_rtc_int_is_enabled(NRF_RTC_Type * p_reg, uint32_t mask);
144*150812a8SEvalZero
145*150812a8SEvalZero /**
146*150812a8SEvalZero * @brief Function for returning the status of currently enabled interrupts.
147*150812a8SEvalZero *
148*150812a8SEvalZero * @param[in] p_reg Pointer to the structure of registers of the peripheral.
149*150812a8SEvalZero *
150*150812a8SEvalZero * @return Value in INTEN register.
151*150812a8SEvalZero */
152*150812a8SEvalZero __STATIC_INLINE uint32_t nrf_rtc_int_get(NRF_RTC_Type * p_reg);
153*150812a8SEvalZero
154*150812a8SEvalZero #if defined(DPPI_PRESENT) || defined(__NRFX_DOXYGEN__)
155*150812a8SEvalZero /**
156*150812a8SEvalZero * @brief Function for setting the subscribe configuration for a given
157*150812a8SEvalZero * RTC task.
158*150812a8SEvalZero *
159*150812a8SEvalZero * @param[in] p_reg Pointer to the structure of registers of the peripheral.
160*150812a8SEvalZero * @param[in] task Task for which to set the configuration.
161*150812a8SEvalZero * @param[in] channel Channel through which to subscribe events.
162*150812a8SEvalZero */
163*150812a8SEvalZero __STATIC_INLINE void nrf_rtc_subscribe_set(NRF_RTC_Type * p_reg,
164*150812a8SEvalZero nrf_rtc_task_t task,
165*150812a8SEvalZero uint8_t channel);
166*150812a8SEvalZero
167*150812a8SEvalZero /**
168*150812a8SEvalZero * @brief Function for clearing the subscribe configuration for a given
169*150812a8SEvalZero * RTC task.
170*150812a8SEvalZero *
171*150812a8SEvalZero * @param[in] p_reg Pointer to the structure of registers of the peripheral.
172*150812a8SEvalZero * @param[in] task Task for which to clear the configuration.
173*150812a8SEvalZero */
174*150812a8SEvalZero __STATIC_INLINE void nrf_rtc_subscribe_clear(NRF_RTC_Type * p_reg,
175*150812a8SEvalZero nrf_rtc_task_t task);
176*150812a8SEvalZero
177*150812a8SEvalZero /**
178*150812a8SEvalZero * @brief Function for setting the publish configuration for a given
179*150812a8SEvalZero * RTC event.
180*150812a8SEvalZero *
181*150812a8SEvalZero * @param[in] p_reg Pointer to the structure of registers of the peripheral.
182*150812a8SEvalZero * @param[in] event Event for which to set the configuration.
183*150812a8SEvalZero * @param[in] channel Channel through which to publish the event.
184*150812a8SEvalZero */
185*150812a8SEvalZero __STATIC_INLINE void nrf_rtc_publish_set(NRF_RTC_Type * p_reg,
186*150812a8SEvalZero nrf_rtc_event_t event,
187*150812a8SEvalZero uint8_t channel);
188*150812a8SEvalZero
189*150812a8SEvalZero /**
190*150812a8SEvalZero * @brief Function for clearing the publish configuration for a given
191*150812a8SEvalZero * RTC event.
192*150812a8SEvalZero *
193*150812a8SEvalZero * @param[in] p_reg Pointer to the structure of registers of the peripheral.
194*150812a8SEvalZero * @param[in] event Event for which to clear the configuration.
195*150812a8SEvalZero */
196*150812a8SEvalZero __STATIC_INLINE void nrf_rtc_publish_clear(NRF_RTC_Type * p_reg,
197*150812a8SEvalZero nrf_rtc_event_t event);
198*150812a8SEvalZero #endif // defined(DPPI_PRESENT) || defined(__NRFX_DOXYGEN__)
199*150812a8SEvalZero
200*150812a8SEvalZero /**
201*150812a8SEvalZero * @brief Function for checking if an event is pending.
202*150812a8SEvalZero *
203*150812a8SEvalZero * @param[in] p_reg Pointer to the structure of registers of the peripheral.
204*150812a8SEvalZero * @param[in] event Address of the event.
205*150812a8SEvalZero *
206*150812a8SEvalZero * @return Mask of pending events.
207*150812a8SEvalZero */
208*150812a8SEvalZero __STATIC_INLINE uint32_t nrf_rtc_event_pending(NRF_RTC_Type * p_reg, nrf_rtc_event_t event);
209*150812a8SEvalZero
210*150812a8SEvalZero /**
211*150812a8SEvalZero * @brief Function for clearing an event.
212*150812a8SEvalZero *
213*150812a8SEvalZero * @param[in] p_reg Pointer to the structure of registers of the peripheral.
214*150812a8SEvalZero * @param[in] event Event to clear.
215*150812a8SEvalZero */
216*150812a8SEvalZero __STATIC_INLINE void nrf_rtc_event_clear(NRF_RTC_Type * p_reg, nrf_rtc_event_t event);
217*150812a8SEvalZero
218*150812a8SEvalZero /**
219*150812a8SEvalZero * @brief Function for returning a counter value.
220*150812a8SEvalZero *
221*150812a8SEvalZero * @param[in] p_reg Pointer to the structure of registers of the peripheral.
222*150812a8SEvalZero *
223*150812a8SEvalZero * @return Counter value.
224*150812a8SEvalZero */
225*150812a8SEvalZero __STATIC_INLINE uint32_t nrf_rtc_counter_get(NRF_RTC_Type * p_reg);
226*150812a8SEvalZero
227*150812a8SEvalZero /**
228*150812a8SEvalZero * @brief Function for setting a prescaler value.
229*150812a8SEvalZero *
230*150812a8SEvalZero * @param[in] p_reg Pointer to the structure of registers of the peripheral.
231*150812a8SEvalZero * @param[in] val Value to set the prescaler to.
232*150812a8SEvalZero */
233*150812a8SEvalZero __STATIC_INLINE void nrf_rtc_prescaler_set(NRF_RTC_Type * p_reg, uint32_t val);
234*150812a8SEvalZero
235*150812a8SEvalZero /**
236*150812a8SEvalZero * @brief Function for returning the address of an event.
237*150812a8SEvalZero *
238*150812a8SEvalZero * @param[in] p_reg Pointer to the structure of registers of the peripheral.
239*150812a8SEvalZero * @param[in] event Requested event.
240*150812a8SEvalZero *
241*150812a8SEvalZero * @return Address of the requested event register.
242*150812a8SEvalZero */
243*150812a8SEvalZero __STATIC_INLINE uint32_t nrf_rtc_event_address_get(NRF_RTC_Type * p_reg, nrf_rtc_event_t event);
244*150812a8SEvalZero
245*150812a8SEvalZero /**
246*150812a8SEvalZero * @brief Function for returning the address of a task.
247*150812a8SEvalZero *
248*150812a8SEvalZero * @param[in] p_reg Pointer to the structure of registers of the peripheral.
249*150812a8SEvalZero * @param[in] task Requested task.
250*150812a8SEvalZero *
251*150812a8SEvalZero * @return Address of the requested task register.
252*150812a8SEvalZero */
253*150812a8SEvalZero __STATIC_INLINE uint32_t nrf_rtc_task_address_get(NRF_RTC_Type * p_reg, nrf_rtc_task_t task);
254*150812a8SEvalZero
255*150812a8SEvalZero /**
256*150812a8SEvalZero * @brief Function for starting a task.
257*150812a8SEvalZero *
258*150812a8SEvalZero * @param[in] p_reg Pointer to the structure of registers of the peripheral.
259*150812a8SEvalZero * @param[in] task Requested task.
260*150812a8SEvalZero */
261*150812a8SEvalZero __STATIC_INLINE void nrf_rtc_task_trigger(NRF_RTC_Type * p_reg, nrf_rtc_task_t task);
262*150812a8SEvalZero
263*150812a8SEvalZero /**
264*150812a8SEvalZero * @brief Function for enabling events.
265*150812a8SEvalZero *
266*150812a8SEvalZero * @param[in] p_reg Pointer to the structure of registers of the peripheral.
267*150812a8SEvalZero * @param[in] mask Mask of event flags to enable.
268*150812a8SEvalZero */
269*150812a8SEvalZero __STATIC_INLINE void nrf_rtc_event_enable(NRF_RTC_Type * p_reg, uint32_t mask);
270*150812a8SEvalZero
271*150812a8SEvalZero /**
272*150812a8SEvalZero * @brief Function for disabling an event.
273*150812a8SEvalZero *
274*150812a8SEvalZero * @param[in] p_reg Pointer to the structure of registers of the peripheral.
275*150812a8SEvalZero * @param[in] event Requested event.
276*150812a8SEvalZero */
277*150812a8SEvalZero __STATIC_INLINE void nrf_rtc_event_disable(NRF_RTC_Type * p_reg, uint32_t event);
278*150812a8SEvalZero
279*150812a8SEvalZero
280*150812a8SEvalZero #ifndef SUPPRESS_INLINE_IMPLEMENTATION
281*150812a8SEvalZero
nrf_rtc_cc_set(NRF_RTC_Type * p_reg,uint32_t ch,uint32_t cc_val)282*150812a8SEvalZero __STATIC_INLINE void nrf_rtc_cc_set(NRF_RTC_Type * p_reg, uint32_t ch, uint32_t cc_val)
283*150812a8SEvalZero {
284*150812a8SEvalZero p_reg->CC[ch] = cc_val;
285*150812a8SEvalZero }
286*150812a8SEvalZero
nrf_rtc_cc_get(NRF_RTC_Type * p_reg,uint32_t ch)287*150812a8SEvalZero __STATIC_INLINE uint32_t nrf_rtc_cc_get(NRF_RTC_Type * p_reg, uint32_t ch)
288*150812a8SEvalZero {
289*150812a8SEvalZero return p_reg->CC[ch];
290*150812a8SEvalZero }
291*150812a8SEvalZero
nrf_rtc_int_enable(NRF_RTC_Type * p_reg,uint32_t mask)292*150812a8SEvalZero __STATIC_INLINE void nrf_rtc_int_enable(NRF_RTC_Type * p_reg, uint32_t mask)
293*150812a8SEvalZero {
294*150812a8SEvalZero p_reg->INTENSET = mask;
295*150812a8SEvalZero }
296*150812a8SEvalZero
nrf_rtc_int_disable(NRF_RTC_Type * p_reg,uint32_t mask)297*150812a8SEvalZero __STATIC_INLINE void nrf_rtc_int_disable(NRF_RTC_Type * p_reg, uint32_t mask)
298*150812a8SEvalZero {
299*150812a8SEvalZero p_reg->INTENCLR = mask;
300*150812a8SEvalZero }
301*150812a8SEvalZero
nrf_rtc_int_is_enabled(NRF_RTC_Type * p_reg,uint32_t mask)302*150812a8SEvalZero __STATIC_INLINE uint32_t nrf_rtc_int_is_enabled(NRF_RTC_Type * p_reg, uint32_t mask)
303*150812a8SEvalZero {
304*150812a8SEvalZero return (p_reg->INTENSET & mask);
305*150812a8SEvalZero }
306*150812a8SEvalZero
nrf_rtc_int_get(NRF_RTC_Type * p_reg)307*150812a8SEvalZero __STATIC_INLINE uint32_t nrf_rtc_int_get(NRF_RTC_Type * p_reg)
308*150812a8SEvalZero {
309*150812a8SEvalZero return p_reg->INTENSET;
310*150812a8SEvalZero }
311*150812a8SEvalZero
312*150812a8SEvalZero #if defined(DPPI_PRESENT)
nrf_rtc_subscribe_set(NRF_RTC_Type * p_reg,nrf_rtc_task_t task,uint8_t channel)313*150812a8SEvalZero __STATIC_INLINE void nrf_rtc_subscribe_set(NRF_RTC_Type * p_reg,
314*150812a8SEvalZero nrf_rtc_task_t task,
315*150812a8SEvalZero uint8_t channel)
316*150812a8SEvalZero {
317*150812a8SEvalZero *((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) task + 0x80uL)) =
318*150812a8SEvalZero ((uint32_t)channel | RTC_SUBSCRIBE_START_EN_Msk);
319*150812a8SEvalZero }
320*150812a8SEvalZero
nrf_rtc_subscribe_clear(NRF_RTC_Type * p_reg,nrf_rtc_task_t task)321*150812a8SEvalZero __STATIC_INLINE void nrf_rtc_subscribe_clear(NRF_RTC_Type * p_reg,
322*150812a8SEvalZero nrf_rtc_task_t task)
323*150812a8SEvalZero {
324*150812a8SEvalZero *((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) task + 0x80uL)) = 0;
325*150812a8SEvalZero }
326*150812a8SEvalZero
nrf_rtc_publish_set(NRF_RTC_Type * p_reg,nrf_rtc_event_t event,uint8_t channel)327*150812a8SEvalZero __STATIC_INLINE void nrf_rtc_publish_set(NRF_RTC_Type * p_reg,
328*150812a8SEvalZero nrf_rtc_event_t event,
329*150812a8SEvalZero uint8_t channel)
330*150812a8SEvalZero {
331*150812a8SEvalZero *((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) event + 0x80uL)) =
332*150812a8SEvalZero ((uint32_t)channel | RTC_PUBLISH_TICK_EN_Msk);
333*150812a8SEvalZero }
334*150812a8SEvalZero
nrf_rtc_publish_clear(NRF_RTC_Type * p_reg,nrf_rtc_event_t event)335*150812a8SEvalZero __STATIC_INLINE void nrf_rtc_publish_clear(NRF_RTC_Type * p_reg,
336*150812a8SEvalZero nrf_rtc_event_t event)
337*150812a8SEvalZero {
338*150812a8SEvalZero *((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) event + 0x80uL)) = 0;
339*150812a8SEvalZero }
340*150812a8SEvalZero #endif // defined(DPPI_PRESENT)
341*150812a8SEvalZero
nrf_rtc_event_pending(NRF_RTC_Type * p_reg,nrf_rtc_event_t event)342*150812a8SEvalZero __STATIC_INLINE uint32_t nrf_rtc_event_pending(NRF_RTC_Type * p_reg, nrf_rtc_event_t event)
343*150812a8SEvalZero {
344*150812a8SEvalZero return *(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event);
345*150812a8SEvalZero }
346*150812a8SEvalZero
nrf_rtc_event_clear(NRF_RTC_Type * p_reg,nrf_rtc_event_t event)347*150812a8SEvalZero __STATIC_INLINE void nrf_rtc_event_clear(NRF_RTC_Type * p_reg, nrf_rtc_event_t event)
348*150812a8SEvalZero {
349*150812a8SEvalZero *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0;
350*150812a8SEvalZero #if __CORTEX_M == 0x04
351*150812a8SEvalZero volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event));
352*150812a8SEvalZero (void)dummy;
353*150812a8SEvalZero #endif
354*150812a8SEvalZero }
355*150812a8SEvalZero
nrf_rtc_counter_get(NRF_RTC_Type * p_reg)356*150812a8SEvalZero __STATIC_INLINE uint32_t nrf_rtc_counter_get(NRF_RTC_Type * p_reg)
357*150812a8SEvalZero {
358*150812a8SEvalZero return p_reg->COUNTER;
359*150812a8SEvalZero }
360*150812a8SEvalZero
nrf_rtc_prescaler_set(NRF_RTC_Type * p_reg,uint32_t val)361*150812a8SEvalZero __STATIC_INLINE void nrf_rtc_prescaler_set(NRF_RTC_Type * p_reg, uint32_t val)
362*150812a8SEvalZero {
363*150812a8SEvalZero NRFX_ASSERT(val <= (RTC_PRESCALER_PRESCALER_Msk >> RTC_PRESCALER_PRESCALER_Pos));
364*150812a8SEvalZero p_reg->PRESCALER = val;
365*150812a8SEvalZero }
rtc_prescaler_get(NRF_RTC_Type * p_reg)366*150812a8SEvalZero __STATIC_INLINE uint32_t rtc_prescaler_get(NRF_RTC_Type * p_reg)
367*150812a8SEvalZero {
368*150812a8SEvalZero return p_reg->PRESCALER;
369*150812a8SEvalZero }
370*150812a8SEvalZero
nrf_rtc_event_address_get(NRF_RTC_Type * p_reg,nrf_rtc_event_t event)371*150812a8SEvalZero __STATIC_INLINE uint32_t nrf_rtc_event_address_get(NRF_RTC_Type * p_reg, nrf_rtc_event_t event)
372*150812a8SEvalZero {
373*150812a8SEvalZero return (uint32_t)p_reg + event;
374*150812a8SEvalZero }
375*150812a8SEvalZero
nrf_rtc_task_address_get(NRF_RTC_Type * p_reg,nrf_rtc_task_t task)376*150812a8SEvalZero __STATIC_INLINE uint32_t nrf_rtc_task_address_get(NRF_RTC_Type * p_reg, nrf_rtc_task_t task)
377*150812a8SEvalZero {
378*150812a8SEvalZero return (uint32_t)p_reg + task;
379*150812a8SEvalZero }
380*150812a8SEvalZero
nrf_rtc_task_trigger(NRF_RTC_Type * p_reg,nrf_rtc_task_t task)381*150812a8SEvalZero __STATIC_INLINE void nrf_rtc_task_trigger(NRF_RTC_Type * p_reg, nrf_rtc_task_t task)
382*150812a8SEvalZero {
383*150812a8SEvalZero *(__IO uint32_t *)((uint32_t)p_reg + task) = 1;
384*150812a8SEvalZero }
385*150812a8SEvalZero
nrf_rtc_event_enable(NRF_RTC_Type * p_reg,uint32_t mask)386*150812a8SEvalZero __STATIC_INLINE void nrf_rtc_event_enable(NRF_RTC_Type * p_reg, uint32_t mask)
387*150812a8SEvalZero {
388*150812a8SEvalZero p_reg->EVTENSET = mask;
389*150812a8SEvalZero }
nrf_rtc_event_disable(NRF_RTC_Type * p_reg,uint32_t mask)390*150812a8SEvalZero __STATIC_INLINE void nrf_rtc_event_disable(NRF_RTC_Type * p_reg, uint32_t mask)
391*150812a8SEvalZero {
392*150812a8SEvalZero p_reg->EVTENCLR = mask;
393*150812a8SEvalZero }
394*150812a8SEvalZero #endif
395*150812a8SEvalZero
396*150812a8SEvalZero /** @} */
397*150812a8SEvalZero
398*150812a8SEvalZero #ifdef __cplusplus
399*150812a8SEvalZero }
400*150812a8SEvalZero #endif
401*150812a8SEvalZero
402*150812a8SEvalZero #endif /* NRF_RTC_H */
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