1*150812a8SEvalZero /*
2*150812a8SEvalZero * Copyright (c) 2018, Nordic Semiconductor ASA
3*150812a8SEvalZero * All rights reserved.
4*150812a8SEvalZero *
5*150812a8SEvalZero * Redistribution and use in source and binary forms, with or without
6*150812a8SEvalZero * modification, are permitted provided that the following conditions are met:
7*150812a8SEvalZero *
8*150812a8SEvalZero * 1. Redistributions of source code must retain the above copyright notice, this
9*150812a8SEvalZero * list of conditions and the following disclaimer.
10*150812a8SEvalZero *
11*150812a8SEvalZero * 2. Redistributions in binary form must reproduce the above copyright
12*150812a8SEvalZero * notice, this list of conditions and the following disclaimer in the
13*150812a8SEvalZero * documentation and/or other materials provided with the distribution.
14*150812a8SEvalZero *
15*150812a8SEvalZero * 3. Neither the name of the copyright holder nor the names of its
16*150812a8SEvalZero * contributors may be used to endorse or promote products derived from this
17*150812a8SEvalZero * software without specific prior written permission.
18*150812a8SEvalZero *
19*150812a8SEvalZero * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20*150812a8SEvalZero * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21*150812a8SEvalZero * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22*150812a8SEvalZero * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
23*150812a8SEvalZero * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24*150812a8SEvalZero * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25*150812a8SEvalZero * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26*150812a8SEvalZero * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27*150812a8SEvalZero * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28*150812a8SEvalZero * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29*150812a8SEvalZero * POSSIBILITY OF SUCH DAMAGE.
30*150812a8SEvalZero */
31*150812a8SEvalZero
32*150812a8SEvalZero #ifndef NRF_REGULATORS_H__
33*150812a8SEvalZero #define NRF_REGULATORS_H__
34*150812a8SEvalZero
35*150812a8SEvalZero #include <nrfx.h>
36*150812a8SEvalZero
37*150812a8SEvalZero #ifdef __cplusplus
38*150812a8SEvalZero extern "C" {
39*150812a8SEvalZero #endif
40*150812a8SEvalZero
41*150812a8SEvalZero /**
42*150812a8SEvalZero * @defgroup nrf_regulators_hal REGULATORS HAL
43*150812a8SEvalZero * @{
44*150812a8SEvalZero * @ingroup nrf_power
45*150812a8SEvalZero * @brief Hardware access layer for managing the REGULATORS peripheral.
46*150812a8SEvalZero */
47*150812a8SEvalZero
48*150812a8SEvalZero /**
49*150812a8SEvalZero * @brief Function for enabling or disabling DCDC converter.
50*150812a8SEvalZero *
51*150812a8SEvalZero * @param[in] p_reg Pointer to the peripheral registers structure.
52*150812a8SEvalZero * @param[in] enable Set true to enable or false to disable DCDC converter.
53*150812a8SEvalZero */
54*150812a8SEvalZero __STATIC_INLINE void nrf_regulators_dcdcen_set(NRF_REGULATORS_Type * p_reg, bool enable);
55*150812a8SEvalZero
56*150812a8SEvalZero /**
57*150812a8SEvalZero * @brief Function for putting CPU in system OFF mode.
58*150812a8SEvalZero *
59*150812a8SEvalZero * This function puts the CPU into system off mode.
60*150812a8SEvalZero * The only way to wake up the CPU is by reset.
61*150812a8SEvalZero *
62*150812a8SEvalZero * @note This function never returns.
63*150812a8SEvalZero *
64*150812a8SEvalZero * @param[in] p_reg Pointer to the peripheral registers structure.
65*150812a8SEvalZero */
66*150812a8SEvalZero __STATIC_INLINE void nrf_regulators_system_off(NRF_REGULATORS_Type * p_reg);
67*150812a8SEvalZero
68*150812a8SEvalZero #ifndef SUPPRESS_INLINE_IMPLEMENTATION
69*150812a8SEvalZero
nrf_regulators_dcdcen_set(NRF_REGULATORS_Type * p_reg,bool enable)70*150812a8SEvalZero __STATIC_INLINE void nrf_regulators_dcdcen_set(NRF_REGULATORS_Type * p_reg, bool enable)
71*150812a8SEvalZero {
72*150812a8SEvalZero p_reg->DCDCEN = (enable ? REGULATORS_DCDCEN_DCDCEN_Msk : 0);
73*150812a8SEvalZero }
74*150812a8SEvalZero
nrf_regulators_system_off(NRF_REGULATORS_Type * p_reg)75*150812a8SEvalZero __STATIC_INLINE void nrf_regulators_system_off(NRF_REGULATORS_Type * p_reg)
76*150812a8SEvalZero {
77*150812a8SEvalZero p_reg->SYSTEMOFF = REGULATORS_SYSTEMOFF_SYSTEMOFF_Msk;
78*150812a8SEvalZero __DSB();
79*150812a8SEvalZero
80*150812a8SEvalZero /* Solution for simulated System OFF in debug mode */
81*150812a8SEvalZero while (true)
82*150812a8SEvalZero {
83*150812a8SEvalZero __WFE();
84*150812a8SEvalZero }
85*150812a8SEvalZero }
86*150812a8SEvalZero
87*150812a8SEvalZero #endif // SUPPRESS_INLINE_IMPLEMENTATION
88*150812a8SEvalZero
89*150812a8SEvalZero /** @} */
90*150812a8SEvalZero
91*150812a8SEvalZero #ifdef __cplusplus
92*150812a8SEvalZero }
93*150812a8SEvalZero #endif
94*150812a8SEvalZero
95*150812a8SEvalZero #endif // NRF_REGULATORS_H__
96