1*150812a8SEvalZero /* 2*150812a8SEvalZero * Copyright (c) 2012 - 2018, Nordic Semiconductor ASA 3*150812a8SEvalZero * All rights reserved. 4*150812a8SEvalZero * 5*150812a8SEvalZero * Redistribution and use in source and binary forms, with or without 6*150812a8SEvalZero * modification, are permitted provided that the following conditions are met: 7*150812a8SEvalZero * 8*150812a8SEvalZero * 1. Redistributions of source code must retain the above copyright notice, this 9*150812a8SEvalZero * list of conditions and the following disclaimer. 10*150812a8SEvalZero * 11*150812a8SEvalZero * 2. Redistributions in binary form must reproduce the above copyright 12*150812a8SEvalZero * notice, this list of conditions and the following disclaimer in the 13*150812a8SEvalZero * documentation and/or other materials provided with the distribution. 14*150812a8SEvalZero * 15*150812a8SEvalZero * 3. Neither the name of the copyright holder nor the names of its 16*150812a8SEvalZero * contributors may be used to endorse or promote products derived from this 17*150812a8SEvalZero * software without specific prior written permission. 18*150812a8SEvalZero * 19*150812a8SEvalZero * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 20*150812a8SEvalZero * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 21*150812a8SEvalZero * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 22*150812a8SEvalZero * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 23*150812a8SEvalZero * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24*150812a8SEvalZero * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25*150812a8SEvalZero * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26*150812a8SEvalZero * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27*150812a8SEvalZero * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28*150812a8SEvalZero * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29*150812a8SEvalZero * POSSIBILITY OF SUCH DAMAGE. 30*150812a8SEvalZero */ 31*150812a8SEvalZero 32*150812a8SEvalZero #ifndef NRF_NVMC_H__ 33*150812a8SEvalZero #define NRF_NVMC_H__ 34*150812a8SEvalZero 35*150812a8SEvalZero #include <nrfx.h> 36*150812a8SEvalZero 37*150812a8SEvalZero #ifdef __cplusplus 38*150812a8SEvalZero extern "C" { 39*150812a8SEvalZero #endif 40*150812a8SEvalZero 41*150812a8SEvalZero 42*150812a8SEvalZero /** 43*150812a8SEvalZero * @defgroup nrf_nvmc_hal NVMC HAL 44*150812a8SEvalZero * @{ 45*150812a8SEvalZero * @ingroup nrf_nvmc 46*150812a8SEvalZero * @brief Hardware access layer for managing the Non-Volatile Memory Controller (NVMC) peripheral. 47*150812a8SEvalZero * 48*150812a8SEvalZero * This driver allows writing to the non-volatile memory (NVM) regions 49*150812a8SEvalZero * of the chip. In order to write to NVM the controller must be powered 50*150812a8SEvalZero * on and the relevant page must be erased. 51*150812a8SEvalZero * 52*150812a8SEvalZero */ 53*150812a8SEvalZero 54*150812a8SEvalZero 55*150812a8SEvalZero /** 56*150812a8SEvalZero * @brief Erase a page in flash. This is required before writing to any 57*150812a8SEvalZero * address in the page. 58*150812a8SEvalZero * 59*150812a8SEvalZero * @param address Start address of the page. 60*150812a8SEvalZero */ 61*150812a8SEvalZero void nrf_nvmc_page_erase(uint32_t address); 62*150812a8SEvalZero 63*150812a8SEvalZero 64*150812a8SEvalZero /** 65*150812a8SEvalZero * @brief Write a single byte to flash. 66*150812a8SEvalZero * 67*150812a8SEvalZero * The function reads the word containing the byte, and then 68*150812a8SEvalZero * rewrites the entire word. 69*150812a8SEvalZero * 70*150812a8SEvalZero * @param address Address to write to. 71*150812a8SEvalZero * @param value Value to write. 72*150812a8SEvalZero */ 73*150812a8SEvalZero void nrf_nvmc_write_byte(uint32_t address , uint8_t value); 74*150812a8SEvalZero 75*150812a8SEvalZero 76*150812a8SEvalZero /** 77*150812a8SEvalZero * @brief Write a 32-bit word to flash. 78*150812a8SEvalZero * @param address Address to write to. 79*150812a8SEvalZero * @param value Value to write. 80*150812a8SEvalZero */ 81*150812a8SEvalZero void nrf_nvmc_write_word(uint32_t address, uint32_t value); 82*150812a8SEvalZero 83*150812a8SEvalZero 84*150812a8SEvalZero /** 85*150812a8SEvalZero * @brief Write consecutive bytes to flash. 86*150812a8SEvalZero * 87*150812a8SEvalZero * @param address Address to write to. 88*150812a8SEvalZero * @param src Pointer to data to copy from. 89*150812a8SEvalZero * @param num_bytes Number of bytes in src to write. 90*150812a8SEvalZero */ 91*150812a8SEvalZero void nrf_nvmc_write_bytes(uint32_t address, const uint8_t * src, uint32_t num_bytes); 92*150812a8SEvalZero 93*150812a8SEvalZero 94*150812a8SEvalZero /** 95*150812a8SEvalZero * @brief Write consecutive words to flash. 96*150812a8SEvalZero * 97*150812a8SEvalZero * @param address Address to write to. 98*150812a8SEvalZero * @param src Pointer to data to copy from. 99*150812a8SEvalZero * @param num_words Number of words in src to write. 100*150812a8SEvalZero */ 101*150812a8SEvalZero void nrf_nvmc_write_words(uint32_t address, const uint32_t * src, uint32_t num_words); 102*150812a8SEvalZero 103*150812a8SEvalZero 104*150812a8SEvalZero /** @} */ 105*150812a8SEvalZero 106*150812a8SEvalZero #ifdef __cplusplus 107*150812a8SEvalZero } 108*150812a8SEvalZero #endif 109*150812a8SEvalZero 110*150812a8SEvalZero #endif // NRF_NVMC_H__ 111