1 /*
2 * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are met:
7 *
8 * 1. Redistributions of source code must retain the above copyright notice, this
9 * list of conditions and the following disclaimer.
10 *
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * 3. Neither the name of the copyright holder nor the names of its
16 * contributors may be used to endorse or promote products derived from this
17 * software without specific prior written permission.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
23 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32 #ifndef NRF_GPIOTE_H__
33 #define NRF_GPIOTE_H__
34
35 #include <nrfx.h>
36
37 #ifdef __cplusplus
38 extern "C" {
39 #endif
40
41 /**
42 * @defgroup nrf_gpiote_hal GPIOTE HAL
43 * @{
44 * @ingroup nrf_gpiote
45 * @brief Hardware access layer for managing the GPIOTE peripheral.
46 */
47
48 #ifdef GPIOTE_CONFIG_PORT_Msk
49 #define GPIOTE_CONFIG_PORT_PIN_Msk (GPIOTE_CONFIG_PORT_Msk | GPIOTE_CONFIG_PSEL_Msk)
50 #else
51 #define GPIOTE_CONFIG_PORT_PIN_Msk GPIOTE_CONFIG_PSEL_Msk
52 #endif
53
54 /**
55 * @enum nrf_gpiote_polarity_t
56 * @brief Polarity for the GPIOTE channel.
57 */
58 typedef enum
59 {
60 NRF_GPIOTE_POLARITY_LOTOHI = GPIOTE_CONFIG_POLARITY_LoToHi, ///< Low to high.
61 NRF_GPIOTE_POLARITY_HITOLO = GPIOTE_CONFIG_POLARITY_HiToLo, ///< High to low.
62 NRF_GPIOTE_POLARITY_TOGGLE = GPIOTE_CONFIG_POLARITY_Toggle ///< Toggle.
63 } nrf_gpiote_polarity_t;
64
65
66 /**
67 * @enum nrf_gpiote_outinit_t
68 * @brief Initial output value for the GPIOTE channel.
69 */
70 typedef enum
71 {
72 NRF_GPIOTE_INITIAL_VALUE_LOW = GPIOTE_CONFIG_OUTINIT_Low, ///< Low to high.
73 NRF_GPIOTE_INITIAL_VALUE_HIGH = GPIOTE_CONFIG_OUTINIT_High ///< High to low.
74 } nrf_gpiote_outinit_t;
75
76 /**
77 * @brief Tasks.
78 */
79 typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */
80 {
81 NRF_GPIOTE_TASKS_OUT_0 = offsetof(NRF_GPIOTE_Type, TASKS_OUT[0]), /**< Out task 0.*/
82 NRF_GPIOTE_TASKS_OUT_1 = offsetof(NRF_GPIOTE_Type, TASKS_OUT[1]), /**< Out task 1.*/
83 NRF_GPIOTE_TASKS_OUT_2 = offsetof(NRF_GPIOTE_Type, TASKS_OUT[2]), /**< Out task 2.*/
84 NRF_GPIOTE_TASKS_OUT_3 = offsetof(NRF_GPIOTE_Type, TASKS_OUT[3]), /**< Out task 3.*/
85 #if (GPIOTE_CH_NUM > 4) || defined(__NRFX_DOXYGEN__)
86 NRF_GPIOTE_TASKS_OUT_4 = offsetof(NRF_GPIOTE_Type, TASKS_OUT[4]), /**< Out task 4.*/
87 NRF_GPIOTE_TASKS_OUT_5 = offsetof(NRF_GPIOTE_Type, TASKS_OUT[5]), /**< Out task 5.*/
88 NRF_GPIOTE_TASKS_OUT_6 = offsetof(NRF_GPIOTE_Type, TASKS_OUT[6]), /**< Out task 6.*/
89 NRF_GPIOTE_TASKS_OUT_7 = offsetof(NRF_GPIOTE_Type, TASKS_OUT[7]), /**< Out task 7.*/
90 #endif
91 #if defined(GPIOTE_FEATURE_SET_PRESENT) || defined(__NRFX_DOXYGEN__)
92 NRF_GPIOTE_TASKS_SET_0 = offsetof(NRF_GPIOTE_Type, TASKS_SET[0]), /**< Set task 0.*/
93 NRF_GPIOTE_TASKS_SET_1 = offsetof(NRF_GPIOTE_Type, TASKS_SET[1]), /**< Set task 1.*/
94 NRF_GPIOTE_TASKS_SET_2 = offsetof(NRF_GPIOTE_Type, TASKS_SET[2]), /**< Set task 2.*/
95 NRF_GPIOTE_TASKS_SET_3 = offsetof(NRF_GPIOTE_Type, TASKS_SET[3]), /**< Set task 3.*/
96 NRF_GPIOTE_TASKS_SET_4 = offsetof(NRF_GPIOTE_Type, TASKS_SET[4]), /**< Set task 4.*/
97 NRF_GPIOTE_TASKS_SET_5 = offsetof(NRF_GPIOTE_Type, TASKS_SET[5]), /**< Set task 5.*/
98 NRF_GPIOTE_TASKS_SET_6 = offsetof(NRF_GPIOTE_Type, TASKS_SET[6]), /**< Set task 6.*/
99 NRF_GPIOTE_TASKS_SET_7 = offsetof(NRF_GPIOTE_Type, TASKS_SET[7]), /**< Set task 7.*/
100 #endif
101 #if defined(GPIOTE_FEATURE_CLR_PRESENT) || defined(__NRFX_DOXYGEN__)
102 NRF_GPIOTE_TASKS_CLR_0 = offsetof(NRF_GPIOTE_Type, TASKS_CLR[0]), /**< Clear task 0.*/
103 NRF_GPIOTE_TASKS_CLR_1 = offsetof(NRF_GPIOTE_Type, TASKS_CLR[1]), /**< Clear task 1.*/
104 NRF_GPIOTE_TASKS_CLR_2 = offsetof(NRF_GPIOTE_Type, TASKS_CLR[2]), /**< Clear task 2.*/
105 NRF_GPIOTE_TASKS_CLR_3 = offsetof(NRF_GPIOTE_Type, TASKS_CLR[3]), /**< Clear task 3.*/
106 NRF_GPIOTE_TASKS_CLR_4 = offsetof(NRF_GPIOTE_Type, TASKS_CLR[4]), /**< Clear task 4.*/
107 NRF_GPIOTE_TASKS_CLR_5 = offsetof(NRF_GPIOTE_Type, TASKS_CLR[5]), /**< Clear task 5.*/
108 NRF_GPIOTE_TASKS_CLR_6 = offsetof(NRF_GPIOTE_Type, TASKS_CLR[6]), /**< Clear task 6.*/
109 NRF_GPIOTE_TASKS_CLR_7 = offsetof(NRF_GPIOTE_Type, TASKS_CLR[7]), /**< Clear task 7.*/
110 #endif
111 /*lint -restore*/
112 } nrf_gpiote_tasks_t;
113
114 /**
115 * @brief Events.
116 */
117 typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */
118 {
119 NRF_GPIOTE_EVENTS_IN_0 = offsetof(NRF_GPIOTE_Type, EVENTS_IN[0]), /**< In event 0.*/
120 NRF_GPIOTE_EVENTS_IN_1 = offsetof(NRF_GPIOTE_Type, EVENTS_IN[1]), /**< In event 1.*/
121 NRF_GPIOTE_EVENTS_IN_2 = offsetof(NRF_GPIOTE_Type, EVENTS_IN[2]), /**< In event 2.*/
122 NRF_GPIOTE_EVENTS_IN_3 = offsetof(NRF_GPIOTE_Type, EVENTS_IN[3]), /**< In event 3.*/
123 #if (GPIOTE_CH_NUM > 4) || defined(__NRFX_DOXYGEN__)
124 NRF_GPIOTE_EVENTS_IN_4 = offsetof(NRF_GPIOTE_Type, EVENTS_IN[4]), /**< In event 4.*/
125 NRF_GPIOTE_EVENTS_IN_5 = offsetof(NRF_GPIOTE_Type, EVENTS_IN[5]), /**< In event 5.*/
126 NRF_GPIOTE_EVENTS_IN_6 = offsetof(NRF_GPIOTE_Type, EVENTS_IN[6]), /**< In event 6.*/
127 NRF_GPIOTE_EVENTS_IN_7 = offsetof(NRF_GPIOTE_Type, EVENTS_IN[7]), /**< In event 7.*/
128 #endif
129 NRF_GPIOTE_EVENTS_PORT = offsetof(NRF_GPIOTE_Type, EVENTS_PORT), /**< Port event.*/
130 /*lint -restore*/
131 } nrf_gpiote_events_t;
132
133 /**
134 * @enum nrf_gpiote_int_t
135 * @brief GPIOTE interrupts.
136 */
137 typedef enum
138 {
139 NRF_GPIOTE_INT_IN0_MASK = GPIOTE_INTENSET_IN0_Msk, /**< GPIOTE interrupt from IN0. */
140 NRF_GPIOTE_INT_IN1_MASK = GPIOTE_INTENSET_IN1_Msk, /**< GPIOTE interrupt from IN1. */
141 NRF_GPIOTE_INT_IN2_MASK = GPIOTE_INTENSET_IN2_Msk, /**< GPIOTE interrupt from IN2. */
142 NRF_GPIOTE_INT_IN3_MASK = GPIOTE_INTENSET_IN3_Msk, /**< GPIOTE interrupt from IN3. */
143 #if (GPIOTE_CH_NUM > 4) || defined(__NRFX_DOXYGEN__)
144 NRF_GPIOTE_INT_IN4_MASK = GPIOTE_INTENSET_IN4_Msk, /**< GPIOTE interrupt from IN4. */
145 NRF_GPIOTE_INT_IN5_MASK = GPIOTE_INTENSET_IN5_Msk, /**< GPIOTE interrupt from IN5. */
146 NRF_GPIOTE_INT_IN6_MASK = GPIOTE_INTENSET_IN6_Msk, /**< GPIOTE interrupt from IN6. */
147 NRF_GPIOTE_INT_IN7_MASK = GPIOTE_INTENSET_IN7_Msk, /**< GPIOTE interrupt from IN7. */
148 #endif
149 NRF_GPIOTE_INT_PORT_MASK = (int)GPIOTE_INTENSET_PORT_Msk, /**< GPIOTE interrupt from PORT event. */
150 } nrf_gpiote_int_t;
151
152 #define NRF_GPIOTE_INT_IN_MASK (NRF_GPIOTE_INT_IN0_MASK | NRF_GPIOTE_INT_IN1_MASK |\
153 NRF_GPIOTE_INT_IN2_MASK | NRF_GPIOTE_INT_IN3_MASK)
154 #if (GPIOTE_CH_NUM > 4)
155 #undef NRF_GPIOTE_INT_IN_MASK
156 #define NRF_GPIOTE_INT_IN_MASK (NRF_GPIOTE_INT_IN0_MASK | NRF_GPIOTE_INT_IN1_MASK |\
157 NRF_GPIOTE_INT_IN2_MASK | NRF_GPIOTE_INT_IN3_MASK |\
158 NRF_GPIOTE_INT_IN4_MASK | NRF_GPIOTE_INT_IN5_MASK |\
159 NRF_GPIOTE_INT_IN6_MASK | NRF_GPIOTE_INT_IN7_MASK)
160 #endif
161
162 /**
163 * @brief Function for activating a specific GPIOTE task.
164 *
165 * @param[in] task Task.
166 */
167 __STATIC_INLINE void nrf_gpiote_task_set(nrf_gpiote_tasks_t task);
168
169 /**
170 * @brief Function for getting the address of a specific GPIOTE task.
171 *
172 * @param[in] task Task.
173 *
174 * @returns Address.
175 */
176 __STATIC_INLINE uint32_t nrf_gpiote_task_addr_get(nrf_gpiote_tasks_t task);
177
178 /**
179 * @brief Function for getting the state of a specific GPIOTE event.
180 *
181 * @param[in] event Event.
182 */
183 __STATIC_INLINE bool nrf_gpiote_event_is_set(nrf_gpiote_events_t event);
184
185 /**
186 * @brief Function for clearing a specific GPIOTE event.
187 *
188 * @param[in] event Event.
189 */
190 __STATIC_INLINE void nrf_gpiote_event_clear(nrf_gpiote_events_t event);
191
192 /**
193 * @brief Function for getting the address of a specific GPIOTE event.
194 *
195 * @param[in] event Event.
196 *
197 * @return Address
198 */
199 __STATIC_INLINE uint32_t nrf_gpiote_event_addr_get(nrf_gpiote_events_t event);
200
201 /**@brief Function for enabling interrupts.
202 *
203 * @param[in] mask Interrupt mask to be enabled.
204 */
205 __STATIC_INLINE void nrf_gpiote_int_enable(uint32_t mask);
206
207 /**@brief Function for disabling interrupts.
208 *
209 * @param[in] mask Interrupt mask to be disabled.
210 */
211 __STATIC_INLINE void nrf_gpiote_int_disable(uint32_t mask);
212
213 /**@brief Function for checking if interrupts are enabled.
214 *
215 * @param[in] mask Mask of interrupt flags to check.
216 *
217 * @return Mask with enabled interrupts.
218 */
219 __STATIC_INLINE uint32_t nrf_gpiote_int_is_enabled(uint32_t mask);
220
221 #if defined(DPPI_PRESENT) || defined(__NRFX_DOXYGEN__)
222 /**
223 * @brief Function for setting the subscribe configuration for a given
224 * GPIOTE task.
225 *
226 * @param[in] task Task for which to set the configuration.
227 * @param[in] channel Channel through which to subscribe events.
228 */
229 __STATIC_INLINE void nrf_gpiote_subscribe_set(nrf_gpiote_tasks_t task,
230 uint8_t channel);
231
232 /**
233 * @brief Function for clearing the subscribe configuration for a given
234 * GPIOTE task.
235 *
236 * @param[in] task Task for which to clear the configuration.
237 */
238 __STATIC_INLINE void nrf_gpiote_subscribe_clear(nrf_gpiote_tasks_t task);
239
240 /**
241 * @brief Function for setting the publish configuration for a given
242 * GPIOTE event.
243 *
244 * @param[in] event Event for which to set the configuration.
245 * @param[in] channel Channel through which to publish the event.
246 */
247 __STATIC_INLINE void nrf_gpiote_publish_set(nrf_gpiote_events_t event,
248 uint8_t channel);
249
250 /**
251 * @brief Function for clearing the publish configuration for a given
252 * GPIOTE event.
253 *
254 * @param[in] event Event for which to clear the configuration.
255 */
256 __STATIC_INLINE void nrf_gpiote_publish_clear(nrf_gpiote_events_t event);
257 #endif // defined(DPPI_PRESENT) || defined(__NRFX_DOXYGEN__)
258
259 /**@brief Function for enabling a GPIOTE event.
260 *
261 * @param[in] idx Task-Event index.
262 */
263 __STATIC_INLINE void nrf_gpiote_event_enable(uint32_t idx);
264
265 /**@brief Function for disabling a GPIOTE event.
266 *
267 * @param[in] idx Task-Event index.
268 */
269 __STATIC_INLINE void nrf_gpiote_event_disable(uint32_t idx);
270
271 /**@brief Function for configuring a GPIOTE event.
272 *
273 * @param[in] idx Task-Event index.
274 * @param[in] pin Pin associated with event.
275 * @param[in] polarity Transition that should generate an event.
276 */
277 __STATIC_INLINE void nrf_gpiote_event_configure(uint32_t idx, uint32_t pin,
278 nrf_gpiote_polarity_t polarity);
279
280 /**@brief Function for getting the pin associated with a GPIOTE event.
281 *
282 * @param[in] idx Task-Event index.
283 *
284 * @return Pin number.
285 */
286 __STATIC_INLINE uint32_t nrf_gpiote_event_pin_get(uint32_t idx);
287
288 /**@brief Function for getting the polarity associated with a GPIOTE event.
289 *
290 * @param[in] idx Task-Event index.
291 *
292 * @return Polarity.
293 */
294 __STATIC_INLINE nrf_gpiote_polarity_t nrf_gpiote_event_polarity_get(uint32_t idx);
295
296 /**@brief Function for enabling a GPIOTE task.
297 *
298 * @param[in] idx Task-Event index.
299 */
300 __STATIC_INLINE void nrf_gpiote_task_enable(uint32_t idx);
301
302 /**@brief Function for disabling a GPIOTE task.
303 *
304 * @param[in] idx Task-Event index.
305 */
306 __STATIC_INLINE void nrf_gpiote_task_disable(uint32_t idx);
307
308 /**@brief Function for configuring a GPIOTE task.
309 * @note Function is not configuring mode field so task is disabled after this function is called.
310 *
311 * @param[in] idx Task-Event index.
312 * @param[in] pin Pin associated with event.
313 * @param[in] polarity Transition that should generate an event.
314 * @param[in] init_val Initial value of the pin.
315 */
316 __STATIC_INLINE void nrf_gpiote_task_configure(uint32_t idx, uint32_t pin,
317 nrf_gpiote_polarity_t polarity,
318 nrf_gpiote_outinit_t init_val);
319
320 /**@brief Function for forcing a specific state on the pin connected to GPIOTE.
321 *
322 * @param[in] idx Task-Event index.
323 * @param[in] init_val Pin state.
324 */
325 __STATIC_INLINE void nrf_gpiote_task_force(uint32_t idx, nrf_gpiote_outinit_t init_val);
326
327 /**@brief Function for resetting a GPIOTE task event configuration to the default state.
328 *
329 * @param[in] idx Task-Event index.
330 */
331 __STATIC_INLINE void nrf_gpiote_te_default(uint32_t idx);
332
333 /**@brief Function for checking if particular Task-Event is enabled.
334 *
335 * @param[in] idx Task-Event index.
336 *
337 * @retval true If the Task-Event mode is set to Task or Event.
338 * @retval false If the Task-Event mode is set to Disabled.
339 */
340 __STATIC_INLINE bool nrf_gpiote_te_is_enabled(uint32_t idx);
341
342 #ifndef SUPPRESS_INLINE_IMPLEMENTATION
nrf_gpiote_task_set(nrf_gpiote_tasks_t task)343 __STATIC_INLINE void nrf_gpiote_task_set(nrf_gpiote_tasks_t task)
344 {
345 *(__IO uint32_t *)((uint32_t)NRF_GPIOTE + task) = 0x1UL;
346 }
347
nrf_gpiote_task_addr_get(nrf_gpiote_tasks_t task)348 __STATIC_INLINE uint32_t nrf_gpiote_task_addr_get(nrf_gpiote_tasks_t task)
349 {
350 return ((uint32_t)NRF_GPIOTE + task);
351 }
352
nrf_gpiote_event_is_set(nrf_gpiote_events_t event)353 __STATIC_INLINE bool nrf_gpiote_event_is_set(nrf_gpiote_events_t event)
354 {
355 return (*(uint32_t *)nrf_gpiote_event_addr_get(event) == 0x1UL) ? true : false;
356 }
357
nrf_gpiote_event_clear(nrf_gpiote_events_t event)358 __STATIC_INLINE void nrf_gpiote_event_clear(nrf_gpiote_events_t event)
359 {
360 *(uint32_t *)nrf_gpiote_event_addr_get(event) = 0;
361 #if __CORTEX_M == 0x04
362 volatile uint32_t dummy = *((volatile uint32_t *)nrf_gpiote_event_addr_get(event));
363 (void)dummy;
364 #endif
365 }
366
nrf_gpiote_event_addr_get(nrf_gpiote_events_t event)367 __STATIC_INLINE uint32_t nrf_gpiote_event_addr_get(nrf_gpiote_events_t event)
368 {
369 return ((uint32_t)NRF_GPIOTE + event);
370 }
371
nrf_gpiote_int_enable(uint32_t mask)372 __STATIC_INLINE void nrf_gpiote_int_enable(uint32_t mask)
373 {
374 NRF_GPIOTE->INTENSET = mask;
375 }
376
nrf_gpiote_int_disable(uint32_t mask)377 __STATIC_INLINE void nrf_gpiote_int_disable(uint32_t mask)
378 {
379 NRF_GPIOTE->INTENCLR = mask;
380 }
381
nrf_gpiote_int_is_enabled(uint32_t mask)382 __STATIC_INLINE uint32_t nrf_gpiote_int_is_enabled(uint32_t mask)
383 {
384 return (NRF_GPIOTE->INTENSET & mask);
385 }
386
387 #if defined(DPPI_PRESENT)
nrf_gpiote_subscribe_set(nrf_gpiote_tasks_t task,uint8_t channel)388 __STATIC_INLINE void nrf_gpiote_subscribe_set(nrf_gpiote_tasks_t task,
389 uint8_t channel)
390 {
391 *((volatile uint32_t *) ((uint8_t *) NRF_GPIOTE + (uint32_t) task + 0x80uL)) =
392 ((uint32_t)channel | GPIOTE_SUBSCRIBE_OUT_EN_Msk);
393 }
394
nrf_gpiote_subscribe_clear(nrf_gpiote_tasks_t task)395 __STATIC_INLINE void nrf_gpiote_subscribe_clear(nrf_gpiote_tasks_t task)
396 {
397 *((volatile uint32_t *) ((uint8_t *) NRF_GPIOTE + (uint32_t) task + 0x80uL)) = 0;
398 }
399
nrf_gpiote_publish_set(nrf_gpiote_events_t event,uint8_t channel)400 __STATIC_INLINE void nrf_gpiote_publish_set(nrf_gpiote_events_t event,
401 uint8_t channel)
402 {
403 *((volatile uint32_t *) ((uint8_t *) NRF_GPIOTE + (uint32_t) event + 0x80uL)) =
404 ((uint32_t)channel | GPIOTE_PUBLISH_IN_EN_Msk);
405 }
406
nrf_gpiote_publish_clear(nrf_gpiote_events_t event)407 __STATIC_INLINE void nrf_gpiote_publish_clear(nrf_gpiote_events_t event)
408 {
409 *((volatile uint32_t *) ((uint8_t *) NRF_GPIOTE + (uint32_t) event + 0x80uL)) = 0;
410 }
411 #endif // defined(DPPI_PRESENT)
412
nrf_gpiote_event_enable(uint32_t idx)413 __STATIC_INLINE void nrf_gpiote_event_enable(uint32_t idx)
414 {
415 NRF_GPIOTE->CONFIG[idx] |= GPIOTE_CONFIG_MODE_Event;
416 }
417
nrf_gpiote_event_disable(uint32_t idx)418 __STATIC_INLINE void nrf_gpiote_event_disable(uint32_t idx)
419 {
420 NRF_GPIOTE->CONFIG[idx] &= ~GPIOTE_CONFIG_MODE_Event;
421 }
422
nrf_gpiote_event_configure(uint32_t idx,uint32_t pin,nrf_gpiote_polarity_t polarity)423 __STATIC_INLINE void nrf_gpiote_event_configure(uint32_t idx, uint32_t pin, nrf_gpiote_polarity_t polarity)
424 {
425 NRF_GPIOTE->CONFIG[idx] &= ~(GPIOTE_CONFIG_PORT_PIN_Msk | GPIOTE_CONFIG_POLARITY_Msk);
426 NRF_GPIOTE->CONFIG[idx] |= ((pin << GPIOTE_CONFIG_PSEL_Pos) & GPIOTE_CONFIG_PORT_PIN_Msk) |
427 ((polarity << GPIOTE_CONFIG_POLARITY_Pos) & GPIOTE_CONFIG_POLARITY_Msk);
428 }
429
nrf_gpiote_event_pin_get(uint32_t idx)430 __STATIC_INLINE uint32_t nrf_gpiote_event_pin_get(uint32_t idx)
431 {
432 return ((NRF_GPIOTE->CONFIG[idx] & GPIOTE_CONFIG_PORT_PIN_Msk) >> GPIOTE_CONFIG_PSEL_Pos);
433 }
434
nrf_gpiote_event_polarity_get(uint32_t idx)435 __STATIC_INLINE nrf_gpiote_polarity_t nrf_gpiote_event_polarity_get(uint32_t idx)
436 {
437 return (nrf_gpiote_polarity_t)((NRF_GPIOTE->CONFIG[idx] & GPIOTE_CONFIG_POLARITY_Msk) >> GPIOTE_CONFIG_POLARITY_Pos);
438 }
439
nrf_gpiote_task_enable(uint32_t idx)440 __STATIC_INLINE void nrf_gpiote_task_enable(uint32_t idx)
441 {
442 uint32_t final_config = NRF_GPIOTE->CONFIG[idx] | GPIOTE_CONFIG_MODE_Task;
443 #ifdef NRF51
444 /* Workaround for the OUTINIT PAN. When nrf_gpiote_task_config() is called a glitch happens
445 on the GPIO if the GPIO in question is already assigned to GPIOTE and the pin is in the
446 correct state in GPIOTE but not in the OUT register. */
447 /* Configure channel to not existing, not connected to the pin, and configure as a tasks that will set it to proper level */
448 NRF_GPIOTE->CONFIG[idx] = final_config | (((31) << GPIOTE_CONFIG_PSEL_Pos) & GPIOTE_CONFIG_PORT_PIN_Msk);
449 __NOP();
450 __NOP();
451 __NOP();
452 #endif
453 NRF_GPIOTE->CONFIG[idx] = final_config;
454 }
455
nrf_gpiote_task_disable(uint32_t idx)456 __STATIC_INLINE void nrf_gpiote_task_disable(uint32_t idx)
457 {
458 NRF_GPIOTE->CONFIG[idx] &= ~GPIOTE_CONFIG_MODE_Task;
459 }
460
nrf_gpiote_task_configure(uint32_t idx,uint32_t pin,nrf_gpiote_polarity_t polarity,nrf_gpiote_outinit_t init_val)461 __STATIC_INLINE void nrf_gpiote_task_configure(uint32_t idx, uint32_t pin,
462 nrf_gpiote_polarity_t polarity,
463 nrf_gpiote_outinit_t init_val)
464 {
465 NRF_GPIOTE->CONFIG[idx] &= ~(GPIOTE_CONFIG_PORT_PIN_Msk |
466 GPIOTE_CONFIG_POLARITY_Msk |
467 GPIOTE_CONFIG_OUTINIT_Msk);
468
469 NRF_GPIOTE->CONFIG[idx] |= ((pin << GPIOTE_CONFIG_PSEL_Pos) & GPIOTE_CONFIG_PORT_PIN_Msk) |
470 ((polarity << GPIOTE_CONFIG_POLARITY_Pos) & GPIOTE_CONFIG_POLARITY_Msk) |
471 ((init_val << GPIOTE_CONFIG_OUTINIT_Pos) & GPIOTE_CONFIG_OUTINIT_Msk);
472 }
473
nrf_gpiote_task_force(uint32_t idx,nrf_gpiote_outinit_t init_val)474 __STATIC_INLINE void nrf_gpiote_task_force(uint32_t idx, nrf_gpiote_outinit_t init_val)
475 {
476 NRF_GPIOTE->CONFIG[idx] = (NRF_GPIOTE->CONFIG[idx] & ~GPIOTE_CONFIG_OUTINIT_Msk)
477 | ((init_val << GPIOTE_CONFIG_OUTINIT_Pos) & GPIOTE_CONFIG_OUTINIT_Msk);
478 }
479
nrf_gpiote_te_default(uint32_t idx)480 __STATIC_INLINE void nrf_gpiote_te_default(uint32_t idx)
481 {
482 NRF_GPIOTE->CONFIG[idx] = 0;
483 }
484
nrf_gpiote_te_is_enabled(uint32_t idx)485 __STATIC_INLINE bool nrf_gpiote_te_is_enabled(uint32_t idx)
486 {
487 return (NRF_GPIOTE->CONFIG[idx] & GPIOTE_CONFIG_MODE_Msk) != GPIOTE_CONFIG_MODE_Disabled;
488 }
489 #endif //SUPPRESS_INLINE_IMPLEMENTATION
490
491 /** @} */
492
493 #ifdef __cplusplus
494 }
495 #endif
496
497 #endif
498