1 /*
2 * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are met:
7 *
8 * 1. Redistributions of source code must retain the above copyright notice, this
9 * list of conditions and the following disclaimer.
10 *
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * 3. Neither the name of the copyright holder nor the names of its
16 * contributors may be used to endorse or promote products derived from this
17 * software without specific prior written permission.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
23 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32 #ifndef NRF_EGU_H__
33 #define NRF_EGU_H__
34
35 #include <nrfx.h>
36
37 #ifdef __cplusplus
38 extern "C" {
39 #endif
40
41 /**
42 * @defgroup nrf_egu_hal EGU HAL
43 * @{
44 * @ingroup nrf_swi_egu
45 * @brief Hardware access layer for managing the Event Generator Unit (EGU) peripheral.
46 */
47
48 /**
49 * @enum nrf_egu_task_t
50 * @brief EGU tasks.
51 */
52 typedef enum
53 {
54 /*lint -save -e30 -esym(628,__INTADDR__)*/
55 NRF_EGU_TASK_TRIGGER0 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[0]), /**< Trigger 0 for triggering the corresponding TRIGGERED[0] event. */
56 NRF_EGU_TASK_TRIGGER1 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[1]), /**< Trigger 1 for triggering the corresponding TRIGGERED[1] event. */
57 NRF_EGU_TASK_TRIGGER2 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[2]), /**< Trigger 2 for triggering the corresponding TRIGGERED[2] event. */
58 NRF_EGU_TASK_TRIGGER3 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[3]), /**< Trigger 3 for triggering the corresponding TRIGGERED[3] event. */
59 NRF_EGU_TASK_TRIGGER4 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[4]), /**< Trigger 4 for triggering the corresponding TRIGGERED[4] event. */
60 NRF_EGU_TASK_TRIGGER5 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[5]), /**< Trigger 5 for triggering the corresponding TRIGGERED[5] event. */
61 NRF_EGU_TASK_TRIGGER6 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[6]), /**< Trigger 6 for triggering the corresponding TRIGGERED[6] event. */
62 NRF_EGU_TASK_TRIGGER7 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[7]), /**< Trigger 7 for triggering the corresponding TRIGGERED[7] event. */
63 NRF_EGU_TASK_TRIGGER8 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[8]), /**< Trigger 8 for triggering the corresponding TRIGGERED[8] event. */
64 NRF_EGU_TASK_TRIGGER9 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[9]), /**< Trigger 9 for triggering the corresponding TRIGGERED[9] event. */
65 NRF_EGU_TASK_TRIGGER10 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[10]), /**< Trigger 10 for triggering the corresponding TRIGGERED[10] event. */
66 NRF_EGU_TASK_TRIGGER11 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[11]), /**< Trigger 11 for triggering the corresponding TRIGGERED[11] event. */
67 NRF_EGU_TASK_TRIGGER12 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[12]), /**< Trigger 12 for triggering the corresponding TRIGGERED[12] event. */
68 NRF_EGU_TASK_TRIGGER13 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[13]), /**< Trigger 13 for triggering the corresponding TRIGGERED[13] event. */
69 NRF_EGU_TASK_TRIGGER14 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[14]), /**< Trigger 14 for triggering the corresponding TRIGGERED[14] event. */
70 NRF_EGU_TASK_TRIGGER15 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[15]) /**< Trigger 15 for triggering the corresponding TRIGGERED[15] event. */
71 /*lint -restore*/
72 } nrf_egu_task_t;
73
74 /**
75 * @enum nrf_egu_event_t
76 * @brief EGU events.
77 */
78 typedef enum
79 {
80 /*lint -save -e30 -esym(628,__INTADDR__)*/
81 NRF_EGU_EVENT_TRIGGERED0 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[0]), /**< Event number 0 generated by triggering the corresponding TRIGGER[0] task. */
82 NRF_EGU_EVENT_TRIGGERED1 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[1]), /**< Event number 1 generated by triggering the corresponding TRIGGER[1] task. */
83 NRF_EGU_EVENT_TRIGGERED2 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[2]), /**< Event number 2 generated by triggering the corresponding TRIGGER[2] task. */
84 NRF_EGU_EVENT_TRIGGERED3 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[3]), /**< Event number 3 generated by triggering the corresponding TRIGGER[3] task. */
85 NRF_EGU_EVENT_TRIGGERED4 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[4]), /**< Event number 4 generated by triggering the corresponding TRIGGER[4] task. */
86 NRF_EGU_EVENT_TRIGGERED5 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[5]), /**< Event number 5 generated by triggering the corresponding TRIGGER[5] task. */
87 NRF_EGU_EVENT_TRIGGERED6 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[6]), /**< Event number 6 generated by triggering the corresponding TRIGGER[6] task. */
88 NRF_EGU_EVENT_TRIGGERED7 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[7]), /**< Event number 7 generated by triggering the corresponding TRIGGER[7] task. */
89 NRF_EGU_EVENT_TRIGGERED8 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[8]), /**< Event number 8 generated by triggering the corresponding TRIGGER[8] task. */
90 NRF_EGU_EVENT_TRIGGERED9 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[9]), /**< Event number 9 generated by triggering the corresponding TRIGGER[9] task. */
91 NRF_EGU_EVENT_TRIGGERED10 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[10]), /**< Event number 10 generated by triggering the corresponding TRIGGER[10] task. */
92 NRF_EGU_EVENT_TRIGGERED11 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[11]), /**< Event number 11 generated by triggering the corresponding TRIGGER[11] task. */
93 NRF_EGU_EVENT_TRIGGERED12 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[12]), /**< Event number 12 generated by triggering the corresponding TRIGGER[12] task. */
94 NRF_EGU_EVENT_TRIGGERED13 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[13]), /**< Event number 13 generated by triggering the corresponding TRIGGER[13] task. */
95 NRF_EGU_EVENT_TRIGGERED14 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[14]), /**< Event number 14 generated by triggering the corresponding TRIGGER[14] task. */
96 NRF_EGU_EVENT_TRIGGERED15 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[15]) /**< Event number 15 generated by triggering the corresponding TRIGGER[15] task. */
97 /*lint -restore*/
98 } nrf_egu_event_t;
99
100 /**
101 * @enum nrf_egu_int_mask_t
102 * @brief EGU interrupts.
103 */
104 typedef enum
105 {
106 NRF_EGU_INT_TRIGGERED0 = EGU_INTENSET_TRIGGERED0_Msk, /**< Interrupt on EVENTS_TRIGGERED[0] event. */
107 NRF_EGU_INT_TRIGGERED1 = EGU_INTENSET_TRIGGERED1_Msk, /**< Interrupt on EVENTS_TRIGGERED[1] event. */
108 NRF_EGU_INT_TRIGGERED2 = EGU_INTENSET_TRIGGERED2_Msk, /**< Interrupt on EVENTS_TRIGGERED[2] event. */
109 NRF_EGU_INT_TRIGGERED3 = EGU_INTENSET_TRIGGERED3_Msk, /**< Interrupt on EVENTS_TRIGGERED[3] event. */
110 NRF_EGU_INT_TRIGGERED4 = EGU_INTENSET_TRIGGERED4_Msk, /**< Interrupt on EVENTS_TRIGGERED[4] event. */
111 NRF_EGU_INT_TRIGGERED5 = EGU_INTENSET_TRIGGERED5_Msk, /**< Interrupt on EVENTS_TRIGGERED[5] event. */
112 NRF_EGU_INT_TRIGGERED6 = EGU_INTENSET_TRIGGERED6_Msk, /**< Interrupt on EVENTS_TRIGGERED[6] event. */
113 NRF_EGU_INT_TRIGGERED7 = EGU_INTENSET_TRIGGERED7_Msk, /**< Interrupt on EVENTS_TRIGGERED[7] event. */
114 NRF_EGU_INT_TRIGGERED8 = EGU_INTENSET_TRIGGERED8_Msk, /**< Interrupt on EVENTS_TRIGGERED[8] event. */
115 NRF_EGU_INT_TRIGGERED9 = EGU_INTENSET_TRIGGERED9_Msk, /**< Interrupt on EVENTS_TRIGGERED[9] event. */
116 NRF_EGU_INT_TRIGGERED10 = EGU_INTENSET_TRIGGERED10_Msk, /**< Interrupt on EVENTS_TRIGGERED[10] event. */
117 NRF_EGU_INT_TRIGGERED11 = EGU_INTENSET_TRIGGERED11_Msk, /**< Interrupt on EVENTS_TRIGGERED[11] event. */
118 NRF_EGU_INT_TRIGGERED12 = EGU_INTENSET_TRIGGERED12_Msk, /**< Interrupt on EVENTS_TRIGGERED[12] event. */
119 NRF_EGU_INT_TRIGGERED13 = EGU_INTENSET_TRIGGERED13_Msk, /**< Interrupt on EVENTS_TRIGGERED[13] event. */
120 NRF_EGU_INT_TRIGGERED14 = EGU_INTENSET_TRIGGERED14_Msk, /**< Interrupt on EVENTS_TRIGGERED[14] event. */
121 NRF_EGU_INT_TRIGGERED15 = EGU_INTENSET_TRIGGERED15_Msk, /**< Interrupt on EVENTS_TRIGGERED[15] event. */
122 NRF_EGU_INT_ALL = 0xFFFFuL
123 } nrf_egu_int_mask_t;
124
125 /**@brief Function for getting max channel number of given EGU.
126 *
127 * @param NRF_EGUx EGU instance.
128 *
129 * @returns number of available channels.
130 */
131 __STATIC_INLINE uint32_t nrf_egu_channel_count(NRF_EGU_Type * NRF_EGUx);
132
133 /**
134 * @brief Function for triggering a specific EGU task.
135 *
136 * @param NRF_EGUx EGU instance.
137 * @param egu_task EGU task.
138 */
139 __STATIC_INLINE void nrf_egu_task_trigger(NRF_EGU_Type * NRF_EGUx, nrf_egu_task_t egu_task);
140
141 /**
142 * @brief Function for returning the address of a specific EGU task register.
143 *
144 * @param NRF_EGUx EGU instance.
145 * @param egu_task EGU task.
146 */
147 __STATIC_INLINE uint32_t * nrf_egu_task_address_get(NRF_EGU_Type * NRF_EGUx,
148 nrf_egu_task_t egu_task);
149
150 /**
151 * @brief Function for returning the address of a specific EGU TRIGGER task register.
152 *
153 * @param NRF_EGUx EGU instance.
154 * @param channel Channel number.
155 */
156 __STATIC_INLINE uint32_t * nrf_egu_task_trigger_address_get(NRF_EGU_Type * NRF_EGUx,
157 uint8_t channel);
158
159 /**
160 * @brief Function for returning the specific EGU TRIGGER task.
161 *
162 * @param NRF_EGUx EGU instance.
163 * @param channel Channel number.
164 */
165 __STATIC_INLINE nrf_egu_task_t nrf_egu_task_trigger_get(NRF_EGU_Type * NRF_EGUx, uint8_t channel);
166
167 /**
168 * @brief Function for returning the state of a specific EGU event.
169 *
170 * @param NRF_EGUx EGU instance.
171 * @param egu_event EGU event to check.
172 */
173 __STATIC_INLINE bool nrf_egu_event_check(NRF_EGU_Type * NRF_EGUx,
174 nrf_egu_event_t egu_event);
175
176 /**
177 * @brief Function for clearing a specific EGU event.
178 *
179 * @param NRF_EGUx EGU instance.
180 * @param egu_event EGU event to clear.
181 */
182 __STATIC_INLINE void nrf_egu_event_clear(NRF_EGU_Type * NRF_EGUx,
183 nrf_egu_event_t egu_event);
184
185 /**
186 * @brief Function for returning the address of a specific EGU event register.
187 *
188 * @param NRF_EGUx EGU instance.
189 * @param egu_event EGU event.
190 */
191 __STATIC_INLINE uint32_t * nrf_egu_event_address_get(NRF_EGU_Type * NRF_EGUx,
192 nrf_egu_event_t egu_event);
193
194 /**
195 * @brief Function for returning the address of a specific EGU TRIGGERED event register.
196 *
197 * @param NRF_EGUx EGU instance.
198 * @param channel Channel number.
199 */
200 __STATIC_INLINE uint32_t * nrf_egu_event_triggered_address_get(NRF_EGU_Type * NRF_EGUx,
201 uint8_t channel);
202
203 /**
204 * @brief Function for returning the specific EGU TRIGGERED event.
205 *
206 * @param NRF_EGUx EGU instance.
207 * @param channel Channel number.
208 */
209 __STATIC_INLINE nrf_egu_event_t nrf_egu_event_triggered_get(NRF_EGU_Type * NRF_EGUx,
210 uint8_t channel);
211
212 /**
213 * @brief Function for enabling one or more specific EGU interrupts.
214 *
215 * @param NRF_EGUx EGU instance.
216 * @param egu_int_mask Interrupts to enable.
217 */
218 __STATIC_INLINE void nrf_egu_int_enable(NRF_EGU_Type * NRF_EGUx, uint32_t egu_int_mask);
219
220 /**
221 * @brief Function for retrieving the state of one or more EGU interrupts.
222 *
223 * @param NRF_EGUx EGU instance.
224 * @param egu_int_mask Interrupts to check.
225 *
226 * @retval true If all of the specified interrupts are enabled.
227 * @retval false If at least one of the specified interrupts is disabled.
228 */
229 __STATIC_INLINE bool nrf_egu_int_enable_check(NRF_EGU_Type * NRF_EGUx, uint32_t egu_int_mask);
230
231 /**
232 * @brief Function for disabling one or more specific EGU interrupts.
233 *
234 * @param NRF_EGUx EGU instance.
235 * @param egu_int_mask Interrupts to disable.
236 */
237 __STATIC_INLINE void nrf_egu_int_disable(NRF_EGU_Type * NRF_EGUx, uint32_t egu_int_mask);
238
239 /**
240 * @brief Function for retrieving one or more specific EGU interrupts.
241 *
242 * @param NRF_EGUx EGU instance.
243 * @param channel Channel number.
244 *
245 * @returns EGU interrupt mask.
246 */
247 __STATIC_INLINE nrf_egu_int_mask_t nrf_egu_int_get(NRF_EGU_Type * NRF_EGUx, uint8_t channel);
248
249 #if defined(DPPI_PRESENT) || defined(__NRFX_DOXYGEN__)
250 /**
251 * @brief Function for setting the subscribe configuration for a given
252 * EGU task.
253 *
254 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
255 * @param[in] task Task for which to set the configuration.
256 * @param[in] channel Channel through which to subscribe events.
257 */
258 __STATIC_INLINE void nrf_egu_subscribe_set(NRF_EGU_Type * p_reg,
259 nrf_egu_task_t task,
260 uint8_t channel);
261
262 /**
263 * @brief Function for clearing the subscribe configuration for a given
264 * EGU task.
265 *
266 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
267 * @param[in] task Task for which to clear the configuration.
268 */
269 __STATIC_INLINE void nrf_egu_subscribe_clear(NRF_EGU_Type * p_reg,
270 nrf_egu_task_t task);
271
272 /**
273 * @brief Function for setting the publish configuration for a given
274 * EGU event.
275 *
276 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
277 * @param[in] event Event for which to set the configuration.
278 * @param[in] channel Channel through which to publish the event.
279 */
280 __STATIC_INLINE void nrf_egu_publish_set(NRF_EGU_Type * p_reg,
281 nrf_egu_event_t event,
282 uint8_t channel);
283
284 /**
285 * @brief Function for clearing the publish configuration for a given
286 * EGU event.
287 *
288 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
289 * @param[in] event Event for which to clear the configuration.
290 */
291 __STATIC_INLINE void nrf_egu_publish_clear(NRF_EGU_Type * p_reg,
292 nrf_egu_event_t event);
293 #endif // defined(DPPI_PRESENT) || defined(__NRFX_DOXYGEN__)
294
295 #ifndef SUPPRESS_INLINE_IMPLEMENTATION
296
nrf_egu_channel_count(NRF_EGU_Type * NRF_EGUx)297 __STATIC_INLINE uint32_t nrf_egu_channel_count(NRF_EGU_Type * NRF_EGUx)
298 {
299 if (NRF_EGUx == NRF_EGU0){
300 return EGU0_CH_NUM;
301 }
302 if (NRF_EGUx == NRF_EGU1){
303 return EGU1_CH_NUM;
304 }
305 #if EGU_COUNT > 2
306 if (NRF_EGUx == NRF_EGU2){
307 return EGU2_CH_NUM;
308 }
309 if (NRF_EGUx == NRF_EGU3){
310 return EGU3_CH_NUM;
311 }
312 if (NRF_EGUx == NRF_EGU4){
313 return EGU4_CH_NUM;
314 }
315 if (NRF_EGUx == NRF_EGU5){
316 return EGU5_CH_NUM;
317 }
318 #endif
319 return 0;
320 }
321
nrf_egu_task_trigger(NRF_EGU_Type * NRF_EGUx,nrf_egu_task_t egu_task)322 __STATIC_INLINE void nrf_egu_task_trigger(NRF_EGU_Type * NRF_EGUx, nrf_egu_task_t egu_task)
323 {
324 NRFX_ASSERT(NRF_EGUx);
325 *((volatile uint32_t *)((uint8_t *)NRF_EGUx + (uint32_t)egu_task)) = 0x1UL;
326 }
327
nrf_egu_task_address_get(NRF_EGU_Type * NRF_EGUx,nrf_egu_task_t egu_task)328 __STATIC_INLINE uint32_t * nrf_egu_task_address_get(NRF_EGU_Type * NRF_EGUx,
329 nrf_egu_task_t egu_task)
330 {
331 NRFX_ASSERT(NRF_EGUx);
332 return (uint32_t *)((uint8_t *)NRF_EGUx + (uint32_t)egu_task);
333 }
334
nrf_egu_task_trigger_address_get(NRF_EGU_Type * NRF_EGUx,uint8_t channel)335 __STATIC_INLINE uint32_t * nrf_egu_task_trigger_address_get(NRF_EGU_Type * NRF_EGUx,
336 uint8_t channel)
337 {
338 NRFX_ASSERT(NRF_EGUx);
339 NRFX_ASSERT(channel < nrf_egu_channel_count(NRF_EGUx));
340 return (uint32_t*)&NRF_EGUx->TASKS_TRIGGER[channel];
341 }
342
nrf_egu_task_trigger_get(NRF_EGU_Type * NRF_EGUx,uint8_t channel)343 __STATIC_INLINE nrf_egu_task_t nrf_egu_task_trigger_get(NRF_EGU_Type * NRF_EGUx, uint8_t channel)
344 {
345 NRFX_ASSERT(NRF_EGUx);
346 NRFX_ASSERT(channel < nrf_egu_channel_count(NRF_EGUx));
347 return (nrf_egu_task_t)((uint32_t) NRF_EGU_TASK_TRIGGER0 + (channel * sizeof(uint32_t)));
348 }
349
nrf_egu_event_check(NRF_EGU_Type * NRF_EGUx,nrf_egu_event_t egu_event)350 __STATIC_INLINE bool nrf_egu_event_check(NRF_EGU_Type * NRF_EGUx,
351 nrf_egu_event_t egu_event)
352 {
353 NRFX_ASSERT(NRF_EGUx);
354 return (bool)*(volatile uint32_t *)((uint8_t *)NRF_EGUx + (uint32_t)egu_event);
355 }
356
nrf_egu_event_clear(NRF_EGU_Type * NRF_EGUx,nrf_egu_event_t egu_event)357 __STATIC_INLINE void nrf_egu_event_clear(NRF_EGU_Type * NRF_EGUx,
358 nrf_egu_event_t egu_event)
359 {
360 NRFX_ASSERT(NRF_EGUx);
361 *((volatile uint32_t *)((uint8_t *)NRF_EGUx + (uint32_t)egu_event)) = 0x0UL;
362 #if __CORTEX_M == 0x04
363 volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)NRF_EGUx + (uint32_t)egu_event));
364 (void)dummy;
365 #endif
366 }
367
nrf_egu_event_address_get(NRF_EGU_Type * NRF_EGUx,nrf_egu_event_t egu_event)368 __STATIC_INLINE uint32_t * nrf_egu_event_address_get(NRF_EGU_Type * NRF_EGUx,
369 nrf_egu_event_t egu_event)
370 {
371 NRFX_ASSERT(NRF_EGUx);
372 return (uint32_t *)((uint8_t *)NRF_EGUx + (uint32_t)egu_event);
373 }
374
nrf_egu_event_triggered_address_get(NRF_EGU_Type * NRF_EGUx,uint8_t channel)375 __STATIC_INLINE uint32_t * nrf_egu_event_triggered_address_get(NRF_EGU_Type * NRF_EGUx,
376 uint8_t channel)
377 {
378 NRFX_ASSERT(NRF_EGUx);
379 NRFX_ASSERT(channel < nrf_egu_channel_count(NRF_EGUx));
380 return (uint32_t*)&NRF_EGUx->EVENTS_TRIGGERED[channel];
381 }
382
nrf_egu_event_triggered_get(NRF_EGU_Type * NRF_EGUx,uint8_t channel)383 __STATIC_INLINE nrf_egu_event_t nrf_egu_event_triggered_get(NRF_EGU_Type * NRF_EGUx,
384 uint8_t channel)
385 {
386 NRFX_ASSERT(NRF_EGUx);
387 NRFX_ASSERT(channel < nrf_egu_channel_count(NRF_EGUx));
388 return (nrf_egu_event_t)((uint32_t) NRF_EGU_EVENT_TRIGGERED0 + (channel * sizeof(uint32_t)));
389 }
390
nrf_egu_int_enable(NRF_EGU_Type * NRF_EGUx,uint32_t egu_int_mask)391 __STATIC_INLINE void nrf_egu_int_enable(NRF_EGU_Type * NRF_EGUx, uint32_t egu_int_mask)
392 {
393 NRFX_ASSERT(NRF_EGUx);
394 NRF_EGUx->INTENSET = egu_int_mask;
395 }
396
nrf_egu_int_enable_check(NRF_EGU_Type * NRF_EGUx,uint32_t egu_int_mask)397 __STATIC_INLINE bool nrf_egu_int_enable_check(NRF_EGU_Type * NRF_EGUx, uint32_t egu_int_mask)
398 {
399 NRFX_ASSERT(NRF_EGUx);
400 return (bool)(NRF_EGUx->INTENSET & egu_int_mask);
401 }
402
nrf_egu_int_disable(NRF_EGU_Type * NRF_EGUx,uint32_t egu_int_mask)403 __STATIC_INLINE void nrf_egu_int_disable(NRF_EGU_Type * NRF_EGUx, uint32_t egu_int_mask)
404 {
405 NRFX_ASSERT(NRF_EGUx);
406 NRF_EGUx->INTENCLR = egu_int_mask;
407 }
408
nrf_egu_int_get(NRF_EGU_Type * NRF_EGUx,uint8_t channel)409 __STATIC_INLINE nrf_egu_int_mask_t nrf_egu_int_get(NRF_EGU_Type * NRF_EGUx, uint8_t channel)
410 {
411 NRFX_ASSERT(NRF_EGUx);
412 NRFX_ASSERT(channel < nrf_egu_channel_count(NRF_EGUx));
413 return (nrf_egu_int_mask_t)((uint32_t) (EGU_INTENSET_TRIGGERED0_Msk << channel));
414 }
415
416 #if defined(DPPI_PRESENT)
nrf_egu_subscribe_set(NRF_EGU_Type * p_reg,nrf_egu_task_t task,uint8_t channel)417 __STATIC_INLINE void nrf_egu_subscribe_set(NRF_EGU_Type * p_reg,
418 nrf_egu_task_t task,
419 uint8_t channel)
420 {
421 *((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) task + 0x80uL)) =
422 ((uint32_t)channel | EGU_SUBSCRIBE_TRIGGER_EN_Msk);
423 }
424
nrf_egu_subscribe_clear(NRF_EGU_Type * p_reg,nrf_egu_task_t task)425 __STATIC_INLINE void nrf_egu_subscribe_clear(NRF_EGU_Type * p_reg,
426 nrf_egu_task_t task)
427 {
428 *((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) task + 0x80uL)) = 0;
429 }
430
nrf_egu_publish_set(NRF_EGU_Type * p_reg,nrf_egu_event_t event,uint8_t channel)431 __STATIC_INLINE void nrf_egu_publish_set(NRF_EGU_Type * p_reg,
432 nrf_egu_event_t event,
433 uint8_t channel)
434 {
435 *((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) event + 0x80uL)) =
436 ((uint32_t)channel | EGU_PUBLISH_TRIGGERED_EN_Msk);
437 }
438
nrf_egu_publish_clear(NRF_EGU_Type * p_reg,nrf_egu_event_t event)439 __STATIC_INLINE void nrf_egu_publish_clear(NRF_EGU_Type * p_reg,
440 nrf_egu_event_t event)
441 {
442 *((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) event + 0x80uL)) = 0;
443 }
444 #endif // defined(DPPI_PRESENT)
445
446 #endif // SUPPRESS_INLINE_IMPLEMENTATION
447
448 /** @} */
449
450 #ifdef __cplusplus
451 }
452 #endif
453
454 #endif
455