xref: /nrf52832-nimble/nordic/nrfx/hal/nrf_ecb.h (revision 150812a83cab50279bd772ef6db1bfaf255f2c5b)
1*150812a8SEvalZero /*
2*150812a8SEvalZero  * Copyright (c) 2012 - 2018, Nordic Semiconductor ASA
3*150812a8SEvalZero  * All rights reserved.
4*150812a8SEvalZero  *
5*150812a8SEvalZero  * Redistribution and use in source and binary forms, with or without
6*150812a8SEvalZero  * modification, are permitted provided that the following conditions are met:
7*150812a8SEvalZero  *
8*150812a8SEvalZero  * 1. Redistributions of source code must retain the above copyright notice, this
9*150812a8SEvalZero  *    list of conditions and the following disclaimer.
10*150812a8SEvalZero  *
11*150812a8SEvalZero  * 2. Redistributions in binary form must reproduce the above copyright
12*150812a8SEvalZero  *    notice, this list of conditions and the following disclaimer in the
13*150812a8SEvalZero  *    documentation and/or other materials provided with the distribution.
14*150812a8SEvalZero  *
15*150812a8SEvalZero  * 3. Neither the name of the copyright holder nor the names of its
16*150812a8SEvalZero  *    contributors may be used to endorse or promote products derived from this
17*150812a8SEvalZero  *    software without specific prior written permission.
18*150812a8SEvalZero  *
19*150812a8SEvalZero  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20*150812a8SEvalZero  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21*150812a8SEvalZero  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22*150812a8SEvalZero  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
23*150812a8SEvalZero  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24*150812a8SEvalZero  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25*150812a8SEvalZero  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26*150812a8SEvalZero  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27*150812a8SEvalZero  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28*150812a8SEvalZero  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29*150812a8SEvalZero  * POSSIBILITY OF SUCH DAMAGE.
30*150812a8SEvalZero  */
31*150812a8SEvalZero 
32*150812a8SEvalZero #ifndef NRF_ECB_H__
33*150812a8SEvalZero #define NRF_ECB_H__
34*150812a8SEvalZero 
35*150812a8SEvalZero #include <nrfx.h>
36*150812a8SEvalZero 
37*150812a8SEvalZero #ifdef __cplusplus
38*150812a8SEvalZero extern "C" {
39*150812a8SEvalZero #endif
40*150812a8SEvalZero 
41*150812a8SEvalZero /**
42*150812a8SEvalZero  * @defgroup nrf_ecb_drv AES ECB encryption driver
43*150812a8SEvalZero  * @{
44*150812a8SEvalZero  * @ingroup nrf_ecb
45*150812a8SEvalZero  * @brief   Driver for the AES Electronic Code Book (ECB) peripheral.
46*150812a8SEvalZero  *
47*150812a8SEvalZero  * To encrypt data, the peripheral must first be powered on
48*150812a8SEvalZero  * using @ref nrf_ecb_init. Next, the key must be set using @ref nrf_ecb_set_key.
49*150812a8SEvalZero  */
50*150812a8SEvalZero 
51*150812a8SEvalZero /**
52*150812a8SEvalZero  * @brief Function for initializing and powering on the ECB peripheral.
53*150812a8SEvalZero  *
54*150812a8SEvalZero  * This function allocates memory for the ECBDATAPTR.
55*150812a8SEvalZero  * @retval true If initialization was successful.
56*150812a8SEvalZero  * @retval false If powering on failed.
57*150812a8SEvalZero  */
58*150812a8SEvalZero bool nrf_ecb_init(void);
59*150812a8SEvalZero 
60*150812a8SEvalZero /**
61*150812a8SEvalZero  * @brief Function for encrypting 16-byte data using current key.
62*150812a8SEvalZero  *
63*150812a8SEvalZero  * This function avoids unnecessary copying of data if the parameters point to the
64*150812a8SEvalZero  * correct locations in the ECB data structure.
65*150812a8SEvalZero  *
66*150812a8SEvalZero  * @param dst Result of encryption, 16 bytes will be written.
67*150812a8SEvalZero  * @param src Source with 16-byte data to be encrypted.
68*150812a8SEvalZero  *
69*150812a8SEvalZero  * @retval true  If the encryption operation completed.
70*150812a8SEvalZero  * @retval false If the encryption operation did not complete.
71*150812a8SEvalZero  */
72*150812a8SEvalZero bool nrf_ecb_crypt(uint8_t * dst, const uint8_t * src);
73*150812a8SEvalZero 
74*150812a8SEvalZero /**
75*150812a8SEvalZero  * @brief Function for setting the key to be used for encryption.
76*150812a8SEvalZero  *
77*150812a8SEvalZero  * @param key Pointer to the key. 16 bytes will be read.
78*150812a8SEvalZero  */
79*150812a8SEvalZero void nrf_ecb_set_key(const uint8_t * key);
80*150812a8SEvalZero 
81*150812a8SEvalZero /** @} */
82*150812a8SEvalZero 
83*150812a8SEvalZero /**
84*150812a8SEvalZero  * @defgroup nrf_ecb_hal AES ECB encryption HAL
85*150812a8SEvalZero  * @{
86*150812a8SEvalZero  * @ingroup nrf_ecb
87*150812a8SEvalZero  * @brief   Hardware access layer for managing the AES Electronic Codebook (ECB) peripheral.
88*150812a8SEvalZero  */
89*150812a8SEvalZero 
90*150812a8SEvalZero /**
91*150812a8SEvalZero  * @brief ECB tasks.
92*150812a8SEvalZero  */
93*150812a8SEvalZero typedef enum
94*150812a8SEvalZero {
95*150812a8SEvalZero     /*lint -save -e30 -esym(628,__INTADDR__)*/
96*150812a8SEvalZero     NRF_ECB_TASK_STARTECB = offsetof(NRF_ECB_Type, TASKS_STARTECB), /**< Task for starting ECB block encryption. */
97*150812a8SEvalZero     NRF_ECB_TASK_STOPECB  = offsetof(NRF_ECB_Type, TASKS_STOPECB),  /**< Task for stopping ECB block encryption. */
98*150812a8SEvalZero     /*lint -restore*/
99*150812a8SEvalZero } nrf_ecb_task_t;
100*150812a8SEvalZero 
101*150812a8SEvalZero /**
102*150812a8SEvalZero  * @brief ECB events.
103*150812a8SEvalZero  */
104*150812a8SEvalZero typedef enum
105*150812a8SEvalZero {
106*150812a8SEvalZero     /*lint -save -e30*/
107*150812a8SEvalZero     NRF_ECB_EVENT_ENDECB   = offsetof(NRF_ECB_Type, EVENTS_ENDECB),   /**< ECB block encrypt complete. */
108*150812a8SEvalZero     NRF_ECB_EVENT_ERRORECB = offsetof(NRF_ECB_Type, EVENTS_ERRORECB), /**< ECB block encrypt aborted because of a STOPECB task or due to an error. */
109*150812a8SEvalZero     /*lint -restore*/
110*150812a8SEvalZero } nrf_ecb_event_t;
111*150812a8SEvalZero 
112*150812a8SEvalZero /**
113*150812a8SEvalZero  * @brief ECB interrupts.
114*150812a8SEvalZero  */
115*150812a8SEvalZero typedef enum
116*150812a8SEvalZero {
117*150812a8SEvalZero     NRF_ECB_INT_ENDECB_MASK   = ECB_INTENSET_ENDECB_Msk,   ///< Interrupt on ENDECB event.
118*150812a8SEvalZero     NRF_ECB_INT_ERRORECB_MASK = ECB_INTENSET_ERRORECB_Msk, ///< Interrupt on ERRORECB event.
119*150812a8SEvalZero } nrf_ecb_int_mask_t;
120*150812a8SEvalZero 
121*150812a8SEvalZero 
122*150812a8SEvalZero /**
123*150812a8SEvalZero  * @brief Function for activating a specific ECB task.
124*150812a8SEvalZero  *
125*150812a8SEvalZero  * @param[in] p_reg Pointer to the peripheral register structure.
126*150812a8SEvalZero  * @param[in] task  Task to activate.
127*150812a8SEvalZero  */
128*150812a8SEvalZero __STATIC_INLINE void nrf_ecb_task_trigger(NRF_ECB_Type * p_reg, nrf_ecb_task_t task);
129*150812a8SEvalZero 
130*150812a8SEvalZero /**
131*150812a8SEvalZero  * @brief Function for getting the address of a specific ECB task register.
132*150812a8SEvalZero  *
133*150812a8SEvalZero  * @param[in] p_reg Pointer to the peripheral register structure.
134*150812a8SEvalZero  * @param[in] task  Requested task.
135*150812a8SEvalZero  *
136*150812a8SEvalZero  * @return Address of the specified task register.
137*150812a8SEvalZero  */
138*150812a8SEvalZero __STATIC_INLINE uint32_t nrf_ecb_task_address_get(NRF_ECB_Type const * p_reg,
139*150812a8SEvalZero                                                   nrf_ecb_task_t       task);
140*150812a8SEvalZero 
141*150812a8SEvalZero /**
142*150812a8SEvalZero  * @brief Function for clearing a specific ECB event.
143*150812a8SEvalZero  *
144*150812a8SEvalZero  * @param[in] p_reg Pointer to the peripheral register structure.
145*150812a8SEvalZero  * @param[in] event Event to clear.
146*150812a8SEvalZero  */
147*150812a8SEvalZero __STATIC_INLINE void nrf_ecb_event_clear(NRF_ECB_Type * p_reg, nrf_ecb_event_t event);
148*150812a8SEvalZero 
149*150812a8SEvalZero /**
150*150812a8SEvalZero  * @brief Function for checking the state of a specific ECB event.
151*150812a8SEvalZero  *
152*150812a8SEvalZero  * @param[in] p_reg Pointer to the peripheral register structure.
153*150812a8SEvalZero  * @param[in] event Event to check.
154*150812a8SEvalZero  *
155*150812a8SEvalZero  * @retval true  If the event is set.
156*150812a8SEvalZero  * @retval false If the event is not set.
157*150812a8SEvalZero  */
158*150812a8SEvalZero __STATIC_INLINE bool nrf_ecb_event_check(NRF_ECB_Type const * p_reg, nrf_ecb_event_t event);
159*150812a8SEvalZero 
160*150812a8SEvalZero /**
161*150812a8SEvalZero  * @brief Function for getting the address of a specific ECB event register.
162*150812a8SEvalZero  *
163*150812a8SEvalZero  * @param[in] p_reg Pointer to the peripheral register structure.
164*150812a8SEvalZero  * @param[in] event Requested event.
165*150812a8SEvalZero  *
166*150812a8SEvalZero  * @return Address of the specified event register.
167*150812a8SEvalZero  */
168*150812a8SEvalZero __STATIC_INLINE uint32_t nrf_ecb_event_address_get(NRF_ECB_Type const * p_reg,
169*150812a8SEvalZero                                                    nrf_ecb_event_t      event);
170*150812a8SEvalZero 
171*150812a8SEvalZero /**
172*150812a8SEvalZero  * @brief Function for enabling specified interrupts.
173*150812a8SEvalZero  *
174*150812a8SEvalZero  * @param[in] p_reg Pointer to the peripheral register structure.
175*150812a8SEvalZero  * @param[in] mask  Interrupts to enable.
176*150812a8SEvalZero  */
177*150812a8SEvalZero __STATIC_INLINE void nrf_ecb_int_enable(NRF_ECB_Type * p_reg, uint32_t mask);
178*150812a8SEvalZero 
179*150812a8SEvalZero /**
180*150812a8SEvalZero  * @brief Function for disabling specified interrupts.
181*150812a8SEvalZero  *
182*150812a8SEvalZero  * @param[in] p_reg Pointer to the peripheral register structure.
183*150812a8SEvalZero  * @param[in] mask  Interrupts to disable.
184*150812a8SEvalZero  */
185*150812a8SEvalZero __STATIC_INLINE void nrf_ecb_int_disable(NRF_ECB_Type * p_reg, uint32_t mask);
186*150812a8SEvalZero 
187*150812a8SEvalZero /**
188*150812a8SEvalZero  * @brief Function for retrieving the state of a given interrupt.
189*150812a8SEvalZero  *
190*150812a8SEvalZero  * @param[in] p_reg   Pointer to the peripheral register structure.
191*150812a8SEvalZero  * @param[in] ecb_int Interrupt to check.
192*150812a8SEvalZero  *
193*150812a8SEvalZero  * @retval true  If the interrupt is enabled.
194*150812a8SEvalZero  * @retval false If the interrupt is not enabled.
195*150812a8SEvalZero  */
196*150812a8SEvalZero __STATIC_INLINE bool nrf_ecb_int_enable_check(NRF_ECB_Type const * p_reg,
197*150812a8SEvalZero                                               nrf_ecb_int_mask_t   ecb_int);
198*150812a8SEvalZero 
199*150812a8SEvalZero /**
200*150812a8SEvalZero  * @brief Function for setting the pointer to the ECB data buffer.
201*150812a8SEvalZero  *
202*150812a8SEvalZero  * @note The buffer has to be placed in the Data RAM region.
203*150812a8SEvalZero  *       For description of the data structure in this buffer, see the Product Specification.
204*150812a8SEvalZero  *
205*150812a8SEvalZero  * @param[in] p_reg    Pointer to the peripheral register structure.
206*150812a8SEvalZero  * @param[in] p_buffer Pointer to the ECB data buffer.
207*150812a8SEvalZero  */
208*150812a8SEvalZero __STATIC_INLINE void nrf_ecb_data_pointer_set(NRF_ECB_Type * p_reg, void const * p_buffer);
209*150812a8SEvalZero 
210*150812a8SEvalZero /**
211*150812a8SEvalZero  * @brief Function for getting the pointer to the ECB data buffer.
212*150812a8SEvalZero  *
213*150812a8SEvalZero  * @param[in] p_reg Pointer to the peripheral register structure.
214*150812a8SEvalZero  *
215*150812a8SEvalZero  * @return Pointer to the ECB data buffer.
216*150812a8SEvalZero  */
217*150812a8SEvalZero __STATIC_INLINE void * nrf_ecb_data_pointer_get(NRF_ECB_Type const * p_reg);
218*150812a8SEvalZero 
219*150812a8SEvalZero #ifndef SUPPRESS_INLINE_IMPLEMENTATION
220*150812a8SEvalZero 
nrf_ecb_task_trigger(NRF_ECB_Type * p_reg,nrf_ecb_task_t task)221*150812a8SEvalZero __STATIC_INLINE void nrf_ecb_task_trigger(NRF_ECB_Type * p_reg, nrf_ecb_task_t task)
222*150812a8SEvalZero {
223*150812a8SEvalZero     *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task)) = 0x1UL;
224*150812a8SEvalZero }
225*150812a8SEvalZero 
nrf_ecb_task_address_get(NRF_ECB_Type const * p_reg,nrf_ecb_task_t task)226*150812a8SEvalZero __STATIC_INLINE uint32_t nrf_ecb_task_address_get(NRF_ECB_Type const * p_reg,
227*150812a8SEvalZero                                                   nrf_ecb_task_t       task)
228*150812a8SEvalZero {
229*150812a8SEvalZero     return ((uint32_t)p_reg + (uint32_t)task);
230*150812a8SEvalZero }
231*150812a8SEvalZero 
nrf_ecb_event_clear(NRF_ECB_Type * p_reg,nrf_ecb_event_t event)232*150812a8SEvalZero __STATIC_INLINE void nrf_ecb_event_clear(NRF_ECB_Type * p_reg, nrf_ecb_event_t event)
233*150812a8SEvalZero {
234*150812a8SEvalZero     *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL;
235*150812a8SEvalZero #if __CORTEX_M == 0x04
236*150812a8SEvalZero     volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event));
237*150812a8SEvalZero     (void)dummy;
238*150812a8SEvalZero #endif
239*150812a8SEvalZero }
240*150812a8SEvalZero 
nrf_ecb_event_check(NRF_ECB_Type const * p_reg,nrf_ecb_event_t event)241*150812a8SEvalZero __STATIC_INLINE bool nrf_ecb_event_check(NRF_ECB_Type const * p_reg, nrf_ecb_event_t event)
242*150812a8SEvalZero {
243*150812a8SEvalZero     return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event);
244*150812a8SEvalZero }
245*150812a8SEvalZero 
nrf_ecb_event_address_get(NRF_ECB_Type const * p_reg,nrf_ecb_event_t event)246*150812a8SEvalZero __STATIC_INLINE uint32_t nrf_ecb_event_address_get(NRF_ECB_Type const * p_reg,
247*150812a8SEvalZero                                                    nrf_ecb_event_t      event)
248*150812a8SEvalZero {
249*150812a8SEvalZero     return ((uint32_t)p_reg + (uint32_t)event);
250*150812a8SEvalZero }
251*150812a8SEvalZero 
nrf_ecb_int_enable(NRF_ECB_Type * p_reg,uint32_t mask)252*150812a8SEvalZero __STATIC_INLINE void nrf_ecb_int_enable(NRF_ECB_Type * p_reg, uint32_t mask)
253*150812a8SEvalZero {
254*150812a8SEvalZero     p_reg->INTENSET = mask;
255*150812a8SEvalZero }
256*150812a8SEvalZero 
nrf_ecb_int_disable(NRF_ECB_Type * p_reg,uint32_t mask)257*150812a8SEvalZero __STATIC_INLINE void nrf_ecb_int_disable(NRF_ECB_Type * p_reg, uint32_t mask)
258*150812a8SEvalZero {
259*150812a8SEvalZero     p_reg->INTENCLR = mask;
260*150812a8SEvalZero }
261*150812a8SEvalZero 
nrf_ecb_int_enable_check(NRF_ECB_Type const * p_reg,nrf_ecb_int_mask_t ecb_int)262*150812a8SEvalZero __STATIC_INLINE bool nrf_ecb_int_enable_check(NRF_ECB_Type const * p_reg,
263*150812a8SEvalZero                                               nrf_ecb_int_mask_t   ecb_int)
264*150812a8SEvalZero {
265*150812a8SEvalZero     return (bool)(p_reg->INTENSET & ecb_int);
266*150812a8SEvalZero }
267*150812a8SEvalZero 
nrf_ecb_data_pointer_set(NRF_ECB_Type * p_reg,void const * p_buffer)268*150812a8SEvalZero __STATIC_INLINE void nrf_ecb_data_pointer_set(NRF_ECB_Type * p_reg, void const * p_buffer)
269*150812a8SEvalZero {
270*150812a8SEvalZero     p_reg->ECBDATAPTR = (uint32_t)p_buffer;
271*150812a8SEvalZero }
272*150812a8SEvalZero 
nrf_ecb_data_pointer_get(NRF_ECB_Type const * p_reg)273*150812a8SEvalZero __STATIC_INLINE void * nrf_ecb_data_pointer_get(NRF_ECB_Type const * p_reg)
274*150812a8SEvalZero {
275*150812a8SEvalZero     return (void *)(p_reg->ECBDATAPTR);
276*150812a8SEvalZero }
277*150812a8SEvalZero 
278*150812a8SEvalZero #endif // SUPPRESS_INLINE_IMPLEMENTATION
279*150812a8SEvalZero 
280*150812a8SEvalZero /** @} */
281*150812a8SEvalZero 
282*150812a8SEvalZero #ifdef __cplusplus
283*150812a8SEvalZero }
284*150812a8SEvalZero #endif
285*150812a8SEvalZero 
286*150812a8SEvalZero #endif  // NRF_ECB_H__
287*150812a8SEvalZero 
288