1*150812a8SEvalZero /*
2*150812a8SEvalZero * Copyright (c) 2017 - 2018, Nordic Semiconductor ASA
3*150812a8SEvalZero * All rights reserved.
4*150812a8SEvalZero *
5*150812a8SEvalZero * Redistribution and use in source and binary forms, with or without
6*150812a8SEvalZero * modification, are permitted provided that the following conditions are met:
7*150812a8SEvalZero *
8*150812a8SEvalZero * 1. Redistributions of source code must retain the above copyright notice, this
9*150812a8SEvalZero * list of conditions and the following disclaimer.
10*150812a8SEvalZero *
11*150812a8SEvalZero * 2. Redistributions in binary form must reproduce the above copyright
12*150812a8SEvalZero * notice, this list of conditions and the following disclaimer in the
13*150812a8SEvalZero * documentation and/or other materials provided with the distribution.
14*150812a8SEvalZero *
15*150812a8SEvalZero * 3. Neither the name of the copyright holder nor the names of its
16*150812a8SEvalZero * contributors may be used to endorse or promote products derived from this
17*150812a8SEvalZero * software without specific prior written permission.
18*150812a8SEvalZero *
19*150812a8SEvalZero * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20*150812a8SEvalZero * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21*150812a8SEvalZero * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22*150812a8SEvalZero * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
23*150812a8SEvalZero * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24*150812a8SEvalZero * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25*150812a8SEvalZero * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26*150812a8SEvalZero * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27*150812a8SEvalZero * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28*150812a8SEvalZero * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29*150812a8SEvalZero * POSSIBILITY OF SUCH DAMAGE.
30*150812a8SEvalZero */
31*150812a8SEvalZero
32*150812a8SEvalZero #include <nrfx.h>
33*150812a8SEvalZero
34*150812a8SEvalZero #if NRFX_CHECK(NRFX_PRS_ENABLED)
35*150812a8SEvalZero #include "nrfx_prs.h"
36*150812a8SEvalZero
37*150812a8SEvalZero #define NRFX_LOG_MODULE PRS
38*150812a8SEvalZero #include <nrfx_log.h>
39*150812a8SEvalZero
40*150812a8SEvalZero #define LOG_FUNCTION_EXIT(level, ret_code) \
41*150812a8SEvalZero NRFX_LOG_##level("Function: %s, error code: %s.", \
42*150812a8SEvalZero __func__, \
43*150812a8SEvalZero NRFX_LOG_ERROR_STRING_GET(ret_code))
44*150812a8SEvalZero
45*150812a8SEvalZero
46*150812a8SEvalZero typedef struct {
47*150812a8SEvalZero nrfx_irq_handler_t handler;
48*150812a8SEvalZero bool acquired;
49*150812a8SEvalZero } prs_box_t;
50*150812a8SEvalZero
51*150812a8SEvalZero #define PRS_BOX_DEFINE(n) \
52*150812a8SEvalZero static prs_box_t m_prs_box_##n = { .handler = NULL, .acquired = false }; \
53*150812a8SEvalZero void nrfx_prs_box_##n##_irq_handler(void) \
54*150812a8SEvalZero { \
55*150812a8SEvalZero NRFX_ASSERT(m_prs_box_##n.handler); \
56*150812a8SEvalZero m_prs_box_##n.handler(); \
57*150812a8SEvalZero }
58*150812a8SEvalZero
59*150812a8SEvalZero #if defined(NRFX_PRS_BOX_0_ADDR) && NRFX_CHECK(NRFX_PRS_BOX_0_ENABLED)
60*150812a8SEvalZero PRS_BOX_DEFINE(0)
61*150812a8SEvalZero #endif
62*150812a8SEvalZero #if defined(NRFX_PRS_BOX_1_ADDR) && NRFX_CHECK(NRFX_PRS_BOX_1_ENABLED)
63*150812a8SEvalZero PRS_BOX_DEFINE(1)
64*150812a8SEvalZero #endif
65*150812a8SEvalZero #if defined(NRFX_PRS_BOX_2_ADDR) && NRFX_CHECK(NRFX_PRS_BOX_2_ENABLED)
66*150812a8SEvalZero PRS_BOX_DEFINE(2)
67*150812a8SEvalZero #endif
68*150812a8SEvalZero #if defined(NRFX_PRS_BOX_3_ADDR) && NRFX_CHECK(NRFX_PRS_BOX_3_ENABLED)
69*150812a8SEvalZero PRS_BOX_DEFINE(3)
70*150812a8SEvalZero #endif
71*150812a8SEvalZero #if defined(NRFX_PRS_BOX_4_ADDR) && NRFX_CHECK(NRFX_PRS_BOX_4_ENABLED)
72*150812a8SEvalZero PRS_BOX_DEFINE(4)
73*150812a8SEvalZero #endif
74*150812a8SEvalZero
75*150812a8SEvalZero
prs_box_get(void const * p_base_addr)76*150812a8SEvalZero static prs_box_t * prs_box_get(void const * p_base_addr)
77*150812a8SEvalZero {
78*150812a8SEvalZero #if !defined(IS_PRS_BOX)
79*150812a8SEvalZero #define IS_PRS_BOX(n, p_base_addr) ((p_base_addr) == NRFX_PRS_BOX_##n##_ADDR)
80*150812a8SEvalZero #endif
81*150812a8SEvalZero
82*150812a8SEvalZero #if defined(NRFX_PRS_BOX_0_ADDR) && NRFX_CHECK(NRFX_PRS_BOX_0_ENABLED)
83*150812a8SEvalZero if (IS_PRS_BOX(0, p_base_addr)) { return &m_prs_box_0; }
84*150812a8SEvalZero else
85*150812a8SEvalZero #endif
86*150812a8SEvalZero #if defined(NRFX_PRS_BOX_1_ADDR) && NRFX_CHECK(NRFX_PRS_BOX_1_ENABLED)
87*150812a8SEvalZero if (IS_PRS_BOX(1, p_base_addr)) { return &m_prs_box_1; }
88*150812a8SEvalZero else
89*150812a8SEvalZero #endif
90*150812a8SEvalZero #if defined(NRFX_PRS_BOX_2_ADDR) && NRFX_CHECK(NRFX_PRS_BOX_2_ENABLED)
91*150812a8SEvalZero if (IS_PRS_BOX(2, p_base_addr)) { return &m_prs_box_2; }
92*150812a8SEvalZero else
93*150812a8SEvalZero #endif
94*150812a8SEvalZero #if defined(NRFX_PRS_BOX_3_ADDR) && NRFX_CHECK(NRFX_PRS_BOX_3_ENABLED)
95*150812a8SEvalZero if (IS_PRS_BOX(3, p_base_addr)) { return &m_prs_box_3; }
96*150812a8SEvalZero else
97*150812a8SEvalZero #endif
98*150812a8SEvalZero #if defined(NRFX_PRS_BOX_4_ADDR) && NRFX_CHECK(NRFX_PRS_BOX_4_ENABLED)
99*150812a8SEvalZero if (IS_PRS_BOX(4, p_base_addr)) { return &m_prs_box_4; }
100*150812a8SEvalZero else
101*150812a8SEvalZero #endif
102*150812a8SEvalZero {
103*150812a8SEvalZero return NULL;
104*150812a8SEvalZero }
105*150812a8SEvalZero }
106*150812a8SEvalZero
nrfx_prs_acquire(void const * p_base_addr,nrfx_irq_handler_t irq_handler)107*150812a8SEvalZero nrfx_err_t nrfx_prs_acquire(void const * p_base_addr,
108*150812a8SEvalZero nrfx_irq_handler_t irq_handler)
109*150812a8SEvalZero {
110*150812a8SEvalZero NRFX_ASSERT(p_base_addr);
111*150812a8SEvalZero
112*150812a8SEvalZero nrfx_err_t ret_code;
113*150812a8SEvalZero
114*150812a8SEvalZero prs_box_t * p_box = prs_box_get(p_base_addr);
115*150812a8SEvalZero if (p_box != NULL)
116*150812a8SEvalZero {
117*150812a8SEvalZero bool busy = false;
118*150812a8SEvalZero
119*150812a8SEvalZero NRFX_CRITICAL_SECTION_ENTER();
120*150812a8SEvalZero if (p_box->acquired)
121*150812a8SEvalZero {
122*150812a8SEvalZero busy = true;
123*150812a8SEvalZero }
124*150812a8SEvalZero else
125*150812a8SEvalZero {
126*150812a8SEvalZero p_box->handler = irq_handler;
127*150812a8SEvalZero p_box->acquired = true;
128*150812a8SEvalZero }
129*150812a8SEvalZero NRFX_CRITICAL_SECTION_EXIT();
130*150812a8SEvalZero
131*150812a8SEvalZero if (busy)
132*150812a8SEvalZero {
133*150812a8SEvalZero ret_code = NRFX_ERROR_BUSY;
134*150812a8SEvalZero LOG_FUNCTION_EXIT(WARNING, ret_code);
135*150812a8SEvalZero return ret_code;
136*150812a8SEvalZero }
137*150812a8SEvalZero }
138*150812a8SEvalZero
139*150812a8SEvalZero ret_code = NRFX_SUCCESS;
140*150812a8SEvalZero LOG_FUNCTION_EXIT(INFO, ret_code);
141*150812a8SEvalZero return ret_code;
142*150812a8SEvalZero }
143*150812a8SEvalZero
nrfx_prs_release(void const * p_base_addr)144*150812a8SEvalZero void nrfx_prs_release(void const * p_base_addr)
145*150812a8SEvalZero {
146*150812a8SEvalZero NRFX_ASSERT(p_base_addr);
147*150812a8SEvalZero
148*150812a8SEvalZero prs_box_t * p_box = prs_box_get(p_base_addr);
149*150812a8SEvalZero if (p_box != NULL)
150*150812a8SEvalZero {
151*150812a8SEvalZero p_box->handler = NULL;
152*150812a8SEvalZero p_box->acquired = false;
153*150812a8SEvalZero }
154*150812a8SEvalZero }
155*150812a8SEvalZero
156*150812a8SEvalZero
157*150812a8SEvalZero #endif // NRFX_CHECK(NRFX_PRS_ENABLED)
158